cregit-Linux how code gets into the kernel

Release 4.10 arch/arm64/include/asm/arch_timer.h

/*
 * arch/arm64/include/asm/arch_timer.h
 *
 * Copyright (C) 2012 ARM Ltd.
 * Author: Marc Zyngier <marc.zyngier@arm.com>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */
#ifndef __ASM_ARCH_TIMER_H

#define __ASM_ARCH_TIMER_H

#include <asm/barrier.h>
#include <asm/sysreg.h>

#include <linux/bug.h>
#include <linux/init.h>
#include <linux/jump_label.h>
#include <linux/types.h>

#include <clocksource/arm_arch_timer.h>

#if IS_ENABLED(CONFIG_FSL_ERRATUM_A008585)
extern struct static_key_false arch_timer_read_ool_enabled;

#define needs_fsl_a008585_workaround() \
	static_branch_unlikely(&arch_timer_read_ool_enabled)
#else

#define needs_fsl_a008585_workaround()  false
#endif

u32 __fsl_a008585_read_cntp_tval_el0(void);
u32 __fsl_a008585_read_cntv_tval_el0(void);
u64 __fsl_a008585_read_cntvct_el0(void);

/*
 * The number of retries is an arbitrary value well beyond the highest number
 * of iterations the loop has been observed to take.
 */

#define __fsl_a008585_read_reg(reg) ({                      \
        u64 _old, _new;                                 \
        int _retries = 200;                             \
                                                        \
        do {                                            \
                _old = read_sysreg(reg);                \
                _new = read_sysreg(reg);                \
                _retries--;                             \
        } while (unlikely(_old != _new) && _retries);   \
                                                        \
        WARN_ON_ONCE(!_retries);                        \
        _new;                                           \
})


#define arch_timer_reg_read_stable(reg) 		\
({                                                      \
        u64 _val;                                       \
        if (needs_fsl_a008585_workaround())             \
                _val = __fsl_a008585_read_##reg();      \
        else                                            \
                _val = read_sysreg(reg);                \
        _val;                                           \
})

/*
 * These register accessors are marked inline so the compiler can
 * nicely work out which register we want, and chuck away the rest of
 * the code.
 */

static __always_inline void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u32 val) { if (access == ARCH_TIMER_PHYS_ACCESS) { switch (reg) { case ARCH_TIMER_REG_CTRL: write_sysreg(val, cntp_ctl_el0); break; case ARCH_TIMER_REG_TVAL: write_sysreg(val, cntp_tval_el0); break; } } else if (access == ARCH_TIMER_VIRT_ACCESS) { switch (reg) { case ARCH_TIMER_REG_CTRL: write_sysreg(val, cntv_ctl_el0); break; case ARCH_TIMER_REG_TVAL: write_sysreg(val, cntv_tval_el0); break; } } isb(); }

Contributors

PersonTokensPropCommitsCommitProp
mark rutlandmark rutland6165.59%240.00%
marc zyngiermarc zyngier2830.11%120.00%
stephen boydstephen boyd44.30%240.00%
Total93100.00%5100.00%


static __always_inline u32 arch_timer_reg_read_cp15(int access, enum arch_timer_reg reg) { if (access == ARCH_TIMER_PHYS_ACCESS) { switch (reg) { case ARCH_TIMER_REG_CTRL: return read_sysreg(cntp_ctl_el0); case ARCH_TIMER_REG_TVAL: return arch_timer_reg_read_stable(cntp_tval_el0); } } else if (access == ARCH_TIMER_VIRT_ACCESS) { switch (reg) { case ARCH_TIMER_REG_CTRL: return read_sysreg(cntv_ctl_el0); case ARCH_TIMER_REG_TVAL: return arch_timer_reg_read_stable(cntv_tval_el0); } } BUG(); }

Contributors

PersonTokensPropCommitsCommitProp
mark rutlandmark rutland5668.29%233.33%
marc zyngiermarc zyngier2024.39%116.67%
stephen boydstephen boyd44.88%233.33%
scott woodscott wood22.44%116.67%
Total82100.00%6100.00%


static inline u32 arch_timer_get_cntfrq(void) { return read_sysreg(cntfrq_el0); }

Contributors

PersonTokensPropCommitsCommitProp
mark rutlandmark rutland1280.00%266.67%
marc zyngiermarc zyngier320.00%133.33%
Total15100.00%3100.00%


static inline u32 arch_timer_get_cntkctl(void) { return read_sysreg(cntkctl_el1); }

Contributors

PersonTokensPropCommitsCommitProp
marc zyngiermarc zyngier640.00%133.33%
sudeep karkadanageshasudeep karkadanagesha533.33%133.33%
mark rutlandmark rutland426.67%133.33%
Total15100.00%3100.00%


static inline void arch_timer_set_cntkctl(u32 cntkctl) { write_sysreg(cntkctl, cntkctl_el1); }

Contributors

PersonTokensPropCommitsCommitProp
sudeep karkadanageshasudeep karkadanagesha1058.82%150.00%
mark rutlandmark rutland741.18%150.00%
Total17100.00%2100.00%


static inline u64 arch_counter_get_cntpct(void) { /* * AArch64 kernel and user space mandate the use of CNTVCT. */ BUG(); return 0; }

Contributors

PersonTokensPropCommitsCommitProp
sonny raosonny rao16100.00%1100.00%
Total16100.00%1100.00%


static inline u64 arch_counter_get_cntvct(void) { isb(); return arch_timer_reg_read_stable(cntvct_el0); }

Contributors

PersonTokensPropCommitsCommitProp
marc zyngiermarc zyngier1055.56%120.00%
mark rutlandmark rutland738.89%360.00%
scott woodscott wood15.56%120.00%
Total18100.00%5100.00%


static inline int arch_timer_arch_init(void) { return 0; }

Contributors

PersonTokensPropCommitsCommitProp
rob herringrob herring12100.00%1100.00%
Total12100.00%1100.00%

#endif

Overall Contributors

PersonTokensPropCommitsCommitProp
mark rutlandmark rutland16345.40%327.27%
marc zyngiermarc zyngier7520.89%19.09%
scott woodscott wood6618.38%19.09%
sonny raosonny rao164.46%19.09%
sudeep karkadanageshasudeep karkadanagesha154.18%19.09%
rob herringrob herring123.34%19.09%
stephen boydstephen boyd92.51%218.18%
paul walmsleypaul walmsley30.84%19.09%
Total359100.00%11100.00%
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