cregit-Linux how code gets into the kernel

Release 4.10 arch/powerpc/mm/slb.c

Directory: arch/powerpc/mm
/*
 * PowerPC64 SLB support.
 *
 * Copyright (C) 2004 David Gibson <dwg@au.ibm.com>, IBM
 * Based on earlier code written by:
 * Dave Engebretsen and Mike Corrigan {engebret|mikejc}@us.ibm.com
 *    Copyright (c) 2001 Dave Engebretsen
 * Copyright (C) 2002 Anton Blanchard <anton@au.ibm.com>, IBM
 *
 *
 *      This program is free software; you can redistribute it and/or
 *      modify it under the terms of the GNU General Public License
 *      as published by the Free Software Foundation; either version
 *      2 of the License, or (at your option) any later version.
 */

#include <asm/pgtable.h>
#include <asm/mmu.h>
#include <asm/mmu_context.h>
#include <asm/paca.h>
#include <asm/cputable.h>
#include <asm/cacheflush.h>
#include <asm/smp.h>
#include <linux/compiler.h>
#include <asm/udbg.h>
#include <asm/code-patching.h>


enum slb_index {
	
LINEAR_INDEX	= 0, /* Kernel linear map  (0xc000000000000000) */
	
VMALLOC_INDEX	= 1, /* Kernel virtual map (0xd000000000000000) */
	
KSTACK_INDEX	= 2, /* Kernel stack map */
};

extern void slb_allocate_realmode(unsigned long ea);


static void slb_allocate(unsigned long ea) { /* Currently, we do real mode for all SLBs including user, but * that will change if we bring back dynamic VSIDs */ slb_allocate_realmode(ea); }

Contributors

PersonTokensPropCommitsCommitProp
benjamin herrenschmidtbenjamin herrenschmidt16100.00%1100.00%
Total16100.00%1100.00%

#define slb_esid_mask(ssize) \ (((ssize) == MMU_SEGSIZE_256M)? ESID_MASK: ESID_MASK_1T)
static inline unsigned long mk_esid_data(unsigned long ea, int ssize, enum slb_index index) { return (ea & slb_esid_mask(ssize)) | SLB_ESID_V | index; }

Contributors

PersonTokensPropCommitsCommitProp
paul mackerraspaul mackerras2369.70%360.00%
david gibsondavid gibson618.18%120.00%
anshuman khandualanshuman khandual412.12%120.00%
Total33100.00%5100.00%


static inline unsigned long mk_vsid_data(unsigned long ea, int ssize, unsigned long flags) { return (get_kernel_vsid(ea, ssize) << slb_vsid_shift(ssize)) | flags | ((unsigned long) ssize << SLB_VSID_SSIZE_SHIFT); }

Contributors

PersonTokensPropCommitsCommitProp
paul mackerraspaul mackerras2452.17%266.67%
david gibsondavid gibson2247.83%133.33%
Total46100.00%3100.00%


static inline void slb_shadow_update(unsigned long ea, int ssize, unsigned long flags, enum slb_index index) { struct slb_shadow *p = get_slb_shadow(); /* * Clear the ESID first so the entry is not valid while we are * updating it. No write barriers are needed here, provided * we only update the current CPU's SLB shadow buffer. */ p->save_area[index].esid = 0; p->save_area[index].vsid = cpu_to_be64(mk_vsid_data(ea, ssize, flags)); p->save_area[index].esid = cpu_to_be64(mk_esid_data(ea, ssize, index)); }

Contributors

PersonTokensPropCommitsCommitProp
michael neulingmichael neuling5464.29%233.33%
michael ellermanmichael ellerman1011.90%116.67%
paul mackerraspaul mackerras78.33%116.67%
anshuman khandualanshuman khandual78.33%116.67%
anton blanchardanton blanchard67.14%116.67%
Total84100.00%6100.00%


static inline void slb_shadow_clear(enum slb_index index) { get_slb_shadow()->save_area[index].esid = 0; }

Contributors

PersonTokensPropCommitsCommitProp
paul mackerraspaul mackerras1252.17%240.00%
david gibsondavid gibson626.09%120.00%
anshuman khandualanshuman khandual417.39%120.00%
michael neulingmichael neuling14.35%120.00%
Total23100.00%5100.00%


static inline void create_shadowed_slbe(unsigned long ea, int ssize, unsigned long flags, enum slb_index index) { /* * Updating the shadow buffer before writing the SLB ensures * we don't get a stale entry here if we get preempted by PHYP * between these two statements. */ slb_shadow_update(ea, ssize, flags, index); asm volatile("slbmte %0,%1" : : "r" (mk_vsid_data(ea, ssize, flags)), "r" (mk_esid_data(ea, ssize, index)) : "memory" ); }

Contributors

PersonTokensPropCommitsCommitProp
paul mackerraspaul mackerras3286.49%266.67%
anshuman khandualanshuman khandual513.51%133.33%
Total37100.00%3100.00%


static void __slb_flush_and_rebolt(void) { /* If you change this make sure you change SLB_NUM_BOLTED * and PR KVM appropriately too. */ unsigned long linear_llp, vmalloc_llp, lflags, vflags; unsigned long ksp_esid_data, ksp_vsid_data; linear_llp = mmu_psize_defs[mmu_linear_psize].sllp; vmalloc_llp = mmu_psize_defs[mmu_vmalloc_psize].sllp; lflags = SLB_VSID_KERNEL | linear_llp; vflags = SLB_VSID_KERNEL | vmalloc_llp; ksp_esid_data = mk_esid_data(get_paca()->kstack, mmu_kernel_ssize, KSTACK_INDEX); if ((ksp_esid_data & ~0xfffffffUL) <= PAGE_OFFSET) { ksp_esid_data &= ~SLB_ESID_V; ksp_vsid_data = 0; slb_shadow_clear(KSTACK_INDEX); } else { /* Update stack entry; others don't change */ slb_shadow_update(get_paca()->kstack, mmu_kernel_ssize, lflags, KSTACK_INDEX); ksp_vsid_data = be64_to_cpu(get_slb_shadow()->save_area[KSTACK_INDEX].vsid); } /* We need to do this all in asm, so we're sure we don't touch * the stack between the slbia and rebolting it. */ asm volatile("isync\n" "slbia\n" /* Slot 1 - first VMALLOC segment */ "slbmte %0,%1\n" /* Slot 2 - kernel stack */ "slbmte %2,%3\n" "isync" :: "r"(mk_vsid_data(VMALLOC_START, mmu_kernel_ssize, vflags)), "r"(mk_esid_data(VMALLOC_START, mmu_kernel_ssize, 1)), "r"(ksp_vsid_data), "r"(ksp_esid_data) : "memory"); }

Contributors

PersonTokensPropCommitsCommitProp
paul mackerraspaul mackerras5338.69%538.46%
benjamin herrenschmidtbenjamin herrenschmidt3223.36%17.69%
david gibsondavid gibson3223.36%17.69%
michael neulingmichael neuling118.03%215.38%
anshuman khandualanshuman khandual42.92%17.69%
anton blanchardanton blanchard32.19%17.69%
michael ellermanmichael ellerman10.73%17.69%
alexander grafalexander graf10.73%17.69%
Total137100.00%13100.00%


void slb_flush_and_rebolt(void) { WARN_ON(!irqs_disabled()); /* * We can't take a PMU exception in the following code, so hard * disable interrupts. */ hard_irq_disable(); __slb_flush_and_rebolt(); get_paca()->slb_cache_ptr = 0; }

Contributors

PersonTokensPropCommitsCommitProp
paul mackerraspaul mackerras28100.00%1100.00%
Total28100.00%1100.00%


void slb_vmalloc_update(void) { unsigned long vflags; vflags = SLB_VSID_KERNEL | mmu_psize_defs[mmu_vmalloc_psize].sllp; slb_shadow_update(VMALLOC_START, mmu_kernel_ssize, vflags, VMALLOC_INDEX); slb_flush_and_rebolt(); }

Contributors

PersonTokensPropCommitsCommitProp
michael neulingmichael neuling3391.67%133.33%
paul mackerraspaul mackerras25.56%133.33%
anshuman khandualanshuman khandual12.78%133.33%
Total36100.00%3100.00%

/* Helper function to compare esids. There are four cases to handle. * 1. The system is not 1T segment size capable. Use the GET_ESID compare. * 2. The system is 1T capable, both addresses are < 1T, use the GET_ESID compare. * 3. The system is 1T capable, only one of the two addresses is > 1T. This is not a match. * 4. The system is 1T capable, both addresses are > 1T, use the GET_ESID_1T macro to compare. */
static inline int esids_match(unsigned long addr1, unsigned long addr2) { int esid_1t_count; /* System is not 1T segment size capable. */ if (!mmu_has_feature(MMU_FTR_1T_SEGMENT)) return (GET_ESID(addr1) == GET_ESID(addr2)); esid_1t_count = (((addr1 >> SID_SHIFT_1T) != 0) + ((addr2 >> SID_SHIFT_1T) != 0)); /* both addresses are < 1T */ if (esid_1t_count == 0) return (GET_ESID(addr1) == GET_ESID(addr2)); /* One address < 1T, the other > 1T. Not a match */ if (esid_1t_count == 1) return 0; /* Both addresses are > 1T. */ return (GET_ESID_1T(addr1) == GET_ESID_1T(addr2)); }

Contributors

PersonTokensPropCommitsCommitProp
will schmidtwill schmidt10698.15%150.00%
matt evansmatt evans21.85%150.00%
Total108100.00%2100.00%

/* Flush all user entries from the segment table of the current processor. */
void switch_slb(struct task_struct *tsk, struct mm_struct *mm) { unsigned long offset; unsigned long slbie_data = 0; unsigned long pc = KSTK_EIP(tsk); unsigned long stack = KSTK_ESP(tsk); unsigned long exec_base; /* * We need interrupts hard-disabled here, not just soft-disabled, * so that a PMU interrupt can't occur, which might try to access * user memory (to get a stack trace) and possible cause an SLB miss * which would update the slb_cache/slb_cache_ptr fields in the PACA. */ hard_irq_disable(); offset = get_paca()->slb_cache_ptr; if (!mmu_has_feature(MMU_FTR_NO_SLBIE_B) && offset <= SLB_CACHE_ENTRIES) { int i; asm volatile("isync" : : : "memory"); for (i = 0; i < offset; i++) { slbie_data = (unsigned long)get_paca()->slb_cache[i] << SID_SHIFT; /* EA */ slbie_data |= user_segment_size(slbie_data) << SLBIE_SSIZE_SHIFT; slbie_data |= SLBIE_C; /* C set for user addresses */ asm volatile("slbie %0" : : "r" (slbie_data)); } asm volatile("isync" : : : "memory"); } else { __slb_flush_and_rebolt(); } /* Workaround POWER5 < DD2.1 issue */ if (offset == 1 || offset > SLB_CACHE_ENTRIES) asm volatile("slbie %0" : : "r" (slbie_data)); get_paca()->slb_cache_ptr = 0; copy_mm_to_paca(&mm->context); /* * preload some userspace segments into the SLB. * Almost all 32 and 64bit PowerPC executables are linked at * 0x10000000 so it makes sense to preload this segment. */ exec_base = 0x10000000; if (is_kernel_addr(pc) || is_kernel_addr(stack) || is_kernel_addr(exec_base)) return; slb_allocate(pc); if (!esids_match(pc, stack)) slb_allocate(stack); if (!esids_match(pc, exec_base) && !esids_match(stack, exec_base)) slb_allocate(exec_base); }

Contributors

PersonTokensPropCommitsCommitProp
paul mackerraspaul mackerras19082.25%433.33%
anton blanchardanton blanchard219.09%216.67%
will schmidtwill schmidt62.60%18.33%
michael neulingmichael neuling41.73%18.33%
olof johanssonolof johansson41.73%18.33%
michael ellermanmichael ellerman31.30%18.33%
matt evansmatt evans20.87%18.33%
david gibsondavid gibson10.43%18.33%
Total231100.00%12100.00%


static inline void patch_slb_encoding(unsigned int *insn_addr, unsigned int immed) { /* * This function patches either an li or a cmpldi instruction with * a new immediate value. This relies on the fact that both li * (which is actually addi) and cmpldi both take a 16-bit immediate * value, and it is situated in the same location in the instruction, * ie. bits 16-31 (Big endian bit order) or the lower 16 bits. * The signedness of the immediate operand differs between the two * instructions however this code is only ever patching a small value, * much less than 1 << 15, so we can get away with it. * To patch the value we read the existing instruction, clear the * immediate value, and or in our new value, then write the instruction * back. */ unsigned int insn = (*insn_addr & 0xffff0000) | immed; patch_instruction(insn_addr, insn); }

Contributors

PersonTokensPropCommitsCommitProp
benjamin herrenschmidtbenjamin herrenschmidt2259.46%125.00%
brian kingbrian king718.92%125.00%
anton blanchardanton blanchard616.22%125.00%
anshuman khandualanshuman khandual25.41%125.00%
Total37100.00%4100.00%

extern u32 slb_miss_kernel_load_linear[]; extern u32 slb_miss_kernel_load_io[]; extern u32 slb_compare_rr_to_size[]; extern u32 slb_miss_kernel_load_vmemmap[];
void slb_set_size(u16 size) { if (mmu_slb_size == size) return; mmu_slb_size = size; patch_slb_encoding(slb_compare_rr_to_size, mmu_slb_size); }

Contributors

PersonTokensPropCommitsCommitProp
brian kingbrian king26100.00%1100.00%
Total26100.00%1100.00%


void slb_initialize(void) { unsigned long linear_llp, vmalloc_llp, io_llp; unsigned long lflags, vflags; static int slb_encoding_inited; #ifdef CONFIG_SPARSEMEM_VMEMMAP unsigned long vmemmap_llp; #endif /* Prepare our SLB miss handler based on our page size */ linear_llp = mmu_psize_defs[mmu_linear_psize].sllp; io_llp = mmu_psize_defs[mmu_io_psize].sllp; vmalloc_llp = mmu_psize_defs[mmu_vmalloc_psize].sllp; get_paca()->vmalloc_sllp = SLB_VSID_KERNEL | vmalloc_llp; #ifdef CONFIG_SPARSEMEM_VMEMMAP vmemmap_llp = mmu_psize_defs[mmu_vmemmap_psize].sllp; #endif if (!slb_encoding_inited) { slb_encoding_inited = 1; patch_slb_encoding(slb_miss_kernel_load_linear, SLB_VSID_KERNEL | linear_llp); patch_slb_encoding(slb_miss_kernel_load_io, SLB_VSID_KERNEL | io_llp); patch_slb_encoding(slb_compare_rr_to_size, mmu_slb_size); pr_devel("SLB: linear LLP = %04lx\n", linear_llp); pr_devel("SLB: io LLP = %04lx\n", io_llp); #ifdef CONFIG_SPARSEMEM_VMEMMAP patch_slb_encoding(slb_miss_kernel_load_vmemmap, SLB_VSID_KERNEL | vmemmap_llp); pr_devel("SLB: vmemmap LLP = %04lx\n", vmemmap_llp); #endif } get_paca()->stab_rr = SLB_NUM_BOLTED; lflags = SLB_VSID_KERNEL | linear_llp; vflags = SLB_VSID_KERNEL | vmalloc_llp; /* Invalidate the entire SLB (even entry 0) & all the ERATS */ asm volatile("isync":::"memory"); asm volatile("slbmte %0,%0"::"r" (0) : "memory"); asm volatile("isync; slbia; isync":::"memory"); create_shadowed_slbe(PAGE_OFFSET, mmu_kernel_ssize, lflags, LINEAR_INDEX); create_shadowed_slbe(VMALLOC_START, mmu_kernel_ssize, vflags, VMALLOC_INDEX); /* For the boot cpu, we're running on the stack in init_thread_union, * which is in the first segment of the linear mapping, and also * get_paca()->kstack hasn't been initialized yet. * For secondary cpus, we need to bolt the kernel stack entry now. */ slb_shadow_clear(KSTACK_INDEX); if (raw_smp_processor_id() != boot_cpuid && (get_paca()->kstack & slb_esid_mask(mmu_kernel_ssize)) > PAGE_OFFSET) create_shadowed_slbe(get_paca()->kstack, mmu_kernel_ssize, lflags, KSTACK_INDEX); asm volatile("isync":::"memory"); }

Contributors

PersonTokensPropCommitsCommitProp
benjamin herrenschmidtbenjamin herrenschmidt11144.22%211.11%
paul mackerraspaul mackerras10140.24%633.33%
stephen rothwellstephen rothwell135.18%15.56%
michael neulingmichael neuling72.79%15.56%
david gibsondavid gibson62.39%211.11%
anshuman khandualanshuman khandual51.99%211.11%
michael ellermanmichael ellerman41.59%211.11%
olof johanssonolof johansson20.80%15.56%
geoffrey levandgeoffrey levand20.80%15.56%
Total251100.00%18100.00%


Overall Contributors

PersonTokensPropCommitsCommitProp
paul mackerraspaul mackerras49842.10%922.50%
benjamin herrenschmidtbenjamin herrenschmidt19116.15%25.00%
michael neulingmichael neuling1169.81%410.00%
will schmidtwill schmidt1169.81%25.00%
david gibsondavid gibson736.17%37.50%
anton blanchardanton blanchard594.99%512.50%
anshuman khandualanshuman khandual524.40%37.50%
brian kingbrian king332.79%12.50%
michael ellermanmichael ellerman181.52%410.00%
stephen rothwellstephen rothwell131.10%12.50%
olof johanssonolof johansson60.51%25.00%
matt evansmatt evans40.34%12.50%
geoffrey levandgeoffrey levand20.17%12.50%
alexander grafalexander graf10.08%12.50%
sankar psankar p10.08%12.50%
Total1183100.00%40100.00%
Directory: arch/powerpc/mm
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