Release 4.10 arch/x86/kernel/cpu/mcheck/therm_throt.c

Directory: arch/x86/kernel/cpu/mcheck
/*
 * Thermal throttle event support code (such as syslog messaging and rate
 * limiting) that was factored out from x86_64 (mce_intel.c) and i386 (p4.c).
 *
 * This allows consistent reporting of CPU thermal throttle events.
 *
 * Maintains a counter in /sys that keeps track of the number of thermal
 * events, such that the user knows how bad the thermal problem might be
 * (since the logging to syslog and mcelog is rate limited).
 *
 * Author: Dmitriy Zavin (dmitriyz@google.com)
 *
 * Credits: Adapted from Zwane Mwaikambo's original code in mce_intel.c.
 *          Inspired by Ross Biro's and Al Borchers' counter code.
 */
#include <linux/interrupt.h>
#include <linux/notifier.h>
#include <linux/jiffies.h>
#include <linux/kernel.h>
#include <linux/percpu.h>
#include <linux/export.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/smp.h>
#include <linux/cpu.h>

#include <asm/processor.h>
#include <asm/apic.h>
#include <asm/mce.h>
#include <asm/msr.h>
#include <asm/trace/irq_vectors.h>

/* How long to wait between reporting thermal events */

#define CHECK_INTERVAL		(300 * HZ)


#define THERMAL_THROTTLING_EVENT	0

#define POWER_LIMIT_EVENT		1

/*
 * Current thermal event state:
 */

struct _thermal_state {
	
bool			new_event;
	
int			event;
	
u64			next_check;
	
unsigned long		count;
	
unsigned long		last_count;
};


struct thermal_state {
	
struct _thermal_state core_throttle;
	
struct _thermal_state core_power_limit;
	
struct _thermal_state package_throttle;
	
struct _thermal_state package_power_limit;
	
struct _thermal_state core_thresh0;
	
struct _thermal_state core_thresh1;
	
struct _thermal_state pkg_thresh0;
	
struct _thermal_state pkg_thresh1;
};

/* Callback to handle core threshold interrupts */

int (*platform_thermal_notify)(__u64 msr_val);

EXPORT_SYMBOL(platform_thermal_notify);

/* Callback to handle core package threshold_interrupts */

int (*platform_thermal_package_notify)(__u64 msr_val);

EXPORT_SYMBOL_GPL(platform_thermal_package_notify);

/* Callback support of rate control, return true, if
 * callback has rate control */

bool (*platform_thermal_package_rate_control)(void);

EXPORT_SYMBOL_GPL(platform_thermal_package_rate_control);


static DEFINE_PER_CPU(struct thermal_state, thermal_state);


static atomic_t therm_throt_en	= ATOMIC_INIT(0);


static u32 lvtthmr_init __read_mostly;

#ifdef CONFIG_SYSFS

#define define_therm_throt_device_one_ro(_name)				\
	static DEVICE_ATTR(_name, 0444,                                 \
                           therm_throt_device_show_##_name,             \
                                   NULL)                                \

#define define_therm_throt_device_show_func(event, name)                \
                                                                        \
static ssize_t therm_throt_device_show_##event##_##name(                \
                        struct device *dev,                             \
                        struct device_attribute *attr,                  \
                        char *buf)                                      \
{                                                                       \
        unsigned int cpu = dev->id;                                     \
        ssize_t ret;                                                    \
                                                                        \
        preempt_disable();	/* CPU hotplug */			\
        if (cpu_online(cpu)) {                                          \
                ret = sprintf(buf, "%lu\n",                             \
                              per_cpu(thermal_state, cpu).event.name);  \
        } else                                                          \
                ret = 0;                                                \
        preempt_enable();                                               \
                                                                        \
        return ret;                                                     \
}

define_therm_throt_device_show_func(core_throttle, count);

define_therm_throt_device_one_ro(core_throttle_count);

define_therm_throt_device_show_func(core_power_limit, count);

define_therm_throt_device_one_ro(core_power_limit_count);

define_therm_throt_device_show_func(package_throttle, count);

define_therm_throt_device_one_ro(package_throttle_count);

define_therm_throt_device_show_func(package_power_limit, count);

define_therm_throt_device_one_ro(package_power_limit_count);


static struct attribute *thermal_throttle_attrs[] = {
	&dev_attr_core_throttle_count.attr,
	NULL
};


static struct attribute_group thermal_attr_group = {
	.attrs	= thermal_throttle_attrs,
	.name	= "thermal_throttle"
};
#endif /* CONFIG_SYSFS */


#define CORE_LEVEL	0

#define PACKAGE_LEVEL	1

/***
 * therm_throt_process - Process thermal throttling event from interrupt
 * @curr: Whether the condition is current or not (boolean), since the
 *        thermal interrupt normally gets called both when the thermal
 *        event begins and once the event has ended.
 *
 * This function is called by the thermal interrupt after the
 * IRQ has been acknowledged.
 *
 * It will take care of rate limiting and printing messages to the syslog.
 *
 * Returns: 0 : Event should NOT be further logged, i.e. still in
 *              "timeout" from previous log message.
 *          1 : Event should be logged further, and a message has been
 *              printed to the syslog.
 */


static int therm_throt_process(bool new_event, int event, int level)
{
	struct _thermal_state *state;
	unsigned int this_cpu = smp_processor_id();
	bool old_event;
	u64 now;
	struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu);

	now = get_jiffies_64();
	if (level == CORE_LEVEL) {
		if (event == THERMAL_THROTTLING_EVENT)
			state = &pstate->core_throttle;
		else if (event == POWER_LIMIT_EVENT)
			state = &pstate->core_power_limit;
		else
			 return 0;
	} else if (level == PACKAGE_LEVEL) {
		if (event == THERMAL_THROTTLING_EVENT)
			state = &pstate->package_throttle;
		else if (event == POWER_LIMIT_EVENT)
			state = &pstate->package_power_limit;
		else
			return 0;
	} else
		return 0;

	old_event = state->new_event;
	state->new_event = new_event;

	if (new_event)
		state->count++;

	if (time_before64(now, state->next_check) &&
			state->count != state->last_count)
		return 0;

	state->next_check = now + CHECK_INTERVAL;
	state->last_count = state->count;

	/* if we just entered the thermal event */
	if (new_event) {
		if (event == THERMAL_THROTTLING_EVENT)
			pr_crit("CPU%d: %s temperature above threshold, cpu clock throttled (total events = %lu)\n",
				this_cpu,
				level == CORE_LEVEL ? "Core" : "Package",
				state->count);
		return 1;
	}
	if (old_event) {
		if (event == THERMAL_THROTTLING_EVENT)
			pr_info("CPU%d: %s temperature/speed normal\n", this_cpu,
				level == CORE_LEVEL ? "Core" : "Package");
		return 1;
	}

	return 0;
}

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hugh dickins hugh dickins 7 2.68% 1 9.09%
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hidetoshi seto hidetoshi seto 1 0.38% 1 9.09%
Total 261 100.00% 11 100.00%



static int thresh_event_valid(int level, int event)
{
	struct _thermal_state *state;
	unsigned int this_cpu = smp_processor_id();
	struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu);
	u64 now = get_jiffies_64();

	if (level == PACKAGE_LEVEL)
		state = (event == 0) ? &pstate->pkg_thresh0 :
						&pstate->pkg_thresh1;
	else
		state = (event == 0) ? &pstate->core_thresh0 :
						&pstate->core_thresh1;

	if (time_before64(now, state->next_check))
		return 0;

	state->next_check = now + CHECK_INTERVAL;

	return 1;
}

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static bool int_pln_enable;


static int __init int_pln_enable_setup(char *s)
{
	int_pln_enable = true;

	return 1;
}
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__setup("int_pln_enable", int_pln_enable_setup);

#ifdef CONFIG_SYSFS
/* Add/Remove thermal_throttle interface for CPU device: */


static int thermal_throttle_add_dev(struct device *dev, unsigned int cpu)
{
	int err;
	struct cpuinfo_x86 *c = &cpu_data(cpu);

	err = sysfs_create_group(&dev->kobj, &thermal_attr_group);
	if (err)
		return err;

	if (cpu_has(c, X86_FEATURE_PLN) && int_pln_enable)
		err = sysfs_add_file_to_group(&dev->kobj,
					      &dev_attr_core_power_limit_count.attr,
					      thermal_attr_group.name);
	if (cpu_has(c, X86_FEATURE_PTS)) {
		err = sysfs_add_file_to_group(&dev->kobj,
					      &dev_attr_package_throttle_count.attr,
					      thermal_attr_group.name);
		if (cpu_has(c, X86_FEATURE_PLN) && int_pln_enable)
			err = sysfs_add_file_to_group(&dev->kobj,
					&dev_attr_package_power_limit_count.attr,
					thermal_attr_group.name);
	}

	return err;
}

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Total 142 100.00% 7 100.00%



static void thermal_throttle_remove_dev(struct device *dev)
{
	sysfs_remove_group(&dev->kobj, &thermal_attr_group);
}

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/* Get notified when a cpu comes on/off. Be hotplug friendly. */


static int thermal_throttle_online(unsigned int cpu)
{
	struct device *dev = get_cpu_device(cpu);

	return thermal_throttle_add_dev(dev, cpu);
}

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akinobu mita akinobu mita 1 3.57% 1 16.67%
Total 28 100.00% 6 100.00%



static int thermal_throttle_offline(unsigned int cpu)
{
	struct device *dev = get_cpu_device(cpu);

	thermal_throttle_remove_dev(dev);
	return 0;
}

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thomas gleixner thomas gleixner 1 3.57% 1 20.00%
Total 28 100.00% 5 100.00%



static __init int thermal_throttle_init_device(void)
{
	int ret;

	if (!atomic_read(&therm_throt_en))
		return 0;

	ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "x86/therm:online",
				thermal_throttle_online,
				thermal_throttle_offline);
	return ret < 0 ? ret : 0;
}
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stephen hemminger stephen hemminger 2 4.35% 1 16.67%
srivatsa s. bhat srivatsa s. bhat 2 4.35% 1 16.67%
sergey senozhatsky sergey senozhatsky 1 2.17% 1 16.67%
Total 46 100.00% 6 100.00%


device_initcall(thermal_throttle_init_device);

#endif /* CONFIG_SYSFS */



static void notify_package_thresholds(__u64 msr_val)
{
	bool notify_thres_0 = false;
	bool notify_thres_1 = false;

	if (!platform_thermal_package_notify)
		return;

	/* lower threshold check */
	if (msr_val & THERM_LOG_THRESHOLD0)
		notify_thres_0 = true;
	/* higher threshold check */
	if (msr_val & THERM_LOG_THRESHOLD1)
		notify_thres_1 = true;

	if (!notify_thres_0 && !notify_thres_1)
		return;

	if (platform_thermal_package_rate_control &&
		platform_thermal_package_rate_control()) {
		/* Rate control is implemented in callback */
		platform_thermal_package_notify(msr_val);
		return;
	}

	/* lower threshold reached */
	if (notify_thres_0 && thresh_event_valid(PACKAGE_LEVEL, 0))
		platform_thermal_package_notify(msr_val);
	/* higher threshold reached */
	if (notify_thres_1 && thresh_event_valid(PACKAGE_LEVEL, 1))
		platform_thermal_package_notify(msr_val);
}

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static void notify_thresholds(__u64 msr_val)
{
	/* check whether the interrupt handler is defined;
         * otherwise simply return
         */
	if (!platform_thermal_notify)
		return;

	/* lower threshold reached */
	if ((msr_val & THERM_LOG_THRESHOLD0) &&
			thresh_event_valid(CORE_LEVEL, 0))
		platform_thermal_notify(msr_val);
	/* higher threshold reached */
	if ((msr_val & THERM_LOG_THRESHOLD1) &&
			thresh_event_valid(CORE_LEVEL, 1))
		platform_thermal_notify(msr_val);
}

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/* Thermal transition interrupt handler */


static void intel_thermal_interrupt(void)
{
	__u64 msr_val;

	if (static_cpu_has(X86_FEATURE_HWP))
		wrmsrl_safe(MSR_HWP_STATUS, 0);

	rdmsrl(MSR_IA32_THERM_STATUS, msr_val);

	/* Check for violation of core thermal thresholds*/
	notify_thresholds(msr_val);

	if (therm_throt_process(msr_val & THERM_STATUS_PROCHOT,
				THERMAL_THROTTLING_EVENT,
				CORE_LEVEL) != 0)
		mce_log_therm_throt_event(msr_val);

	if (this_cpu_has(X86_FEATURE_PLN) && int_pln_enable)
		therm_throt_process(msr_val & THERM_STATUS_POWER_LIMIT,
					POWER_LIMIT_EVENT,
					CORE_LEVEL);

	if (this_cpu_has(X86_FEATURE_PTS)) {
		rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val);
		/* check violations of package thermal thresholds */
		notify_package_thresholds(msr_val);
		therm_throt_process(msr_val & PACKAGE_THERM_STATUS_PROCHOT,
					THERMAL_THROTTLING_EVENT,
					PACKAGE_LEVEL);
		if (this_cpu_has(X86_FEATURE_PLN) && int_pln_enable)
			therm_throt_process(msr_val &
					PACKAGE_THERM_STATUS_POWER_LIMIT,
					POWER_LIMIT_EVENT,
					PACKAGE_LEVEL);
	}
}

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static void unexpected_thermal_interrupt(void)
{
	pr_err("CPU%d: Unexpected LVT thermal interrupt!\n",
		smp_processor_id());
}

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Total 16 100.00% 3 100.00%


static void (*smp_thermal_vector)(void) = unexpected_thermal_interrupt;



static inline void __smp_thermal_interrupt(void)
{
	inc_irq_stat(irq_thermal_count);
	smp_thermal_vector();
}

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asmlinkage __visible void smp_thermal_interrupt(struct pt_regs *regs)
{
	entering_irq();
	__smp_thermal_interrupt();
	exiting_ack_irq();
}

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asmlinkage __visible void smp_trace_thermal_interrupt(struct pt_regs *regs)
{
	entering_irq();
	trace_thermal_apic_entry(THERMAL_APIC_VECTOR);
	__smp_thermal_interrupt();
	trace_thermal_apic_exit(THERMAL_APIC_VECTOR);
	exiting_ack_irq();
}

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/* Thermal monitoring depends on APIC, ACPI and clock modulation */


static int intel_thermal_supported(struct cpuinfo_x86 *c)
{
	if (!boot_cpu_has(X86_FEATURE_APIC))
		return 0;
	if (!cpu_has(c, X86_FEATURE_ACPI) || !cpu_has(c, X86_FEATURE_ACC))
		return 0;
	return 1;
}

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void __init mcheck_intel_therm_init(void)
{
	/*
         * This function is only called on boot CPU. Save the init thermal
         * LVT value on BSP and use that value to restore APs' thermal LVT
         * entry BIOS programmed later
         */
	if (intel_thermal_supported(&boot_cpu_data))
		lvtthmr_init = apic_read(APIC_LVTTHMR);
}

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void intel_init_thermal(struct cpuinfo_x86 *c)
{
	unsigned int cpu = smp_processor_id();
	int tm2 = 0;
	u32 l, h;

	if (!intel_thermal_supported(c))
		return;

	/*
         * First check if its enabled already, in which case there might
         * be some SMM goo which handles it, so we can't even put a handler
         * since it might be delivered via SMI already:
         */
	rdmsr(MSR_IA32_MISC_ENABLE, l, h);

	h = lvtthmr_init;
	/*
         * The initial value of thermal LVT entries on all APs always reads
         * 0x10000 because APs are woken up by BSP issuing INIT-SIPI-SIPI
         * sequence to them and LVT registers are reset to 0s except for
         * the mask bits which are set to 1s when APs receive INIT IPI.
         * If BIOS takes over the thermal interrupt and sets its interrupt
         * delivery mode to SMI (not fixed), it restores the value that the
         * BIOS has programmed on AP based on BSP's info we saved since BIOS
         * is always setting the same value for all threads/cores.
         */
	if ((h & APIC_DM_FIXED_MASK) != APIC_DM_FIXED)
		apic_write(APIC_LVTTHMR, lvtthmr_init);


	if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
		if (system_state == SYSTEM_BOOTING)
			pr_debug("CPU%d: Thermal monitoring handled by SMI\n", cpu);
		return;
	}

	/* early Pentium M models use different method for enabling TM2 */
	if (cpu_has(c, X86_FEATURE_TM2)) {
		if (c->x86 == 6 && (c->x86_model == 9 || c->x86_model == 13)) {
			rdmsr(MSR_THERM2_CTL, l, h);
			if (l & MSR_THERM2_CTL_TM_SELECT)
				tm2 = 1;
		} else if (l & MSR_IA32_MISC_ENABLE_TM2)
			tm2 = 1;
	}

	/* We'll mask the thermal vector in the lapic till we're ready: */
	h = THERMAL_APIC_VECTOR | APIC_DM_FIXED | APIC_LVT_MASKED;
	apic_write(APIC_LVTTHMR, h);

	rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
	if (cpu_has(c, X86_FEATURE_PLN) && !int_pln_enable)
		wrmsr(MSR_IA32_THERM_INTERRUPT,
			(l | (THERM_INT_LOW_ENABLE
			| THERM_INT_HIGH_ENABLE)) & ~THERM_INT_PLN_ENABLE, h);
	else if (cpu_has(c, X86_FEATURE_PLN) && int_pln_enable)
		wrmsr(MSR_IA32_THERM_INTERRUPT,
			l | (THERM_INT_LOW_ENABLE
			| THERM_INT_HIGH_ENABLE | THERM_INT_PLN_ENABLE), h);
	else
		wrmsr(MSR_IA32_THERM_INTERRUPT,
		      l | (THERM_INT_LOW_ENABLE | THERM_INT_HIGH_ENABLE), h);

	if (cpu_has(c, X86_FEATURE_PTS)) {
		rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
		if (cpu_has(c, X86_FEATURE_PLN) && !int_pln_enable)
			wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
				(l | (PACKAGE_THERM_INT_LOW_ENABLE
				| PACKAGE_THERM_INT_HIGH_ENABLE))
				& ~PACKAGE_THERM_INT_PLN_ENABLE, h);
		else if (cpu_has(c, X86_FEATURE_PLN) && int_pln_enable)
			wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
				l | (PACKAGE_THERM_INT_LOW_ENABLE
				| PACKAGE_THERM_INT_HIGH_ENABLE
				| PACKAGE_THERM_INT_PLN_ENABLE), h);
		else
			wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
			      l | (PACKAGE_THERM_INT_LOW_ENABLE
				| PACKAGE_THERM_INT_HIGH_ENABLE), h);
	}

	smp_thermal_vector = intel_thermal_interrupt;

	rdmsr(MSR_IA32_MISC_ENABLE, l, h);
	wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);

	/* Unmask the thermal vector: */
	l = apic_read(APIC_LVTTHMR);
	apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);

	pr_info_once("CPU0: Thermal monitoring enabled (%s)\n",
		      tm2 ? "TM2" : "TM1");

	/* enable thermal throttle processing */
	atomic_set(&therm_throt_en, 1);
}
Contributors
Person Tokens Prop Commits CommitProp
hidetoshi seto hidetoshi seto 173 40.71% 3 25.00%
fenghua yu fenghua yu 159 37.41% 3 25.00%
bartlomiej zolnierkiewicz bartlomiej zolnierkiewicz 66 15.53% 1 8.33%
youquan song youquan song 15 3.53% 1 8.33%
rakib mullick rakib mullick 6 1.41% 1 8.33%
yong wang yong wang 3 0.71% 1 8.33%
chen yucong chen yucong 2 0.47% 1 8.33%
mike travis mike travis 1 0.24% 1 8.33%
Total 425 100.00% 12 100.00%

Overall Contributors
Person Tokens Prop Commits CommitProp
fenghua yu fenghua yu 606 32.51% 4 9.30%
hidetoshi seto hidetoshi seto 315 16.90% 5 11.63%
dmitriy zavin dmitriy zavin 213 11.43% 3 6.98%
srinivas pandruvada srinivas pandruvada 197 10.57% 2 4.65%
durgadoss r durgadoss r 162 8.69% 1 2.33%
ingo molnar ingo molnar 74 3.97% 3 6.98%
bartlomiej zolnierkiewicz bartlomiej zolnierkiewicz 66 3.54% 1 2.33%
seiji aguchi seiji aguchi 53 2.84% 2 4.65%
yong wang yong wang 32 1.72% 1 2.33%
kay sievers kay sievers 28 1.50% 1 2.33%
sebastian andrzej siewior sebastian andrzej siewior 26 1.39% 1 2.33%
youquan song youquan song 15 0.80% 1 2.33%
thomas gleixner thomas gleixner 14 0.75% 1 2.33%
dmitry torokhov dmitry torokhov 10 0.54% 1 2.33%
sergey senozhatsky sergey senozhatsky 8 0.43% 1 2.33%
hugh dickins hugh dickins 7 0.38% 1 2.33%
rakib mullick rakib mullick 6 0.32% 1 2.33%
chen yucong chen yucong 5 0.27% 1 2.33%
stephen hemminger stephen hemminger 5 0.27% 1 2.33%
borislav petkov borislav petkov 4 0.21% 1 2.33%
paul gortmaker paul gortmaker 3 0.16% 1 2.33%
jin dongming jin dongming 3 0.16% 2 4.65%
christoph lameter christoph lameter 3 0.16% 1 2.33%
srivatsa s. bhat srivatsa s. bhat 2 0.11% 1 2.33%
andi kleen andi kleen 2 0.11% 1 2.33%
al viro al viro 2 0.11% 1 2.33%
akinobu mita akinobu mita 1 0.05% 1 2.33%
harvey harrison harvey harrison 1 0.05% 1 2.33%
mike travis mike travis 1 0.05% 1 2.33%
Total 1864 100.00% 43 100.00%
Directory: arch/x86/kernel/cpu/mcheck

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	Person	Tokens	Prop	Commits	CommitProp
fenghua yu	fenghua yu	148	56.70%	2	18.18%
ingo molnar	ingo molnar	51	19.54%	2	18.18%
dmitriy zavin	dmitriy zavin	48	18.39%	3	27.27%
hugh dickins	hugh dickins	7	2.68%	1	9.09%
dmitry torokhov	dmitry torokhov	4	1.53%	1	9.09%
chen yucong	chen yucong	2	0.77%	1	9.09%
hidetoshi seto	hidetoshi seto	1	0.38%	1	9.09%
	Total	261	100.00%	11	100.00%
cregit-Linux how code gets into the kernel

Release 4.10 arch/x86/kernel/cpu/mcheck/therm_throt.c

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