Release 4.10 drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk20a.c
/*
* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include <subdev/ibus.h>
#include <subdev/timer.h>
static void
gk20a_ibus_init_ibus_ring(struct nvkm_subdev *ibus)
{
struct nvkm_device *device = ibus->device;
nvkm_mask(device, 0x137250, 0x3f, 0);
nvkm_mask(device, 0x000200, 0x20, 0);
udelay(20);
nvkm_mask(device, 0x000200, 0x20, 0x20);
nvkm_wr32(device, 0x12004c, 0x4);
nvkm_wr32(device, 0x122204, 0x2);
nvkm_rd32(device, 0x122204);
/*
* Bug: increase clock timeout to avoid operation failure at high
* gpcclk rate.
*/
nvkm_wr32(device, 0x122354, 0x800);
nvkm_wr32(device, 0x128328, 0x800);
nvkm_wr32(device, 0x124320, 0x800);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| alexandre courbot | alexandre courbot | 80 | 72.07% | 3 | 50.00% |
| ben skeggs | ben skeggs | 31 | 27.93% | 3 | 50.00% |
| Total | 111 | 100.00% | 6 | 100.00% |
static void
gk20a_ibus_intr(struct nvkm_subdev *ibus)
{
struct nvkm_device *device = ibus->device;
u32 status0 = nvkm_rd32(device, 0x120058);
if (status0 & 0x7) {
nvkm_debug(ibus, "resetting ibus ring\n");
gk20a_ibus_init_ibus_ring(ibus);
}
/* Acknowledge interrupt */
nvkm_mask(device, 0x12004c, 0x2, 0x2);
nvkm_msec(device, 2000,
if (!(nvkm_rd32(device, 0x12004c) & 0x0000003f))
break;
);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| alexandre courbot | alexandre courbot | 47 | 62.67% | 1 | 14.29% |
| ben skeggs | ben skeggs | 28 | 37.33% | 6 | 85.71% |
| Total | 75 | 100.00% | 7 | 100.00% |
static int
gk20a_ibus_init(struct nvkm_subdev *ibus)
{
gk20a_ibus_init_ibus_ring(ibus);
return 0;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| alexandre courbot | alexandre courbot | 15 | 78.95% | 1 | 33.33% |
| ben skeggs | ben skeggs | 4 | 21.05% | 2 | 66.67% |
| Total | 19 | 100.00% | 3 | 100.00% |
static const struct nvkm_subdev_func
gk20a_ibus = {
.init = gk20a_ibus_init,
.intr = gk20a_ibus_intr,
};
int
gk20a_ibus_new(struct nvkm_device *device, int index,
struct nvkm_subdev **pibus)
{
struct nvkm_subdev *ibus;
if (!(ibus = *pibus = kzalloc(sizeof(*ibus), GFP_KERNEL)))
return -ENOMEM;
nvkm_subdev_ctor(&gk20a_ibus, device, index, ibus);
return 0;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| ben skeggs | ben skeggs | 36 | 56.25% | 2 | 66.67% |
| alexandre courbot | alexandre courbot | 28 | 43.75% | 1 | 33.33% |
| Total | 64 | 100.00% | 3 | 100.00% |
Overall Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| alexandre courbot | alexandre courbot | 178 | 60.54% | 3 | 33.33% |
| ben skeggs | ben skeggs | 116 | 39.46% | 6 | 66.67% |
| Total | 294 | 100.00% | 9 | 100.00% |
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