/* * OMAP2-specific DPLL control functions * * Copyright (C) 2011 Nokia Corporation * Paul Walmsley * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #include <linux/kernel.h> #include <linux/errno.h> #include <linux/clk.h> #include <linux/io.h> #include "clock.h" #include "cm2xxx.h" #include "cm-regbits-24xx.h" /* Private functions */ /** * _allow_idle - enable DPLL autoidle bits * @clk: struct clk * of the DPLL to operate on * * Enable DPLL automatic idle control. The DPLL will enter low-power * stop when its downstream clocks are gated. No return value. * REVISIT: DPLL can optionally enter low-power bypass by writing 0x1 * instead. Add some mechanism to optionally enter this mode. */
static void _allow_idle(struct clk_hw_omap *clk) { if (!clk || !clk->dpll_data) return; omap2xxx_cm_set_dpll_auto_low_power_stop(); }Contributors
Person | Tokens | Prop | Commits | CommitProp |
Paul Walmsley | 20 | 80.00% | 1 | 33.33% |
Rajendra Nayak | 5 | 20.00% | 2 | 66.67% |
Total | 25 | 100.00% | 3 | 100.00% |
Person | Tokens | Prop | Commits | CommitProp |
Paul Walmsley | 20 | 80.00% | 1 | 33.33% |
Rajendra Nayak | 5 | 20.00% | 2 | 66.67% |
Total | 25 | 100.00% | 3 | 100.00% |
Person | Tokens | Prop | Commits | CommitProp |
Paul Walmsley | 66 | 70.97% | 2 | 50.00% |
Rajendra Nayak | 27 | 29.03% | 2 | 50.00% |
Total | 93 | 100.00% | 4 | 100.00% |