cregit-Linux how code gets into the kernel

Release 4.11 arch/arm/mach-pxa/mfp-pxa3xx.c

/*
 * linux/arch/arm/mach-pxa/mfp.c
 *
 * PXA3xx Multi-Function Pin Support
 *
 * Copyright (C) 2007 Marvell Internation Ltd.
 *
 * 2007-08-21: eric miao <eric.miao@marvell.com>
 *             initial version
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License version 2 as
 *  published by the Free Software Foundation.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/syscore_ops.h>

#include <mach/hardware.h>
#include "mfp-pxa3xx.h"
#include <mach/pxa3xx-regs.h>

#ifdef CONFIG_PM
/*
 * Configure the MFPs appropriately for suspend/resume.
 * FIXME: this should probably depend on which system state we're
 * entering - for instance, we might not want to place MFP pins in
 * a pull-down mode if they're an active low chip select, and we're
 * just entering standby.
 */

static int pxa3xx_mfp_suspend(void) { mfp_config_lpm(); return 0; }

Contributors

PersonTokensPropCommitsCommitProp
Russell King1178.57%133.33%
Eric Miao214.29%133.33%
Rafael J. Wysocki17.14%133.33%
Total14100.00%3100.00%


static void pxa3xx_mfp_resume(void) { mfp_config_run(); /* clear RDH bit when MFP settings are restored * * NOTE: the last 3 bits DxS are write-1-to-clear so carefully * preserve them here in case they will be referenced later */ ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S); }

Contributors

PersonTokensPropCommitsCommitProp
Eric Miao1664.00%250.00%
Russell King728.00%125.00%
Rafael J. Wysocki28.00%125.00%
Total25100.00%4100.00%

#else #define pxa3xx_mfp_suspend NULL #define pxa3xx_mfp_resume NULL #endif struct syscore_ops pxa3xx_mfp_syscore_ops = { .suspend = pxa3xx_mfp_suspend, .resume = pxa3xx_mfp_resume, };

Overall Contributors

PersonTokensPropCommitsCommitProp
Eric Miao5052.08%660.00%
Russell King3940.62%220.00%
Rafael J. Wysocki66.25%110.00%
Arnd Bergmann11.04%110.00%
Total96100.00%10100.00%
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