Release 4.11 arch/arm/mach-spear/spear13xx.c
/*
* arch/arm/mach-spear13xx/spear13xx.c
*
* SPEAr13XX machines common source file
*
* Copyright (C) 2012 ST Microelectronics
* Viresh Kumar <vireshk@kernel.org>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#define pr_fmt(fmt) "SPEAr13xx: " fmt
#include <linux/amba/pl022.h>
#include <linux/clk.h>
#include <linux/clocksource.h>
#include <linux/err.h>
#include <linux/of.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/mach/map.h>
#include <mach/spear.h>
#include "generic.h"
void __init spear13xx_l2x0_init(void)
{
/*
* 512KB (64KB/way), 8-way associativity, parity supported
*
* FIXME: 9th bit, of Auxillary Controller register must be set
* for some spear13xx devices for stable L2 operation.
*
* Enable Early BRESP, L2 prefetch for Instruction and Data,
* write alloc and 'Full line of zero' options
*
*/
if (!IS_ENABLED(CONFIG_CACHE_L2X0))
return;
writel_relaxed(0x06, VA_L2CC_BASE + L310_PREFETCH_CTRL);
/*
* Program following latencies in order to make
* SPEAr1340 work at 600 MHz
*/
writel_relaxed(0x221, VA_L2CC_BASE + L310_TAG_LATENCY_CTRL);
writel_relaxed(0x441, VA_L2CC_BASE + L310_DATA_LATENCY_CTRL);
l2x0_init(VA_L2CC_BASE, 0x30a00001, 0xfe0fffff);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Viresh Kumar | 41 | 74.55% | 1 | 25.00% |
| Arnd Bergmann | 9 | 16.36% | 1 | 25.00% |
| Russell King | 5 | 9.09% | 2 | 50.00% |
| Total | 55 | 100.00% | 4 | 100.00% |
/*
* Following will create 16MB static virtual/physical mappings
* PHYSICAL VIRTUAL
* 0xB3000000 0xF9000000
* 0xE0000000 0xFD000000
* 0xEC000000 0xFC000000
* 0xED000000 0xFB000000
*/
static struct map_desc spear13xx_io_desc[] __initdata = {
{
.virtual = (unsigned long)VA_PERIP_GRP2_BASE,
.pfn = __phys_to_pfn(PERIP_GRP2_BASE),
.length = SZ_16M,
.type = MT_DEVICE
}, {
.virtual = (unsigned long)VA_PERIP_GRP1_BASE,
.pfn = __phys_to_pfn(PERIP_GRP1_BASE),
.length = SZ_16M,
.type = MT_DEVICE
}, {
.virtual = (unsigned long)VA_A9SM_AND_MPMC_BASE,
.pfn = __phys_to_pfn(A9SM_AND_MPMC_BASE),
.length = SZ_16M,
.type = MT_DEVICE
}, {
.virtual = (unsigned long)VA_L2CC_BASE,
.pfn = __phys_to_pfn(L2CC_BASE),
.length = SZ_4K,
.type = MT_DEVICE
},
};
/* This will create static memory mapping for selected devices */
void __init spear13xx_map_io(void)
{
iotable_init(spear13xx_io_desc, ARRAY_SIZE(spear13xx_io_desc));
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Viresh Kumar | 18 | 100.00% | 1 | 100.00% |
| Total | 18 | 100.00% | 1 | 100.00% |
static void __init spear13xx_clk_init(void)
{
if (of_machine_is_compatible("st,spear1310"))
spear1310_clk_init(VA_MISC_BASE, VA_SPEAR1310_RAS_BASE);
else if (of_machine_is_compatible("st,spear1340"))
spear1340_clk_init(VA_MISC_BASE);
else
pr_err("%s: Unknown machine\n", __func__);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Viresh Kumar | 36 | 81.82% | 1 | 50.00% |
| Arnd Bergmann | 8 | 18.18% | 1 | 50.00% |
| Total | 44 | 100.00% | 2 | 100.00% |
void __init spear13xx_timer_init(void)
{
char pclk_name[] = "osc_24m_clk";
struct clk *gpt_clk, *pclk;
spear13xx_clk_init();
/* get the system timer clock */
gpt_clk = clk_get_sys("gpt0", NULL);
if (IS_ERR(gpt_clk)) {
pr_err("%s:couldn't get clk for gpt\n", __func__);
BUG();
}
/* get the suitable parent clock for timer*/
pclk = clk_get(NULL, pclk_name);
if (IS_ERR(pclk)) {
pr_err("%s:couldn't get %s as parent for gpt\n", __func__,
pclk_name);
BUG();
}
clk_set_parent(gpt_clk, pclk);
clk_put(gpt_clk);
clk_put(pclk);
spear_setup_of_timer();
clocksource_probe();
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Viresh Kumar | 107 | 99.07% | 1 | 50.00% |
| Marc Zyngier | 1 | 0.93% | 1 | 50.00% |
| Total | 108 | 100.00% | 2 | 100.00% |
Overall Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Viresh Kumar | 344 | 88.89% | 2 | 14.29% |
| Arnd Bergmann | 31 | 8.01% | 5 | 35.71% |
| Russell King | 5 | 1.29% | 2 | 14.29% |
| Rob Herring | 4 | 1.03% | 2 | 14.29% |
| Pratyush Anand | 1 | 0.26% | 1 | 7.14% |
| Sachin Kamat | 1 | 0.26% | 1 | 7.14% |
| Marc Zyngier | 1 | 0.26% | 1 | 7.14% |
| Total | 387 | 100.00% | 14 | 100.00% |
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