Release 4.11 arch/x86/kernel/irqinit.c
#include <linux/linkage.h>
#include <linux/errno.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/ioport.h>
#include <linux/interrupt.h>
#include <linux/timex.h>
#include <linux/random.h>
#include <linux/kprobes.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/device.h>
#include <linux/bitops.h>
#include <linux/acpi.h>
#include <linux/io.h>
#include <linux/delay.h>
#include <linux/atomic.h>
#include <asm/timer.h>
#include <asm/hw_irq.h>
#include <asm/pgtable.h>
#include <asm/desc.h>
#include <asm/apic.h>
#include <asm/setup.h>
#include <asm/i8259.h>
#include <asm/traps.h>
#include <asm/prom.h>
/*
* ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts:
* (these are usually mapped to vectors 0x30-0x3f)
*/
/*
* The IO-APIC gives us many more interrupt sources. Most of these
* are unused but an SMP system is supposed to have enough memory ...
* sometimes (mostly wrt. hw bugs) we get corrupted vectors all
* across the spectrum, so we really want to be prepared to get all
* of these. Plus, more powerful systems might have more than 64
* IO-APIC registers.
*
* (these are usually mapped into the 0x30-0xff vector range)
*/
/*
* IRQ2 is cascade interrupt to second interrupt controller
*/
static struct irqaction irq2 = {
.handler = no_action,
.name = "cascade",
.flags = IRQF_NO_THREAD,
};
DEFINE_PER_CPU(vector_irq_t, vector_irq) = {
[0 ... NR_VECTORS - 1] = VECTOR_UNUSED,
};
int vector_used_by_percpu_irq(unsigned int vector)
{
int cpu;
for_each_online_cpu(cpu) {
if (!IS_ERR_OR_NULL(per_cpu(vector_irq, cpu)[vector]))
return 1;
}
return 0;
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Yinghai Lu | 36 | 90.00% | 1 | 50.00% |
Thomas Gleixner | 4 | 10.00% | 1 | 50.00% |
Total | 40 | 100.00% | 2 | 100.00% |
void __init init_ISA_irqs(void)
{
struct irq_chip *chip = legacy_pic->chip;
int i;
#if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC)
init_bsp_APIC();
#endif
legacy_pic->init(0);
for (i = 0; i < nr_legacy_irqs(); i++)
irq_set_chip_and_handler(i, chip, handle_level_irq);
}
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Linus Torvalds (pre-git) | 27 | 40.91% | 1 | 10.00% |
Pekka J Enberg | 13 | 19.70% | 1 | 10.00% |
Thomas Gleixner | 10 | 15.15% | 1 | 10.00% |
Andi Kleen | 7 | 10.61% | 1 | 10.00% |
Jacob jun Pan | 3 | 4.55% | 1 | 10.00% |
Ingo Molnar | 2 | 3.03% | 1 | 10.00% |
Yinghai Lu | 2 | 3.03% | 2 | 20.00% |
Maciej W. Rozycki | 1 | 1.52% | 1 | 10.00% |
Jiang Liu | 1 | 1.52% | 1 | 10.00% |
Total | 66 | 100.00% | 10 | 100.00% |
void __init init_IRQ(void)
{
int i;
/*
* On cpu 0, Assign ISA_IRQ_VECTOR(irq) to IRQ 0..15.
* If these IRQ's are handled by legacy interrupt-controllers like PIC,
* then this configuration will likely be static after the boot. If
* these IRQ's are handled by more mordern controllers like IO-APIC,
* then this vector space can be freed and re-used dynamically as the
* irq's migrate etc.
*/
for (i = 0; i < nr_legacy_irqs(); i++)
per_cpu(vector_irq, 0)[ISA_IRQ_VECTOR(i)] = irq_to_desc(i);
x86_init.irqs.intr_init();
}
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Suresh B. Siddha | 28 | 54.90% | 1 | 14.29% |
Thomas Gleixner | 13 | 25.49% | 3 | 42.86% |
Glauber de Oliveira Costa | 5 | 9.80% | 1 | 14.29% |
Brian Gerst | 4 | 7.84% | 1 | 14.29% |
Jiang Liu | 1 | 1.96% | 1 | 14.29% |
Total | 51 | 100.00% | 7 | 100.00% |
static void __init smp_intr_init(void)
{
#ifdef CONFIG_SMP
/*
* The reschedule interrupt is a CPU-to-CPU reschedule-helper
* IPI, driven by wakeup.
*/
alloc_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt);
/* IPI for generic function call */
alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);
/* IPI for generic single function call */
alloc_intr_gate(CALL_FUNCTION_SINGLE_VECTOR,
call_function_single_interrupt);
/* Low priority IPI to cleanup after moving an irq */
set_intr_gate(IRQ_MOVE_CLEANUP_VECTOR, irq_move_cleanup_interrupt);
set_bit(IRQ_MOVE_CLEANUP_VECTOR, used_vectors);
/* IPI used for rebooting/stopping */
alloc_intr_gate(REBOOT_VECTOR, reboot_interrupt);
#endif /* CONFIG_SMP */
}
Contributors
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Cyrill V. Gorcunov | 24 | 38.71% | 1 | 11.11% |
Yinghai Lu | 17 | 27.42% | 3 | 33.33% |
Andi Kleen | 17 | 27.42% | 2 | 22.22% |
Glauber de Oliveira Costa | 2 | 3.23% | 1 | 11.11% |
Ingo Molnar | 1 | 1.61% | 1 | 11.11% |
Pekka J Enberg | 1 | 1.61% | 1 | 11.11% |
Total | 62 | 100.00% | 9 | 100.00% |
static void __init apic_intr_init(void)
{
smp_intr_init();
#ifdef CONFIG_X86_THERMAL_VECTOR
alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt);
#endif
#ifdef CONFIG_X86_MCE_THRESHOLD
alloc_intr_gate(THRESHOLD_APIC_VECTOR, threshold_interrupt);
#endif
#ifdef CONFIG_X86_MCE_AMD
alloc_intr_gate(DEFERRED_ERROR_VECTOR, deferred_error_interrupt);
#endif
#ifdef CONFIG_X86_LOCAL_APIC
/* self generated IPI for local APIC timer */
alloc_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt);
/* IPI for X86 platform specific use */
alloc_intr_gate(X86_PLATFORM_IPI_VECTOR, x86_platform_ipi);
#ifdef CONFIG_HAVE_KVM
/* IPI for KVM to deliver posted interrupt */
alloc_intr_gate(POSTED_INTR_VECTOR, kvm_posted_intr_ipi);
/* IPI for KVM to deliver interrupt to wake up tasks */
alloc_intr_gate(POSTED_INTR_WAKEUP_VECTOR, kvm_posted_intr_wakeup_ipi);
#endif
/* IPI vectors for APIC spurious and error interrupts */
alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt);
alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt);
/* IRQ work interrupts: */
# ifdef CONFIG_IRQ_WORK
alloc_intr_gate(IRQ_WORK_VECTOR, irq_work_interrupt);
# endif
#endif
}
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Cyrill V. Gorcunov | 32 | 27.12% | 1 | 5.26% |
Yang Zhang | 13 | 11.02% | 1 | 5.26% |
Aravind Gopalakrishnan | 12 | 10.17% | 1 | 5.26% |
Glauber de Oliveira Costa | 11 | 9.32% | 1 | 5.26% |
Dimitri Sivanich | 8 | 6.78% | 2 | 10.53% |
Feng Wu | 8 | 6.78% | 1 | 5.26% |
Zwane Mwaikambo | 6 | 5.08% | 1 | 5.26% |
Jacob Shin | 6 | 5.08% | 1 | 5.26% |
Andi Kleen | 4 | 3.39% | 2 | 10.53% |
Peter Zijlstra | 4 | 3.39% | 1 | 5.26% |
Pekka J Enberg | 4 | 3.39% | 1 | 5.26% |
H. Peter Anvin | 3 | 2.54% | 1 | 5.26% |
Jan Beulich | 2 | 1.69% | 1 | 5.26% |
Alan Mayer | 2 | 1.69% | 1 | 5.26% |
Yinghai Lu | 1 | 0.85% | 1 | 5.26% |
Ingo Molnar | 1 | 0.85% | 1 | 5.26% |
Hidehiro Kawai | 1 | 0.85% | 1 | 5.26% |
Total | 118 | 100.00% | 19 | 100.00% |
void __init native_init_IRQ(void)
{
int i;
/* Execute any quirks before the call gates are initialised: */
x86_init.irqs.pre_vector_init();
apic_intr_init();
/*
* Cover the whole vector space, no vector can escape
* us. (some of these will be overridden and become
* 'special' SMP interrupts)
*/
i = FIRST_EXTERNAL_VECTOR;
#ifndef CONFIG_X86_LOCAL_APIC
#define first_system_vector NR_VECTORS
#endif
for_each_clear_bit_from(i, used_vectors, first_system_vector) {
/* IA32_SYSCALL_VECTOR could be used in trap_init already. */
set_intr_gate(i, irq_entries_start +
8 * (i - FIRST_EXTERNAL_VECTOR));
}
#ifdef CONFIG_X86_LOCAL_APIC
for_each_clear_bit_from(i, used_vectors, NR_VECTORS)
set_intr_gate(i, spurious_interrupt);
#endif
if (!acpi_ioapic && !of_ioapic && nr_legacy_irqs())
setup_irq(2, &irq2);
#ifdef CONFIG_X86_32
irq_ctx_init(smp_processor_id());
#endif
}
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Person | Tokens | Prop | Commits | CommitProp |
Jan Beulich | 30 | 26.79% | 1 | 6.25% |
Glauber de Oliveira Costa | 18 | 16.07% | 1 | 6.25% |
Cyrill V. Gorcunov | 13 | 11.61% | 1 | 6.25% |
Pekka J Enberg | 12 | 10.71% | 2 | 12.50% |
Akinobu Mita | 7 | 6.25% | 1 | 6.25% |
Denys Vlasenko | 6 | 5.36% | 1 | 6.25% |
Thomas Gleixner | 5 | 4.46% | 1 | 6.25% |
Yinghai Lu | 4 | 3.57% | 1 | 6.25% |
Andi Kleen | 4 | 3.57% | 1 | 6.25% |
Andrew Morton | 3 | 2.68% | 1 | 6.25% |
Andy Shevchenko | 3 | 2.68% | 1 | 6.25% |
Sebastian Andrzej Siewior | 3 | 2.68% | 1 | 6.25% |
James Bottomley | 2 | 1.79% | 1 | 6.25% |
Mikael Pettersson | 1 | 0.89% | 1 | 6.25% |
Linus Torvalds (pre-git) | 1 | 0.89% | 1 | 6.25% |
Total | 112 | 100.00% | 16 | 100.00% |
Overall Contributors
Person | Tokens | Prop | Commits | CommitProp |
Cyrill V. Gorcunov | 87 | 15.24% | 1 | 1.47% |
Yinghai Lu | 78 | 13.66% | 6 | 8.82% |
Linus Torvalds (pre-git) | 65 | 11.38% | 2 | 2.94% |
Andi Kleen | 40 | 7.01% | 5 | 7.35% |
Thomas Gleixner | 38 | 6.65% | 7 | 10.29% |
Glauber de Oliveira Costa | 36 | 6.30% | 2 | 2.94% |
Jan Beulich | 32 | 5.60% | 1 | 1.47% |
Pekka J Enberg | 30 | 5.25% | 5 | 7.35% |
Suresh B. Siddha | 29 | 5.08% | 1 | 1.47% |
Yang Zhang | 13 | 2.28% | 1 | 1.47% |
Aravind Gopalakrishnan | 12 | 2.10% | 1 | 1.47% |
Jaswinder Singh Rajput | 9 | 1.58% | 2 | 2.94% |
Ingo Molnar | 8 | 1.40% | 4 | 5.88% |
Feng Wu | 8 | 1.40% | 1 | 1.47% |
Dimitri Sivanich | 8 | 1.40% | 2 | 2.94% |
Akinobu Mita | 7 | 1.23% | 1 | 1.47% |
Sebastian Andrzej Siewior | 6 | 1.05% | 1 | 1.47% |
Denys Vlasenko | 6 | 1.05% | 1 | 1.47% |
Jacob Shin | 6 | 1.05% | 1 | 1.47% |
Zwane Mwaikambo | 6 | 1.05% | 1 | 1.47% |
Linus Torvalds | 5 | 0.88% | 2 | 2.94% |
Peter Zijlstra | 4 | 0.70% | 1 | 1.47% |
Andrew Morton | 4 | 0.70% | 2 | 2.94% |
Brian Gerst | 4 | 0.70% | 1 | 1.47% |
James Bottomley | 4 | 0.70% | 2 | 2.94% |
Adrian Bunk | 3 | 0.53% | 1 | 1.47% |
Andy Shevchenko | 3 | 0.53% | 1 | 1.47% |
H. Peter Anvin | 3 | 0.53% | 1 | 1.47% |
Jacob jun Pan | 3 | 0.53% | 1 | 1.47% |
Len Brown | 2 | 0.35% | 1 | 1.47% |
Pavel Machek | 2 | 0.35% | 1 | 1.47% |
Alan Mayer | 2 | 0.35% | 1 | 1.47% |
Jiang Liu | 2 | 0.35% | 1 | 1.47% |
Paul Jimenez | 1 | 0.18% | 1 | 1.47% |
Mikael Pettersson | 1 | 0.18% | 1 | 1.47% |
Hidehiro Kawai | 1 | 0.18% | 1 | 1.47% |
Maciej W. Rozycki | 1 | 0.18% | 1 | 1.47% |
Arun Sharma | 1 | 0.18% | 1 | 1.47% |
Kay Sievers | 1 | 0.18% | 1 | 1.47% |
Total | 571 | 100.00% | 68 | 100.00% |
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