Release 4.11 drivers/cpufreq/sc520_freq.c
/*
* sc520_freq.c: cpufreq driver for the AMD Elan sc520
*
* Copyright (C) 2005 Sean Young <sean@mess.org>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
* Based on elanfreq.c
*
* 2005-03-30: - initial revision
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/cpufreq.h>
#include <linux/timex.h>
#include <linux/io.h>
#include <asm/cpu_device_id.h>
#include <asm/msr.h>
#define MMCR_BASE 0xfffef000
/* The default base address */
#define OFFS_CPUCTL 0x2
/* CPU Control Register */
static __u8 __iomem *cpuctl;
static struct cpufreq_frequency_table sc520_freq_table[] = {
{0, 0x01, 100000},
{0, 0x02, 133000},
{0, 0, CPUFREQ_TABLE_END},
};
static unsigned int sc520_freq_get_cpu_frequency(unsigned int cpu)
{
u8 clockspeed_reg = *cpuctl;
switch (clockspeed_reg & 0x03) {
default:
pr_err("error: cpuctl register has unexpected value %02x\n",
clockspeed_reg);
case 0x01:
return 100000;
case 0x02:
return 133000;
}
}
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Dave Jones | 41 | 91.11% | 1 | 50.00% |
Joe Perches | 4 | 8.89% | 1 | 50.00% |
Total | 45 | 100.00% | 2 | 100.00% |
static int sc520_freq_target(struct cpufreq_policy *policy, unsigned int state)
{
u8 clockspeed_reg;
local_irq_disable();
clockspeed_reg = *cpuctl & ~0x03;
*cpuctl = clockspeed_reg | sc520_freq_table[state].driver_data;
local_irq_enable();
return 0;
}
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Dave Jones | 39 | 82.98% | 1 | 25.00% |
Viresh Kumar | 8 | 17.02% | 3 | 75.00% |
Total | 47 | 100.00% | 4 | 100.00% |
/*
* Module init and exit code
*/
static int sc520_freq_cpu_init(struct cpufreq_policy *policy)
{
struct cpuinfo_x86 *c = &cpu_data(0);
/* capability check */
if (c->x86_vendor != X86_VENDOR_AMD ||
c->x86 != 4 || c->x86_model != 9)
return -ENODEV;
/* cpuinfo and default policy values */
policy->cpuinfo.transition_latency = 1000000; /* 1ms */
return cpufreq_table_validate_and_show(policy, sc520_freq_table);
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Dave Jones | 59 | 90.77% | 1 | 33.33% |
Mike Travis | 4 | 6.15% | 1 | 33.33% |
Viresh Kumar | 2 | 3.08% | 1 | 33.33% |
Total | 65 | 100.00% | 3 | 100.00% |
static struct cpufreq_driver sc520_freq_driver = {
.get = sc520_freq_get_cpu_frequency,
.verify = cpufreq_generic_frequency_table_verify,
.target_index = sc520_freq_target,
.init = sc520_freq_cpu_init,
.name = "sc520_freq",
.attr = cpufreq_generic_attr,
};
static const struct x86_cpu_id sc520_ids[] = {
{ X86_VENDOR_AMD, 4, 9 },
{}
};
MODULE_DEVICE_TABLE(x86cpu, sc520_ids);
static int __init sc520_freq_init(void)
{
int err;
if (!x86_match_cpu(sc520_ids))
return -ENODEV;
cpuctl = ioremap((unsigned long)(MMCR_BASE + OFFS_CPUCTL), 1);
if (!cpuctl) {
pr_err("sc520_freq: error: failed to remap memory\n");
return -ENOMEM;
}
err = cpufreq_register_driver(&sc520_freq_driver);
if (err)
iounmap(cpuctl);
return err;
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Dave Jones | 55 | 71.43% | 1 | 25.00% |
Amol Lad | 17 | 22.08% | 1 | 25.00% |
Andi Kleen | 4 | 5.19% | 1 | 25.00% |
Joe Perches | 1 | 1.30% | 1 | 25.00% |
Total | 77 | 100.00% | 4 | 100.00% |
static void __exit sc520_freq_exit(void)
{
cpufreq_unregister_driver(&sc520_freq_driver);
iounmap(cpuctl);
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Dave Jones | 20 | 100.00% | 1 | 100.00% |
Total | 20 | 100.00% | 1 | 100.00% |
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Sean Young <sean@mess.org>");
MODULE_DESCRIPTION("cpufreq driver for AMD's Elan sc520 CPU");
module_init(sc520_freq_init);
module_exit(sc520_freq_exit);
Overall Contributors
Person | Tokens | Prop | Commits | CommitProp |
Dave Jones | 341 | 80.05% | 2 | 15.38% |
Andi Kleen | 33 | 7.75% | 1 | 7.69% |
Viresh Kumar | 19 | 4.46% | 6 | 46.15% |
Amol Lad | 17 | 3.99% | 1 | 7.69% |
Joe Perches | 12 | 2.82% | 2 | 15.38% |
Mike Travis | 4 | 0.94% | 1 | 7.69% |
Total | 426 | 100.00% | 13 | 100.00% |
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