Release 4.11 drivers/gpio/gpio-pl061.c

/*
 * Copyright (C) 2008, 2009 Provigent Ltd.
 *
 * Author: Baruch Siach <baruch@tkos.co.il>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * Driver for the ARM PrimeCell(tm) General Purpose Input/Output (PL061)
 *
 * Data sheet: ARM DDI 0190B, September 2000
 */
#include <linux/spinlock.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/ioport.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/irqchip/chained_irq.h>
#include <linux/bitops.h>
#include <linux/gpio.h>
#include <linux/device.h>
#include <linux/amba/bus.h>
#include <linux/slab.h>
#include <linux/pinctrl/consumer.h>
#include <linux/pm.h>


#define GPIODIR 0x400

#define GPIOIS  0x404

#define GPIOIBE 0x408

#define GPIOIEV 0x40C

#define GPIOIE  0x410

#define GPIORIS 0x414

#define GPIOMIS 0x418

#define GPIOIC  0x41C


#define PL061_GPIO_NR	8

#ifdef CONFIG_PM

struct pl061_context_save_regs {
	
u8 gpio_data;
	
u8 gpio_dir;
	
u8 gpio_is;
	
u8 gpio_ibe;
	
u8 gpio_iev;
	
u8 gpio_ie;
};
#endif


struct pl061 {
	
spinlock_t		lock;

	
void __iomem		*base;
	
struct gpio_chip	gc;
	
int			parent_irq;

#ifdef CONFIG_PM
	
struct pl061_context_save_regs csave_regs;
#endif
};



static int pl061_get_direction(struct gpio_chip *gc, unsigned offset)
{
	struct pl061 *pl061 = gpiochip_get_data(gc);

	return !(readb(pl061->base + GPIODIR) & BIT(offset));
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Linus Walleij
42
100.00%
3
100.00%
Total
42
100.00%
3
100.00%



static int pl061_direction_input(struct gpio_chip *gc, unsigned offset)
{
	struct pl061 *pl061 = gpiochip_get_data(gc);
	unsigned long flags;
	unsigned char gpiodir;

	spin_lock_irqsave(&pl061->lock, flags);
	gpiodir = readb(pl061->base + GPIODIR);
	gpiodir &= ~(BIT(offset));
	writeb(gpiodir, pl061->base + GPIODIR);
	spin_unlock_irqrestore(&pl061->lock, flags);

	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Baruch Siach
77
88.51%
1
20.00%
Linus Walleij
7
8.05%
3
60.00%
Javier Martinez Canillas
3
3.45%
1
20.00%
Total
87
100.00%
5
100.00%



static int pl061_direction_output(struct gpio_chip *gc, unsigned offset,
		int value)
{
	struct pl061 *pl061 = gpiochip_get_data(gc);
	unsigned long flags;
	unsigned char gpiodir;

	spin_lock_irqsave(&pl061->lock, flags);
	writeb(!!value << offset, pl061->base + (BIT(offset + 2)));
	gpiodir = readb(pl061->base + GPIODIR);
	gpiodir |= BIT(offset);
	writeb(gpiodir, pl061->base + GPIODIR);

	/*
         * gpio value is set again, because pl061 doesn't allow to set value of
         * a gpio pin before configuring it in OUT mode.
         */
	writeb(!!value << offset, pl061->base + (BIT(offset + 2)));
	spin_unlock_irqrestore(&pl061->lock, flags);

	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Baruch Siach
95
71.97%
1
16.67%
Viresh Kumar
19
14.39%
1
16.67%
Javier Martinez Canillas
9
6.82%
1
16.67%
Linus Walleij
9
6.82%
3
50.00%
Total
132
100.00%
6
100.00%



static int pl061_get_value(struct gpio_chip *gc, unsigned offset)
{
	struct pl061 *pl061 = gpiochip_get_data(gc);

	return !!readb(pl061->base + (BIT(offset + 2)));
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Baruch Siach
36
83.72%
1
20.00%
Linus Walleij
4
9.30%
3
60.00%
Javier Martinez Canillas
3
6.98%
1
20.00%
Total
43
100.00%
5
100.00%



static void pl061_set_value(struct gpio_chip *gc, unsigned offset, int value)
{
	struct pl061 *pl061 = gpiochip_get_data(gc);

	writeb(!!value << offset, pl061->base + (BIT(offset + 2)));
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Baruch Siach
42
85.71%
1
20.00%
Linus Walleij
4
8.16%
3
60.00%
Javier Martinez Canillas
3
6.12%
1
20.00%
Total
49
100.00%
5
100.00%



static int pl061_irq_type(struct irq_data *d, unsigned trigger)
{
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
	struct pl061 *pl061 = gpiochip_get_data(gc);
	int offset = irqd_to_hwirq(d);
	unsigned long flags;
	u8 gpiois, gpioibe, gpioiev;
	u8 bit = BIT(offset);

	if (offset < 0 || offset >= PL061_GPIO_NR)
		return -EINVAL;

	if ((trigger & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) &&
	    (trigger & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)))
	{
		dev_err(gc->parent,
			"trying to configure line %d for both level and edge "
			"detection, choose one!\n",
			offset);
		return -EINVAL;
	}


	spin_lock_irqsave(&pl061->lock, flags);

	gpioiev = readb(pl061->base + GPIOIEV);
	gpiois = readb(pl061->base + GPIOIS);
	gpioibe = readb(pl061->base + GPIOIBE);

	if (trigger & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
		bool polarity = trigger & IRQ_TYPE_LEVEL_HIGH;

		/* Disable edge detection */
		gpioibe &= ~bit;
		/* Enable level detection */
		gpiois |= bit;
		/* Select polarity */
		if (polarity)
			gpioiev |= bit;
		else
			gpioiev &= ~bit;
		irq_set_handler_locked(d, handle_level_irq);
		dev_dbg(gc->parent, "line %d: IRQ on %s level\n",
			offset,
			polarity ? "HIGH" : "LOW");
	} else if ((trigger & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
		/* Disable level detection */
		gpiois &= ~bit;
		/* Select both edges, setting this makes GPIOEV be ignored */
		gpioibe |= bit;
		irq_set_handler_locked(d, handle_edge_irq);
		dev_dbg(gc->parent, "line %d: IRQ on both edges\n", offset);
	} else if ((trigger & IRQ_TYPE_EDGE_RISING) ||
		   (trigger & IRQ_TYPE_EDGE_FALLING)) {
		bool rising = trigger & IRQ_TYPE_EDGE_RISING;

		/* Disable level detection */
		gpiois &= ~bit;
		/* Clear detection on both edges */
		gpioibe &= ~bit;
		/* Select edge */
		if (rising)
			gpioiev |= bit;
		else
			gpioiev &= ~bit;
		irq_set_handler_locked(d, handle_edge_irq);
		dev_dbg(gc->parent, "line %d: IRQ on %s edge\n",
			offset,
			rising ? "RISING" : "FALLING");
	} else {
		/* No trigger: disable everything */
		gpiois &= ~bit;
		gpioibe &= ~bit;
		gpioiev &= ~bit;
		irq_set_handler_locked(d, handle_bad_irq);
		dev_warn(gc->parent, "no trigger selected for line %d\n",
			 offset);
	}

	writeb(gpiois, pl061->base + GPIOIS);
	writeb(gpioibe, pl061->base + GPIOIBE);
	writeb(gpioiev, pl061->base + GPIOIEV);

	spin_unlock_irqrestore(&pl061->lock, flags);

	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Linus Walleij
234
54.80%
8
53.33%
Baruch Siach
145
33.96%
2
13.33%
Dan Carpenter
39
9.13%
1
6.67%
Haojian Zhuang
5
1.17%
1
6.67%
Rob Herring
2
0.47%
1
6.67%
Axel Lin
1
0.23%
1
6.67%
Lennert Buytenhek
1
0.23%
1
6.67%
Total
427
100.00%
15
100.00%



static void pl061_irq_handler(struct irq_desc *desc)
{
	unsigned long pending;
	int offset;
	struct gpio_chip *gc = irq_desc_get_handler_data(desc);
	struct pl061 *pl061 = gpiochip_get_data(gc);
	struct irq_chip *irqchip = irq_desc_get_chip(desc);

	chained_irq_enter(irqchip, desc);

	pending = readb(pl061->base + GPIOMIS);
	if (pending) {
		for_each_set_bit(offset, &pending, PL061_GPIO_NR)
			generic_handle_irq(irq_find_mapping(gc->irqdomain,
							    offset));
	}

	chained_irq_exit(irqchip, desc);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Baruch Siach
61
61.62%
2
20.00%
Rob Herring
19
19.19%
2
20.00%
Linus Walleij
16
16.16%
4
40.00%
Lennert Buytenhek
2
2.02%
1
10.00%
Akinobu Mita
1
1.01%
1
10.00%
Total
99
100.00%
10
100.00%



static void pl061_irq_mask(struct irq_data *d)
{
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
	struct pl061 *pl061 = gpiochip_get_data(gc);
	u8 mask = BIT(irqd_to_hwirq(d) % PL061_GPIO_NR);
	u8 gpioie;

	spin_lock(&pl061->lock);
	gpioie = readb(pl061->base + GPIOIE) & ~mask;
	writeb(gpioie, pl061->base + GPIOIE);
	spin_unlock(&pl061->lock);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Haojian Zhuang
50
56.82%
1
12.50%
Rob Herring
17
19.32%
1
12.50%
Linus Walleij
16
18.18%
4
50.00%
Javier Martinez Canillas
3
3.41%
1
12.50%
Baruch Siach
2
2.27%
1
12.50%
Total
88
100.00%
8
100.00%



static void pl061_irq_unmask(struct irq_data *d)
{
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
	struct pl061 *pl061 = gpiochip_get_data(gc);
	u8 mask = BIT(irqd_to_hwirq(d) % PL061_GPIO_NR);
	u8 gpioie;

	spin_lock(&pl061->lock);
	gpioie = readb(pl061->base + GPIOIE) | mask;
	writeb(gpioie, pl061->base + GPIOIE);
	spin_unlock(&pl061->lock);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Haojian Zhuang
63
72.41%
1
12.50%
Linus Walleij
16
18.39%
4
50.00%
Rob Herring
4
4.60%
1
12.50%
Javier Martinez Canillas
3
3.45%
1
12.50%
Baruch Siach
1
1.15%
1
12.50%
Total
87
100.00%
8
100.00%

/**
 * pl061_irq_ack() - ACK an edge IRQ
 * @d: IRQ data for this IRQ
 *
 * This gets called from the edge IRQ handler to ACK the edge IRQ
 * in the GPIOIC (interrupt-clear) register. For level IRQs this is
 * not needed: these go away when the level signal goes away.
 */


static void pl061_irq_ack(struct irq_data *d)
{
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
	struct pl061 *pl061 = gpiochip_get_data(gc);
	u8 mask = BIT(irqd_to_hwirq(d) % PL061_GPIO_NR);

	spin_lock(&pl061->lock);
	writeb(mask, pl061->base + GPIOIC);
	spin_unlock(&pl061->lock);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Linus Walleij
71
100.00%
4
100.00%
Total
71
100.00%
4
100.00%



static int pl061_irq_set_wake(struct irq_data *d, unsigned int state)
{
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
	struct pl061 *pl061 = gpiochip_get_data(gc);

	return irq_set_irq_wake(pl061->parent_irq, state);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Sudeep Holla
33
73.33%
1
25.00%
Linus Walleij
12
26.67%
3
75.00%
Total
45
100.00%
4
100.00%


static struct irq_chip pl061_irqchip = {
	.name		= "pl061",
	.irq_ack	= pl061_irq_ack,
	.irq_mask	= pl061_irq_mask,
	.irq_unmask	= pl061_irq_unmask,
	.irq_set_type	= pl061_irq_type,
	.irq_set_wake	= pl061_irq_set_wake,
};



static int pl061_probe(struct amba_device *adev, const struct amba_id *id)
{
	struct device *dev = &adev->dev;
	struct pl061 *pl061;
	int ret, irq;

	pl061 = devm_kzalloc(dev, sizeof(*pl061), GFP_KERNEL);
	if (pl061 == NULL)
		return -ENOMEM;

	pl061->base = devm_ioremap_resource(dev, &adev->res);
	if (IS_ERR(pl061->base))
		return PTR_ERR(pl061->base);

	spin_lock_init(&pl061->lock);
	if (of_property_read_bool(dev->of_node, "gpio-ranges")) {
		pl061->gc.request = gpiochip_generic_request;
		pl061->gc.free = gpiochip_generic_free;
	}

	pl061->gc.base = -1;
	pl061->gc.get_direction = pl061_get_direction;
	pl061->gc.direction_input = pl061_direction_input;
	pl061->gc.direction_output = pl061_direction_output;
	pl061->gc.get = pl061_get_value;
	pl061->gc.set = pl061_set_value;
	pl061->gc.ngpio = PL061_GPIO_NR;
	pl061->gc.label = dev_name(dev);
	pl061->gc.parent = dev;
	pl061->gc.owner = THIS_MODULE;

	ret = gpiochip_add_data(&pl061->gc, pl061);
	if (ret)
		return ret;

	/*
         * irq_chip support
         */
	writeb(0, pl061->base + GPIOIE); /* disable irqs */
	irq = adev->irq[0];
	if (irq < 0) {
		dev_err(&adev->dev, "invalid IRQ\n");
		return -ENODEV;
	}
	pl061->parent_irq = irq;

	ret = gpiochip_irqchip_add(&pl061->gc, &pl061_irqchip,
				   0, handle_bad_irq,
				   IRQ_TYPE_NONE);
	if (ret) {
		dev_info(&adev->dev, "could not add irqchip\n");
		return ret;
	}
	gpiochip_set_chained_irqchip(&pl061->gc, &pl061_irqchip,
				     irq, pl061_irq_handler);

	amba_set_drvdata(adev, pl061);
	dev_info(&adev->dev, "PL061 GPIO chip @%pa registered\n",
		 &adev->res.start);

	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Baruch Siach
169
46.56%
1
4.76%
Linus Walleij
132
36.36%
11
52.38%
Tobias Klauser
24
6.61%
1
4.76%
Yunlei He
11
3.03%
1
4.76%
Jingoo Han
7
1.93%
1
4.76%
Axel Lin
6
1.65%
1
4.76%
Haojian Zhuang
6
1.65%
1
4.76%
Jonas Gorski
4
1.10%
1
4.76%
Fabio Estevam
2
0.55%
1
4.76%
Russell King
1
0.28%
1
4.76%
Deepak Sikri
1
0.28%
1
4.76%
Total
363
100.00%
21
100.00%

#ifdef CONFIG_PM


static int pl061_suspend(struct device *dev)
{
	struct pl061 *pl061 = dev_get_drvdata(dev);
	int offset;

	pl061->csave_regs.gpio_data = 0;
	pl061->csave_regs.gpio_dir = readb(pl061->base + GPIODIR);
	pl061->csave_regs.gpio_is = readb(pl061->base + GPIOIS);
	pl061->csave_regs.gpio_ibe = readb(pl061->base + GPIOIBE);
	pl061->csave_regs.gpio_iev = readb(pl061->base + GPIOIEV);
	pl061->csave_regs.gpio_ie = readb(pl061->base + GPIOIE);

	for (offset = 0; offset < PL061_GPIO_NR; offset++) {
		if (pl061->csave_regs.gpio_dir & (BIT(offset)))
			pl061->csave_regs.gpio_data |=
				pl061_get_value(&pl061->gc, offset) << offset;
	}

	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Deepak Sikri
137
86.71%
1
20.00%
Linus Walleij
16
10.13%
2
40.00%
Javier Martinez Canillas
3
1.90%
1
20.00%
Baruch Siach
2
1.27%
1
20.00%
Total
158
100.00%
5
100.00%



static int pl061_resume(struct device *dev)
{
	struct pl061 *pl061 = dev_get_drvdata(dev);
	int offset;

	for (offset = 0; offset < PL061_GPIO_NR; offset++) {
		if (pl061->csave_regs.gpio_dir & (BIT(offset)))
			pl061_direction_output(&pl061->gc, offset,
					pl061->csave_regs.gpio_data &
					(BIT(offset)));
		else
			pl061_direction_input(&pl061->gc, offset);
	}

	writeb(pl061->csave_regs.gpio_is, pl061->base + GPIOIS);
	writeb(pl061->csave_regs.gpio_ibe, pl061->base + GPIOIBE);
	writeb(pl061->csave_regs.gpio_iev, pl061->base + GPIOIEV);
	writeb(pl061->csave_regs.gpio_ie, pl061->base + GPIOIE);

	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Deepak Sikri
131
86.75%
1
25.00%
Linus Walleij
14
9.27%
2
50.00%
Javier Martinez Canillas
6
3.97%
1
25.00%
Total
151
100.00%
4
100.00%


static const struct dev_pm_ops pl061_dev_pm_ops = {
	.suspend = pl061_suspend,
	.resume = pl061_resume,
	.freeze = pl061_suspend,
	.restore = pl061_resume,
};
#endif


static struct amba_id pl061_ids[] = {
	{
		.id	= 0x00041061,
		.mask	= 0x000fffff,
        },
	{ 0, 0 },
};


static struct amba_driver pl061_gpio_driver = {
	.drv = {
		.name	= "pl061_gpio",
#ifdef CONFIG_PM
		.pm	= &pl061_dev_pm_ops,
#endif
	},
	.id_table	= pl061_ids,
	.probe		= pl061_probe,
};



static int __init pl061_gpio_init(void)
{
	return amba_driver_register(&pl061_gpio_driver);
}
Contributors
Person
Tokens
Prop
Commits
CommitProp
Baruch Siach
16
100.00%
1
100.00%
Total
16
100.00%
1
100.00%


device_initcall(pl061_gpio_init);
Overall Contributors
Person
Tokens
Prop
Commits
CommitProp
Baruch Siach
785
36.72%
2
5.00%
Linus Walleij
604
28.25%
14
35.00%
Deepak Sikri
331
15.48%
1
2.50%
Haojian Zhuang
143
6.69%
2
5.00%
Rob Herring
51
2.39%
3
7.50%
Viresh Kumar
43
2.01%
2
5.00%
Sudeep Holla
41
1.92%
1
2.50%
Dan Carpenter
39
1.82%
1
2.50%
Javier Martinez Canillas
33
1.54%
1
2.50%
Tobias Klauser
24
1.12%
1
2.50%
Yunlei He
11
0.51%
1
2.50%
Axel Lin
7
0.33%
2
5.00%
Jingoo Han
7
0.33%
1
2.50%
Jonas Gorski
4
0.19%
1
2.50%
Lennert Buytenhek
4
0.19%
1
2.50%
Catalin Marinas
3
0.14%
1
2.50%
Paul Gortmaker
3
0.14%
1
2.50%
Fabio Estevam
2
0.09%
1
2.50%
Tejun Heo
1
0.05%
1
2.50%
Russell King
1
0.05%
1
2.50%
Akinobu Mita
1
0.05%
1
2.50%
Total
2138
100.00%
40
100.00%
Directory: drivers/gpio

Information contained on this website is for historical information purposes only and does not indicate or represent copyright ownership.