cregit-Linux how code gets into the kernel

Release 4.11 drivers/input/rmi4/rmi_f34v7.c

/*
 * Copyright (c) 2016, Zodiac Inflight Innovations
 * Copyright (c) 2007-2016, Synaptics Incorporated
 * Copyright (C) 2012 Alexandra Chin <alexandra.chin@tw.synaptics.com>
 * Copyright (C) 2012 Scott Lin <scott.lin@tw.synaptics.com>
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 as published by
 * the Free Software Foundation.
 */

#include <linux/kernel.h>
#include <linux/rmi.h>
#include <linux/firmware.h>
#include <asm/unaligned.h>
#include <linux/delay.h>
#include <linux/slab.h>

#include "rmi_driver.h"
#include "rmi_f34.h"


static int rmi_f34v7_read_flash_status(struct f34_data *f34) { u8 status; u8 command; int ret; ret = rmi_read_block(f34->fn->rmi_dev, f34->fn->fd.data_base_addr + f34->v7.off.flash_status, &status, sizeof(status)); if (ret < 0) { rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, "%s: Failed to read flash status\n", __func__); return ret; } f34->v7.in_bl_mode = status >> 7; f34->v7.flash_status = status & 0x1f; if (f34->v7.flash_status != 0x00) { dev_err(&f34->fn->dev, "%s: status=%d, command=0x%02x\n", __func__, f34->v7.flash_status, f34->v7.command); } ret = rmi_read_block(f34->fn->rmi_dev, f34->fn->fd.data_base_addr + f34->v7.off.flash_cmd, &command, sizeof(command)); if (ret < 0) { dev_err(&f34->fn->dev, "%s: Failed to read flash command\n", __func__); return ret; } f34->v7.command = command; return 0; }

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static int rmi_f34v7_wait_for_idle(struct f34_data *f34, int timeout_ms) { int count = 0; int timeout_count = ((timeout_ms * 1000) / MAX_SLEEP_TIME_US) + 1; do { usleep_range(MIN_SLEEP_TIME_US, MAX_SLEEP_TIME_US); count++; rmi_f34v7_read_flash_status(f34); if ((f34->v7.command == v7_CMD_IDLE) && (f34->v7.flash_status == 0x00)) { rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, "Idle status detected\n"); return 0; } } while (count < timeout_count); dev_err(&f34->fn->dev, "%s: Timed out waiting for idle status\n", __func__); return -ETIMEDOUT; }

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static int rmi_f34v7_write_command_single_transaction(struct f34_data *f34, u8 cmd) { int ret; u8 base; struct f34v7_data_1_5 data_1_5; base = f34->fn->fd.data_base_addr; memset(&data_1_5, 0, sizeof(data_1_5)); switch (cmd) { case v7_CMD_ERASE_ALL: data_1_5.partition_id = CORE_CODE_PARTITION; data_1_5.command = CMD_V7_ERASE_AP; break; case v7_CMD_ERASE_UI_FIRMWARE: data_1_5.partition_id = CORE_CODE_PARTITION; data_1_5.command = CMD_V7_ERASE; break; case v7_CMD_ERASE_BL_CONFIG: data_1_5.partition_id = GLOBAL_PARAMETERS_PARTITION; data_1_5.command = CMD_V7_ERASE; break; case v7_CMD_ERASE_UI_CONFIG: data_1_5.partition_id = CORE_CONFIG_PARTITION; data_1_5.command = CMD_V7_ERASE; break; case v7_CMD_ERASE_DISP_CONFIG: data_1_5.partition_id = DISPLAY_CONFIG_PARTITION; data_1_5.command = CMD_V7_ERASE; break; case v7_CMD_ERASE_FLASH_CONFIG: data_1_5.partition_id = FLASH_CONFIG_PARTITION; data_1_5.command = CMD_V7_ERASE; break; case v7_CMD_ERASE_GUEST_CODE: data_1_5.partition_id = GUEST_CODE_PARTITION; data_1_5.command = CMD_V7_ERASE; break; case v7_CMD_ENABLE_FLASH_PROG: data_1_5.partition_id = BOOTLOADER_PARTITION; data_1_5.command = CMD_V7_ENTER_BL; break; } data_1_5.payload[0] = f34->bootloader_id[0]; data_1_5.payload[1] = f34->bootloader_id[1]; ret = rmi_write_block(f34->fn->rmi_dev, base + f34->v7.off.partition_id, &data_1_5, sizeof(data_1_5)); if (ret < 0) { dev_err(&f34->fn->dev, "%s: Failed to write single transaction command\n", __func__); return ret; } return 0; }

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static int rmi_f34v7_write_command(struct f34_data *f34, u8 cmd) { int ret; u8 base; u8 command; base = f34->fn->fd.data_base_addr; switch (cmd) { case v7_CMD_WRITE_FW: case v7_CMD_WRITE_CONFIG: case v7_CMD_WRITE_GUEST_CODE: command = CMD_V7_WRITE; break; case v7_CMD_READ_CONFIG: command = CMD_V7_READ; break; case v7_CMD_ERASE_ALL: command = CMD_V7_ERASE_AP; break; case v7_CMD_ERASE_UI_FIRMWARE: case v7_CMD_ERASE_BL_CONFIG: case v7_CMD_ERASE_UI_CONFIG: case v7_CMD_ERASE_DISP_CONFIG: case v7_CMD_ERASE_FLASH_CONFIG: case v7_CMD_ERASE_GUEST_CODE: command = CMD_V7_ERASE; break; case v7_CMD_ENABLE_FLASH_PROG: command = CMD_V7_ENTER_BL; break; default: dev_err(&f34->fn->dev, "%s: Invalid command 0x%02x\n", __func__, cmd); return -EINVAL; } f34->v7.command = command; switch (cmd) { case v7_CMD_ERASE_ALL: case v7_CMD_ERASE_UI_FIRMWARE: case v7_CMD_ERASE_BL_CONFIG: case v7_CMD_ERASE_UI_CONFIG: case v7_CMD_ERASE_DISP_CONFIG: case v7_CMD_ERASE_FLASH_CONFIG: case v7_CMD_ERASE_GUEST_CODE: case v7_CMD_ENABLE_FLASH_PROG: ret = rmi_f34v7_write_command_single_transaction(f34, cmd); if (ret < 0) return ret; else return 0; default: break; } rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, "%s: writing cmd %02X\n", __func__, command); ret = rmi_write_block(f34->fn->rmi_dev, base + f34->v7.off.flash_cmd, &command, sizeof(command)); if (ret < 0) { dev_err(&f34->fn->dev, "%s: Failed to write flash command\n", __func__); return ret; } return 0; }

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static int rmi_f34v7_write_partition_id(struct f34_data *f34, u8 cmd) { int ret; u8 base; u8 partition; base = f34->fn->fd.data_base_addr; switch (cmd) { case v7_CMD_WRITE_FW: partition = CORE_CODE_PARTITION; break; case v7_CMD_WRITE_CONFIG: case v7_CMD_READ_CONFIG: if (f34->v7.config_area == v7_UI_CONFIG_AREA) partition = CORE_CONFIG_PARTITION; else if (f34->v7.config_area == v7_DP_CONFIG_AREA) partition = DISPLAY_CONFIG_PARTITION; else if (f34->v7.config_area == v7_PM_CONFIG_AREA) partition = GUEST_SERIALIZATION_PARTITION; else if (f34->v7.config_area == v7_BL_CONFIG_AREA) partition = GLOBAL_PARAMETERS_PARTITION; else if (f34->v7.config_area == v7_FLASH_CONFIG_AREA) partition = FLASH_CONFIG_PARTITION; break; case v7_CMD_WRITE_GUEST_CODE: partition = GUEST_CODE_PARTITION; break; case v7_CMD_ERASE_ALL: partition = CORE_CODE_PARTITION; break; case v7_CMD_ERASE_BL_CONFIG: partition = GLOBAL_PARAMETERS_PARTITION; break; case v7_CMD_ERASE_UI_CONFIG: partition = CORE_CONFIG_PARTITION; break; case v7_CMD_ERASE_DISP_CONFIG: partition = DISPLAY_CONFIG_PARTITION; break; case v7_CMD_ERASE_FLASH_CONFIG: partition = FLASH_CONFIG_PARTITION; break; case v7_CMD_ERASE_GUEST_CODE: partition = GUEST_CODE_PARTITION; break; case v7_CMD_ENABLE_FLASH_PROG: partition = BOOTLOADER_PARTITION; break; default: dev_err(&f34->fn->dev, "%s: Invalid command 0x%02x\n", __func__, cmd); return -EINVAL; } ret = rmi_write_block(f34->fn->rmi_dev, base + f34->v7.off.partition_id, &partition, sizeof(partition)); if (ret < 0) { dev_err(&f34->fn->dev, "%s: Failed to write partition ID\n", __func__); return ret; } return 0; }

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static int rmi_f34v7_read_f34v7_partition_table(struct f34_data *f34) { int ret; u8 base; __le16 length; u16 block_number = 0; base = f34->fn->fd.data_base_addr; f34->v7.config_area = v7_FLASH_CONFIG_AREA; ret = rmi_f34v7_write_partition_id(f34, v7_CMD_READ_CONFIG); if (ret < 0) return ret; ret = rmi_write_block(f34->fn->rmi_dev, base + f34->v7.off.block_number, &block_number, sizeof(block_number)); if (ret < 0) { dev_err(&f34->fn->dev, "%s: Failed to write block number\n", __func__); return ret; } put_unaligned_le16(f34->v7.flash_config_length, &length); ret = rmi_write_block(f34->fn->rmi_dev, base + f34->v7.off.transfer_length, &length, sizeof(length)); if (ret < 0) { dev_err(&f34->fn->dev, "%s: Failed to write transfer length\n", __func__); return ret; } ret = rmi_f34v7_write_command(f34, v7_CMD_READ_CONFIG); if (ret < 0) { dev_err(&f34->fn->dev, "%s: Failed to write command\n", __func__); return ret; } ret = rmi_f34v7_wait_for_idle(f34, WRITE_WAIT_MS); if (ret < 0) { dev_err(&f34->fn->dev, "%s: Failed to wait for idle status\n", __func__); return ret; } ret = rmi_read_block(f34->fn->rmi_dev, base + f34->v7.off.payload, f34->v7.read_config_buf, f34->v7.partition_table_bytes); if (ret < 0) { dev_err(&f34->fn->dev, "%s: Failed to read block data\n", __func__); return ret; } return 0; }

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static void rmi_f34v7_parse_partition_table(struct f34_data *f34, const void *partition_table, struct block_count *blkcount, struct physical_address *phyaddr) { int i; int index; u16 partition_length; u16 physical_address; const struct partition_table *ptable; for (i = 0; i < f34->v7.partitions; i++) { index = i * 8 + 2; ptable = partition_table + index; partition_length = le16_to_cpu(ptable->partition_length); physical_address = le16_to_cpu(ptable->start_physical_address); rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, "%s: Partition entry %d: %*ph\n", __func__, i, sizeof(struct partition_table), ptable); switch (ptable->partition_id & 0x1f) { case CORE_CODE_PARTITION: blkcount->ui_firmware = partition_length; phyaddr->ui_firmware = physical_address; rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, "%s: Core code block count: %d\n", __func__, blkcount->ui_firmware); break; case CORE_CONFIG_PARTITION: blkcount->ui_config = partition_length; phyaddr->ui_config = physical_address; rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, "%s: Core config block count: %d\n", __func__, blkcount->ui_config); break; case DISPLAY_CONFIG_PARTITION: blkcount->dp_config = partition_length; phyaddr->dp_config = physical_address; rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, "%s: Display config block count: %d\n", __func__, blkcount->dp_config); break; case FLASH_CONFIG_PARTITION: blkcount->fl_config = partition_length; rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, "%s: Flash config block count: %d\n", __func__, blkcount->fl_config); break; case GUEST_CODE_PARTITION: blkcount->guest_code = partition_length; phyaddr->guest_code = physical_address; rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, "%s: Guest code block count: %d\n", __func__, blkcount->guest_code); break; case GUEST_SERIALIZATION_PARTITION: blkcount->pm_config = partition_length; rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, "%s: Guest serialization block count: %d\n", __func__, blkcount->pm_config); break; case GLOBAL_PARAMETERS_PARTITION: blkcount->bl_config = partition_length; rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, "%s: Global parameters block count: %d\n", __func__, blkcount->bl_config); break; case DEVICE_CONFIG_PARTITION: blkcount->lockdown = partition_length; rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, "%s: Device config block count: %d\n", __func__, blkcount->lockdown); break; } } }

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static int rmi_f34v7_read_queries_bl_version(struct f34_data *f34) { int ret; u8 base; int offset; u8 query_0; struct f34v7_query_1_7 query_1_7; base = f34->fn->fd.query_base_addr; ret = rmi_read_block(f34->fn->rmi_dev, base, &query_0, sizeof(query_0)); if (ret < 0) { dev_err(&f34->fn->dev, "%s: Failed to read query 0\n", __func__); return ret; } offset = (query_0 & 0x7) + 1; ret = rmi_read_block(f34->fn->rmi_dev, base + offset, &query_1_7, sizeof(query_1_7)); if (ret < 0) { dev_err(&f34->fn->dev, "%s: Failed to read queries 1 to 7\n", __func__); return ret; } f34->bootloader_id[0] = query_1_7.bl_minor_revision; f34->bootloader_id[1] = query_1_7.bl_major_revision; rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, "Bootloader V%d.%d\n", f34->bootloader_id[1], f34->bootloader_id[0]); return 0; }

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static int rmi_f34v7_read_queries(struct f34_data *f34) { int ret; int i, j; u8 base; int offset; u8 *ptable; u8 query_0; struct f34v7_query_1_7 query_1_7; base = f34->fn->fd.query_base_addr; ret = rmi_read_block(f34->fn->rmi_dev, base, &query_0, sizeof(query_0)); if (ret < 0) { dev_err(&f34->fn->dev, "%s: Failed to read query 0\n", __func__); return ret; } offset = (query_0 & 0x07) + 1; ret = rmi_read_block(f34->fn->rmi_dev, base + offset, &query_1_7, sizeof(query_1_7)); if (ret < 0) { dev_err(&f34->fn->dev, "%s: Failed to read queries 1 to 7\n", __func__); return ret; } f34->bootloader_id[0] = query_1_7.bl_minor_revision; f34->bootloader_id[1] = query_1_7.bl_major_revision; f34->v7.block_size = le16_to_cpu(query_1_7.block_size); f34->v7.flash_config_length = le16_to_cpu(query_1_7.flash_config_length); f34->v7.payload_length = le16_to_cpu(query_1_7.payload_length); rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, "%s: f34->v7.block_size = %d\n", __func__, f34->v7.block_size); f34->v7.off.flash_status = V7_FLASH_STATUS_OFFSET; f34->v7.off.partition_id = V7_PARTITION_ID_OFFSET; f34->v7.off.block_number = V7_BLOCK_NUMBER_OFFSET; f34->v7.off.transfer_length = V7_TRANSFER_LENGTH_OFFSET; f34->v7.off.flash_cmd = V7_COMMAND_OFFSET; f34->v7.off.payload = V7_PAYLOAD_OFFSET; f34->v7.has_display_cfg = query_1_7.partition_support[1] & HAS_DISP_CFG; f34->v7.has_guest_code = query_1_7.partition_support[1] & HAS_GUEST_CODE; if (query_0 & HAS_CONFIG_ID) { char f34_ctrl[CONFIG_ID_SIZE]; int i = 0; u8 *p = f34->configuration_id; *p = '\0'; ret = rmi_read_block(f34->fn->rmi_dev, f34->fn->fd.control_base_addr, f34_ctrl, sizeof(f34_ctrl)); if (ret) return ret; /* Eat leading zeros */ while (i < sizeof(f34_ctrl) && !f34_ctrl[i]) i++; for (; i < sizeof(f34_ctrl); i++) p += snprintf(p, f34->configuration_id + sizeof(f34->configuration_id) - p, "%02X", f34_ctrl[i]); rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, "Configuration ID: %s\n", f34->configuration_id); } f34->v7.partitions = 0; for (i = 0; i < sizeof(query_1_7.partition_support); i++) for (j = 0; j < 8; j++) if (query_1_7.partition_support[i] & (1 << j)) f34->v7.partitions++; rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, "%s: Supported partitions: %*ph\n", __func__, sizeof(query_1_7.partition_support), query_1_7.partition_support); f34->v7.partition_table_bytes = f34->v7.partitions * 8 + 2; f34->v7.read_config_buf = devm_kzalloc(&f34->fn->dev, f34->v7.partition_table_bytes, GFP_KERNEL); if (!f34->v7.read_config_buf) { f34->v7.read_config_buf_size = 0; return -ENOMEM; } f34->v7.read_config_buf_size = f34->v7.partition_table_bytes; ptable = f34->v7.read_config_buf; ret = rmi_f34v7_read_f34v7_partition_table(f34); if (ret < 0) { dev_err(&f34->fn->dev, "%s: Failed to read partition table\n", __func__); return ret; } rmi_f34v7_parse_partition_table(f34, ptable, &f34->v7.blkcount, &f34->v7.phyaddr); return 0; }

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static int rmi_f34v7_check_ui_firmware_size(struct f34_data *f34) { u16 block_count; block_count = f34->v7.img.ui_firmware.size / f34->v7.block_size; f34->update_size += block_count; if (block_count != f34->v7.blkcount.ui_firmware) { dev_err(&f34->fn->dev, "UI firmware size mismatch: %d != %d\n", block_count, f34->v7.blkcount.ui_firmware); return -EINVAL; } return 0; }

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static int rmi_f34v7_check_ui_config_size(struct f34_data *f34) { u16 block_count; block_count = f34->v7.img.ui_config.size / f34->v7.block_size; f34->update_size += block_count; if (block_count != f34->v7.blkcount.ui_config) { dev_err(&f34->fn->dev, "UI config size mismatch\n"); return -EINVAL; } return 0; }

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static int rmi_f34v7_check_dp_config_size(struct f34_data *f34) { u16 block_count; block_count = f34->v7.img.dp_config.size / f34->v7.block_size; f34->update_size += block_count; if (block_count != f34->v7.blkcount.dp_config) { dev_err(&f34->fn->dev, "Display config size mismatch\n"); return -EINVAL; } return 0; }

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static int rmi_f34v7_check_guest_code_size(struct f34_data *f34) { u16 block_count; block_count = f34->v7.img.guest_code.size / f34->v7.block_size; f34->update_size += block_count; if (block_count !=