Release 4.11 drivers/scsi/wd719x.c
/*
* Driver for Western Digital WD7193, WD7197 and WD7296 SCSI cards
* Copyright 2013 Ondrej Zary
*
* Original driver by
* Aaron Dewell <dewell@woods.net>
* Gaerti <Juergen.Gaertner@mbox.si.uni-hannover.de>
*
* HW documentation available in book:
*
* SPIDER Command Protocol
* by Chandru M. Sippy
* SCSI Storage Products (MCP)
* Western Digital Corporation
* 09-15-95
*
* http://web.archive.org/web/20070717175254/http://sun1.rrzn.uni-hannover.de/gaertner.juergen/wd719x/Linux/Docu/Spider/
*/
/*
* Driver workflow:
* 1. SCSI command is transformed to SCB (Spider Control Block) by the
* queuecommand function.
* 2. The address of the SCB is stored in a list to be able to access it, if
* something goes wrong.
* 3. The address of the SCB is written to the Controller, which loads the SCB
* via BM-DMA and processes it.
* 4. After it has finished, it generates an interrupt, and sets registers.
*
* flaws:
* - abort/reset functions
*
* ToDo:
* - tagged queueing
*/
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/pci.h>
#include <linux/firmware.h>
#include <linux/eeprom_93cx6.h>
#include <scsi/scsi_cmnd.h>
#include <scsi/scsi_device.h>
#include <scsi/scsi_host.h>
#include "wd719x.h"
/* low-level register access */
static inline u8 wd719x_readb(struct wd719x *wd, u8 reg)
{
return ioread8(wd->base + reg);
}
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static inline u32 wd719x_readl(struct wd719x *wd, u8 reg)
{
return ioread32(wd->base + reg);
}
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static inline void wd719x_writeb(struct wd719x *wd, u8 reg, u8 val)
{
iowrite8(val, wd->base + reg);
}
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static inline void wd719x_writew(struct wd719x *wd, u8 reg, u16 val)
{
iowrite16(val, wd->base + reg);
}
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static inline void wd719x_writel(struct wd719x *wd, u8 reg, u32 val)
{
iowrite32(val, wd->base + reg);
}
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/* wait until the command register is ready */
static inline int wd719x_wait_ready(struct wd719x *wd)
{
int i = 0;
do {
if (wd719x_readb(wd, WD719X_AMR_COMMAND) == WD719X_CMD_READY)
return 0;
udelay(1);
} while (i++ < WD719X_WAIT_FOR_CMD_READY);
dev_err(&wd->pdev->dev, "command register is not ready: 0x%02x\n",
wd719x_readb(wd, WD719X_AMR_COMMAND));
return -ETIMEDOUT;
}
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/* poll interrupt status register until command finishes */
static inline int wd719x_wait_done(struct wd719x *wd, int timeout)
{
u8 status;
while (timeout > 0) {
status = wd719x_readb(wd, WD719X_AMR_INT_STATUS);
if (status)
break;
timeout--;
udelay(1);
}
if (timeout <= 0) {
dev_err(&wd->pdev->dev, "direct command timed out\n");
return -ETIMEDOUT;
}
if (status != WD719X_INT_NOERRORS) {
dev_err(&wd->pdev->dev, "direct command failed, status 0x%02x, SUE 0x%02x\n",
status, wd719x_readb(wd, WD719X_AMR_SCB_ERROR));
return -EIO;
}
return 0;
}
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static int wd719x_direct_cmd(struct wd719x *wd, u8 opcode, u8 dev, u8 lun,
u8 tag, dma_addr_t data, int timeout)
{
int ret = 0;
/* clear interrupt status register (allow command register to clear) */
wd719x_writeb(wd, WD719X_AMR_INT_STATUS, WD719X_INT_NONE);
/* Wait for the Command register to become free */
if (wd719x_wait_ready(wd))
return -ETIMEDOUT;
/* make sure we get NO interrupts */
dev |= WD719X_DISABLE_INT;
wd719x_writeb(wd, WD719X_AMR_CMD_PARAM, dev);
wd719x_writeb(wd, WD719X_AMR_CMD_PARAM_2, lun);
wd719x_writeb(wd, WD719X_AMR_CMD_PARAM_3, tag);
if (data)
wd719x_writel(wd, WD719X_AMR_SCB_IN, data);
/* clear interrupt status register again */
wd719x_writeb(wd, WD719X_AMR_INT_STATUS, WD719X_INT_NONE);
/* Now, write the command */
wd719x_writeb(wd, WD719X_AMR_COMMAND, opcode);
if (timeout) /* wait for the command to complete */
ret = wd719x_wait_done(wd, timeout);
/* clear interrupt status register (clean up) */
if (opcode != WD719X_CMD_READ_FIRMVER)
wd719x_writeb(wd, WD719X_AMR_INT_STATUS, WD719X_INT_NONE);
return ret;
}
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static void wd719x_destroy(struct wd719x *wd)
{
struct wd719x_scb *scb;
/* stop the RISC */
if (wd719x_direct_cmd(wd, WD719X_CMD_SLEEP, 0, 0, 0, 0,
WD719X_WAIT_FOR_RISC))
dev_warn(&wd->pdev->dev, "RISC sleep command failed\n");
/* disable RISC */
wd719x_writeb(wd, WD719X_PCI_MODE_SELECT, 0);
/* free all SCBs */
list_for_each_entry(scb, &wd->active_scbs, list)
pci_free_consistent(wd->pdev, sizeof(struct wd719x_scb), scb,
scb->phys);
list_for_each_entry(scb, &wd->free_scbs, list)
pci_free_consistent(wd->pdev, sizeof(struct wd719x_scb), scb,
scb->phys);
/* free internal buffers */
pci_free_consistent(wd->pdev, wd->fw_size, wd->fw_virt, wd->fw_phys);
wd->fw_virt = NULL;
pci_free_consistent(wd->pdev, WD719X_HASH_TABLE_SIZE, wd->hash_virt,
wd->hash_phys);
wd->hash_virt = NULL;
pci_free_consistent(wd->pdev, sizeof(struct wd719x_host_param),
wd->params, wd->params_phys);
wd->params = NULL;
free_irq(wd->pdev->irq, wd);
}
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/* finish a SCSI command, mark SCB (if any) as free, unmap buffers */
static void wd719x_finish_cmd(struct scsi_cmnd *cmd, int result)
{
struct wd719x *wd = shost_priv(cmd->device->host);
struct wd719x_scb *scb = (struct wd719x_scb *) cmd->host_scribble;
if (scb) {
list_move(&scb->list, &wd->free_scbs);
dma_unmap_single(&wd->pdev->dev, cmd->SCp.dma_handle,
SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
scsi_dma_unmap(cmd);
}
cmd->result = result << 16;
cmd->scsi_done(cmd);
}
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/* Build a SCB and send it to the card */
static int wd719x_queuecommand(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
{
int i, count_sg;
unsigned long flags;
struct wd719x_scb *scb;
struct wd719x *wd = shost_priv(sh);
dma_addr_t phys;
cmd->host_scribble = NULL;
/* get a free SCB - either from existing ones or allocate a new one */
spin_lock_irqsave(wd->sh->host_lock, flags);
scb = list_first_entry_or_null(&wd->free_scbs, struct wd719x_scb, list);
if (scb) {
list_del(&scb->list);
phys = scb->phys;
} else {
spin_unlock_irqrestore(wd->sh->host_lock, flags);
scb = pci_alloc_consistent(wd->pdev, sizeof(struct wd719x_scb),
&phys);
spin_lock_irqsave(wd->sh->host_lock, flags);
if (!scb) {
dev_err(&wd->pdev->dev, "unable to allocate SCB\n");
wd719x_finish_cmd(cmd, DID_ERROR);
spin_unlock_irqrestore(wd->sh->host_lock, flags);
return 0;
}
}
memset(scb, 0, sizeof(struct wd719x_scb));
list_add(&scb->list, &wd->active_scbs);
scb->phys = phys;
scb->cmd = cmd;
cmd->host_scribble = (char *) scb;
scb->CDB_tag = 0; /* Tagged queueing not supported yet */
scb->devid = cmd->device->id;
scb->lun = cmd->device->lun;
/* copy the command */
memcpy(scb->CDB, cmd->cmnd, cmd->cmd_len);
/* map sense buffer */
scb->sense_buf_length = SCSI_SENSE_BUFFERSIZE;
cmd->SCp.dma_handle = dma_map_single(&wd->pdev->dev, cmd->sense_buffer,
SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
scb->sense_buf = cpu_to_le32(cmd->SCp.dma_handle);
/* request autosense */
scb->SCB_options |= WD719X_SCB_FLAGS_AUTO_REQUEST_SENSE;
/* check direction */
if (cmd->sc_data_direction == DMA_TO_DEVICE)
scb->SCB_options |= WD719X_SCB_FLAGS_CHECK_DIRECTION
| WD719X_SCB_FLAGS_PCI_TO_SCSI;
else if (cmd->sc_data_direction == DMA_FROM_DEVICE)
scb->SCB_options |= WD719X_SCB_FLAGS_CHECK_DIRECTION;
/* Scather/gather */
count_sg = scsi_dma_map(cmd);
if (count_sg < 0) {
wd719x_finish_cmd(cmd, DID_ERROR);
spin_unlock_irqrestore(wd->sh->host_lock, flags);
return 0;
}
BUG_ON(count_sg > WD719X_SG);
if (count_sg) {
struct scatterlist *sg;
scb->data_length = cpu_to_le32(count_sg *
sizeof(struct wd719x_sglist));
scb->data_p = cpu_to_le32(scb->phys +
offsetof(struct wd719x_scb, sg_list));
scsi_for_each_sg(cmd, sg, count_sg, i) {
scb->sg_list[i].ptr = cpu_to_le32(sg_dma_address(sg));
scb->sg_list[i].length = cpu_to_le32(sg_dma_len(sg));
}
scb->SCB_options |= WD719X_SCB_FLAGS_DO_SCATTER_GATHER;
} else { /* zero length */
scb->data_length = 0;
scb->data_p = 0;
}
/* check if the Command register is free */
if (wd719x_readb(wd, WD719X_AMR_COMMAND) != WD719X_CMD_READY) {
spin_unlock_irqrestore(wd->sh->host_lock, flags);
return SCSI_MLQUEUE_HOST_BUSY;
}
/* write pointer to the AMR */
wd719x_writel(wd, WD719X_AMR_SCB_IN, scb->phys);
/* send SCB opcode */
wd719x_writeb(wd, WD719X_AMR_COMMAND, WD719X_CMD_PROCESS_SCB);
spin_unlock_irqrestore(wd->sh->host_lock, flags);
return 0;
}
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static int wd719x_chip_init(struct wd719x *wd)
{
int i, ret;
u32 risc_init[3];
const struct firmware *fw_wcs, *fw_risc;
const char fwname_wcs[] = "wd719x-wcs.bin";
const char fwname_risc[] = "wd719x-risc.bin";
memset(wd->hash_virt, 0, WD719X_HASH_TABLE_SIZE);
/* WCS (sequencer) firmware */
ret = request_firmware(&fw_wcs, fwname_wcs, &wd->pdev->dev);
if (ret) {
dev_err(&wd->pdev->dev, "Unable to load firmware %s: %d\n",
fwname_wcs, ret);
return ret;
}
/* RISC firmware */
ret = request_firmware(&fw_risc, fwname_risc, &wd->pdev->dev);
if (ret) {
dev_err(&wd->pdev->dev, "Unable to load firmware %s: %d\n",
fwname_risc, ret);
release_firmware(fw_wcs);
return ret;
}
wd->fw_size = ALIGN(fw_wcs->size, 4) + fw_risc->size;
if (!wd->fw_virt)
wd->fw_virt = pci_alloc_consistent(wd->pdev, wd->fw_size,
&wd->fw_phys);
if (!wd->fw_virt) {
ret = -ENOMEM;
goto wd719x_init_end;
}
/* make a fresh copy of WCS and RISC code */
memcpy(wd->fw_virt, fw_wcs->data, fw_wcs->size);
memcpy(wd->fw_virt + ALIGN(fw_wcs->size, 4), fw_risc->data,
fw_risc->size);
/* Reset the Spider Chip and adapter itself */
wd719x_writeb(wd, WD719X_PCI_PORT_RESET, WD719X_PCI_RESET);
udelay(WD719X_WAIT_FOR_RISC);
/* Clear PIO mode bits set by BIOS */
wd719x_writeb(wd, WD719X_AMR_CMD_PARAM, 0);
/* ensure RISC is not running */
wd719x_writeb(wd, WD719X_PCI_MODE_SELECT, 0);
/* ensure command port is ready */
wd719x_writeb(wd, WD719X_AMR_COMMAND, 0);
if (wd719x_wait_ready(wd)) {
ret = -ETIMEDOUT;
goto wd719x_init_end;
}
/* Transfer the first 2K words of RISC code to kick start the uP */
risc_init[0] = wd->fw_phys; /* WCS FW */
risc_init[1] = wd->fw_phys + ALIGN(fw_wcs->size, 4); /* RISC FW */
risc_init[2] = wd->hash_phys; /* hash table */
/* clear DMA status */
wd719x_writeb(wd, WD719X_PCI_CHANNEL2_3STATUS, 0);
/* address to read firmware from */
wd719x_writel(wd, WD719X_PCI_EXTERNAL_ADDR, risc_init[1]);
/* base address to write firmware to (on card) */
wd719x_writew(wd, WD719X_PCI_INTERNAL_ADDR, WD719X_PRAM_BASE_ADDR);
/* size: first 2K words */
wd719x_writew(wd, WD719X_PCI_DMA_TRANSFER_SIZE, 2048 * 2);
/* start DMA */
wd719x_writeb(wd, WD719X_PCI_CHANNEL2_3CMD, WD719X_START_CHANNEL2_3DMA);
/* wait for DMA to complete */
i = WD719X_WAIT_FOR_RISC;
while (i-- > 0) {
u8 status = wd719x_readb(wd, WD719X_PCI_CHANNEL2_3STATUS);
if (status == WD719X_START_CHANNEL2_3DONE)
break;
if (status == WD719X_START_CHANNEL2_3ABORT) {
dev_warn(&wd->pdev->dev, "RISC bootstrap failed: DMA aborted\n");
ret = -EIO;
goto wd719x_init_end;
}
udelay(1);
}
if (i < 1) {
dev_warn(&wd->pdev->dev, "RISC bootstrap failed: DMA timeout\n");
ret = -ETIMEDOUT;
goto wd719x_init_end;
}
/* firmware is loaded, now initialize and wake up the RISC */
/* write RISC initialization long words to Spider */
wd719x_writel(wd, WD719X_AMR_SCB_IN, risc_init[0]);
wd719x_writel(wd, WD719X_AMR_SCB_IN + 4, risc_init[1]);
wd719x_writel(wd, WD719X_AMR_SCB_IN + 8, risc_init[2]);
/* disable interrupts during initialization of RISC */
wd719x_writeb(wd, WD719X_AMR_CMD_PARAM, WD719X_DISABLE_INT);
/* issue INITIALIZE RISC comand */
wd719x_writeb(wd, WD719X_AMR_COMMAND, WD719X_CMD_INIT_RISC);
/* enable advanced mode (wake up RISC) */
wd719x_writeb(wd, WD719X_PCI_MODE_SELECT, WD719X_ENABLE_ADVANCE_MODE);
udelay(WD719X_WAIT_FOR_RISC);
ret = wd719x_wait_done(wd, WD719X_WAIT_FOR_RISC);
/* clear interrupt status register */
wd719x_writeb(wd, WD719X_AMR_INT_STATUS, WD719X_INT_NONE);
if (ret) {
dev_warn(&wd->pdev->dev, "Unable to initialize RISC\n");
goto wd719x_init_end;
}
/* RISC is up and running */
/* Read FW version from RISC */
ret = wd719x_direct_cmd(wd, WD719X_CMD_READ_FIRMVER, 0, 0, 0, 0,
WD719X_WAIT_FOR_RISC);
if (ret) {
dev_warn(&wd->pdev->dev, "Unable to read firmware version\n");
goto wd719x_init_end;
}
dev_info(&wd->pdev->dev, "RISC initialized with firmware version %.2x.%.2x\n",
wd719x_readb(wd, WD719X_AMR_SCB_OUT + 1),
wd719x_readb(wd, WD719X_AMR_SCB_OUT));
/* RESET SCSI bus */
ret = wd719x_direct_cmd(wd, WD719X_CMD_BUSRESET, 0, 0, 0, 0,
WD719X_WAIT_FOR_SCSI_RESET);
if (ret) {
dev_warn(&wd->pdev->dev, "SCSI bus reset failed\n");
goto wd719x_init_end;
}
/* use HostParameter structure to set Spider's Host Parameter Block */
ret = wd719x_direct_cmd(wd, WD719X_CMD_SET_PARAM, 0,
sizeof(struct wd719x_host_param), 0,
wd->params_phys, WD719X_WAIT_FOR_RISC);
if (ret) {
dev_warn(&wd->pdev->dev, "Failed to set HOST PARAMETERS\n");
goto wd719x_init_end;
}
/* initiate SCAM (does nothing if disabled in BIOS) */
/* bug?: we should pass a mask of static IDs which we don't have */
ret = wd719x_direct_cmd(wd, WD719X_CMD_INIT_SCAM, 0, 0, 0, 0,
WD719X_WAIT_FOR_SCSI_RESET);
if (ret) {
dev_warn(&wd->pdev->dev, "SCAM initialization failed\n");
goto wd719x_init_end;
}
/* clear AMR_BIOS_SHARE_INT register */
wd719x_writeb(wd, WD719X_AMR_BIOS_SHARE_INT, 0);
wd719x_init_end:
release_firmware(fw_wcs);
release_firmware(fw_risc);
return ret;
}
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static int wd719x_abort(struct scsi_cmnd *cmd)
{
int action, result;
unsigned long flags;
struct wd719x_scb *scb = (struct wd719x_scb *)cmd->host_scribble;
struct wd719x *wd = shost_priv(cmd->device->host);
dev_info(&wd->pdev->dev, "abort command, tag: %x\n", cmd->tag);
action = /*cmd->tag ? WD719X_CMD_ABORT_TAG : */WD719X_CMD_ABORT;
spin_lock_irqsave(wd->sh->host_lock, flags);
result = wd719x_direct_cmd(wd, action, cmd->device->id,
cmd->device->lun, cmd->tag, scb->phys, 0);
spin_unlock_irqrestore(wd->sh->host_lock, flags);
if (result)
return FAILED;
return SUCCESS;
}
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static int wd719x_reset(struct scsi_cmnd *cmd, u8 opcode, u8 device)
{
int result;
unsigned long flags;
struct wd719x *wd = shost_priv(cmd->device->host);
dev_info(&wd->pdev->dev, "%s reset requested\n",
(opcode == WD719X_CMD_BUSRESET) ? "bus" : "device");
spin_lock_irqsave(wd->sh->host_lock, flags);
result = wd719x_direct_cmd(wd, opcode, device, 0, 0, 0,
WD719X_WAIT_FOR_SCSI_RESET);
spin_unlock_irqrestore(wd->sh->host_lock, flags);
if (result)
return FAILED;
return SUCCESS;
}
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static int wd719x_dev_reset(struct scsi_cmnd *cmd)
{
return wd719x_reset(cmd, WD719X_CMD_RESET, cmd->device->id);
}
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static int wd719x_bus_reset(struct scsi_cmnd *cmd)
{
return wd719x_reset(cmd, WD719X_CMD_BUSRESET, 0);
}
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static int wd719x_host_reset(struct scsi_cmnd *cmd)
{
struct wd719x *wd = shost_priv(cmd->device->host);
struct wd719x_scb *scb, *tmp;
unsigned long flags;
int result;
dev_info(&wd->pdev->dev, "host reset requested\n");
spin_lock_irqsave(wd->sh->host_lock, flags);
/* Try to reinit the RISC */
if (wd719x_chip_init(wd) == 0)
result = SUCCESS;
else
result = FAILED;
/* flush all SCBs */
list_for_each_entry_safe(scb, tmp, &wd->active_scbs, list) {
struct scsi_cmnd *tmp_cmd = scb->cmd;
wd719x_finish_cmd(tmp_cmd, result);
}
spin_unlock_irqrestore(wd->sh->host_lock, flags);
return result;
}
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static int wd719x_biosparam(struct scsi_device *sdev, struct block_device *bdev,
sector_t capacity, int geom[])
{
if (capacity >= 0x200000) {
geom[0] = 255; /* heads */
geom[1] = 63; /* sectors */
} else {
geom[0] = 64; /* heads */
geom[1] = 32; /* sectors */
}
geom[2] = sector_div(capacity, geom[0] * geom[1]); /* cylinders */
return 0;
}
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/* process a SCB-completion interrupt */
static inline void wd719x_interrupt_SCB(struct wd719x *wd,
union wd719x_regs regs,
struct wd719x_scb *scb)
{
struct scsi_cmnd *cmd;
int result;
/* now have to find result from card */
switch (regs.bytes.SUE) {
case WD719X_SUE_NOERRORS:
result = DID_OK;
break;
case WD719X_SUE_REJECTED:
dev_err(&wd->pdev->dev, "command rejected\n");
result = DID_ERROR;
break;
case WD719X_SUE_SCBQFULL:
dev_err(&wd->pdev->dev, "SCB queue is full\n");
result = DID_ERROR;
break;
case WD719X_SUE_TERM:
dev_dbg(&wd->pdev->dev, "SCB terminated by direct command\n");
result = DID_ABORT; /* or DID_RESET? */
break;
case WD719X_SUE_CHAN1ABORT:
case WD719X_SUE_CHAN23ABORT:
result = DID_ABORT;
dev_err(&wd->pdev->dev, "DMA abort\n");