Release 4.11 drivers/staging/vt6655/mac.c
/*
* Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* File: mac.c
*
* Purpose: MAC routines
*
* Author: Tevin Chen
*
* Date: May 21, 1996
*
* Functions:
* MACbIsRegBitsOn - Test if All test Bits On
* MACbIsRegBitsOff - Test if All test Bits Off
* MACbIsIntDisable - Test if MAC interrupt disable
* MACvSetShortRetryLimit - Set 802.11 Short Retry limit
* MACvSetLongRetryLimit - Set 802.11 Long Retry limit
* MACvSetLoopbackMode - Set MAC Loopback Mode
* MACvSaveContext - Save Context of MAC Registers
* MACvRestoreContext - Restore Context of MAC Registers
* MACbSoftwareReset - Software Reset MAC
* MACbSafeRxOff - Turn Off MAC Rx
* MACbSafeTxOff - Turn Off MAC Tx
* MACbSafeStop - Stop MAC function
* MACbShutdown - Shut down MAC
* MACvInitialize - Initialize MAC
* MACvSetCurrRxDescAddr - Set Rx Descriptors Address
* MACvSetCurrTx0DescAddr - Set Tx0 Descriptors Address
* MACvSetCurrTx1DescAddr - Set Tx1 Descriptors Address
* MACvTimer0MicroSDelay - Micro Second Delay Loop by MAC
*
* Revision History:
* 08-22-2003 Kyle Hsu : Porting MAC functions from sim53
* 09-03-2003 Bryan YC Fan : Add MACvClearBusSusInd()&
* MACvEnableBusSusEn()
* 09-18-2003 Jerry Chen : Add MACvSetKeyEntry & MACvDisableKeyEntry
*
*/
#include "tmacro.h"
#include "mac.h"
/*
* Description:
* Test if all test bits on
*
* Parameters:
* In:
* io_base - Base Address for MAC
* byRegOfs - Offset of MAC Register
* byTestBits - Test bits
* Out:
* none
*
* Return Value: true if all test bits On; otherwise false
*
*/
bool MACbIsRegBitsOn(struct vnt_private *priv, unsigned char byRegOfs,
unsigned char byTestBits)
{
void __iomem *io_base = priv->PortOffset;
return (ioread8(io_base + byRegOfs) & byTestBits) == byTestBits;
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Malcolm Priestley | 16 | 39.02% | 3 | 37.50% |
Forest Bond | 15 | 36.59% | 1 | 12.50% |
Charles Clément | 5 | 12.20% | 2 | 25.00% |
Jim Lieb | 4 | 9.76% | 1 | 12.50% |
Guillaume Clement | 1 | 2.44% | 1 | 12.50% |
Total | 41 | 100.00% | 8 | 100.00% |
/*
* Description:
* Test if all test bits off
*
* Parameters:
* In:
* io_base - Base Address for MAC
* byRegOfs - Offset of MAC Register
* byTestBits - Test bits
* Out:
* none
*
* Return Value: true if all test bits Off; otherwise false
*
*/
bool MACbIsRegBitsOff(struct vnt_private *priv, unsigned char byRegOfs,
unsigned char byTestBits)
{
void __iomem *io_base = priv->PortOffset;
return !(ioread8(io_base + byRegOfs) & byTestBits);
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Malcolm Priestley | 17 | 42.50% | 3 | 37.50% |
Forest Bond | 15 | 37.50% | 1 | 12.50% |
Charles Clément | 5 | 12.50% | 2 | 25.00% |
Jim Lieb | 2 | 5.00% | 1 | 12.50% |
Guillaume Clement | 1 | 2.50% | 1 | 12.50% |
Total | 40 | 100.00% | 8 | 100.00% |
/*
* Description:
* Test if MAC interrupt disable
*
* Parameters:
* In:
* io_base - Base Address for MAC
* Out:
* none
*
* Return Value: true if interrupt is disable; otherwise false
*
*/
bool MACbIsIntDisable(struct vnt_private *priv)
{
void __iomem *io_base = priv->PortOffset;
if (ioread32(io_base + MAC_REG_IMR))
return false;
return true;
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Malcolm Priestley | 16 | 47.06% | 3 | 37.50% |
Forest Bond | 12 | 35.29% | 1 | 12.50% |
Guillaume Clement | 3 | 8.82% | 1 | 12.50% |
Charles Clément | 3 | 8.82% | 3 | 37.50% |
Total | 34 | 100.00% | 8 | 100.00% |
/*
* Description:
* Set 802.11 Short Retry Limit
*
* Parameters:
* In:
* io_base - Base Address for MAC
* byRetryLimit- Retry Limit
* Out:
* none
*
* Return Value: none
*
*/
void MACvSetShortRetryLimit(struct vnt_private *priv,
unsigned char byRetryLimit)
{
void __iomem *io_base = priv->PortOffset;
/* set SRT */
iowrite8(byRetryLimit, io_base + MAC_REG_SRT);
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Malcolm Priestley | 21 | 63.64% | 4 | 50.00% |
Forest Bond | 9 | 27.27% | 1 | 12.50% |
Charles Clément | 1 | 3.03% | 1 | 12.50% |
Matteo Semenzato | 1 | 3.03% | 1 | 12.50% |
Guillaume Clement | 1 | 3.03% | 1 | 12.50% |
Total | 33 | 100.00% | 8 | 100.00% |
/*
* Description:
* Set 802.11 Long Retry Limit
*
* Parameters:
* In:
* io_base - Base Address for MAC
* byRetryLimit- Retry Limit
* Out:
* none
*
* Return Value: none
*
*/
void MACvSetLongRetryLimit(struct vnt_private *priv,
unsigned char byRetryLimit)
{
void __iomem *io_base = priv->PortOffset;
/* set LRT */
iowrite8(byRetryLimit, io_base + MAC_REG_LRT);
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Malcolm Priestley | 20 | 60.61% | 4 | 50.00% |
Forest Bond | 9 | 27.27% | 1 | 12.50% |
Charles Clément | 2 | 6.06% | 1 | 12.50% |
Matteo Semenzato | 1 | 3.03% | 1 | 12.50% |
Guillaume Clement | 1 | 3.03% | 1 | 12.50% |
Total | 33 | 100.00% | 8 | 100.00% |
/*
* Description:
* Set MAC Loopback mode
*
* Parameters:
* In:
* io_base - Base Address for MAC
* byLoopbackMode - Loopback Mode
* Out:
* none
*
* Return Value: none
*
*/
void MACvSetLoopbackMode(struct vnt_private *priv, unsigned char byLoopbackMode)
{
void __iomem *io_base = priv->PortOffset;
byLoopbackMode <<= 6;
/* set TCR */
iowrite8((ioread8(io_base + MAC_REG_TEST) & 0x3f) | byLoopbackMode,
io_base + MAC_REG_TEST);
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Malcolm Priestley | 32 | 66.67% | 5 | 55.56% |
Forest Bond | 12 | 25.00% | 1 | 11.11% |
Charles Clément | 2 | 4.17% | 1 | 11.11% |
Matteo Semenzato | 1 | 2.08% | 1 | 11.11% |
Guillaume Clement | 1 | 2.08% | 1 | 11.11% |
Total | 48 | 100.00% | 9 | 100.00% |
/*
* Description:
* Save MAC registers to context buffer
*
* Parameters:
* In:
* io_base - Base Address for MAC
* Out:
* cxt_buf - Context buffer
*
* Return Value: none
*
*/
void MACvSaveContext(struct vnt_private *priv, unsigned char *cxt_buf)
{
void __iomem *io_base = priv->PortOffset;
/* read page0 register */
memcpy_fromio(cxt_buf, io_base, MAC_MAX_CONTEXT_SIZE_PAGE0);
MACvSelectPage1(io_base);
/* read page1 register */
memcpy_fromio(cxt_buf + MAC_MAX_CONTEXT_SIZE_PAGE0, io_base,
MAC_MAX_CONTEXT_SIZE_PAGE1);
MACvSelectPage0(io_base);
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Malcolm Priestley | 33 | 58.93% | 5 | 55.56% |
Forest Bond | 17 | 30.36% | 1 | 11.11% |
Charles Clément | 3 | 5.36% | 1 | 11.11% |
Matteo Semenzato | 2 | 3.57% | 1 | 11.11% |
Guillaume Clement | 1 | 1.79% | 1 | 11.11% |
Total | 56 | 100.00% | 9 | 100.00% |
/*
* Description:
* Restore MAC registers from context buffer
*
* Parameters:
* In:
* io_base - Base Address for MAC
* cxt_buf - Context buffer
* Out:
* none
*
* Return Value: none
*
*/
void MACvRestoreContext(struct vnt_private *priv, unsigned char *cxt_buf)
{
void __iomem *io_base = priv->PortOffset;
MACvSelectPage1(io_base);
/* restore page1 */
memcpy_toio(io_base, cxt_buf + MAC_MAX_CONTEXT_SIZE_PAGE0,
MAC_MAX_CONTEXT_SIZE_PAGE1);
MACvSelectPage0(io_base);
/* restore RCR,TCR,IMR... */
memcpy_toio(io_base + MAC_REG_RCR, cxt_buf + MAC_REG_RCR,
MAC_REG_ISR - MAC_REG_RCR);
/* restore MAC Config. */
memcpy_toio(io_base + MAC_REG_LRT, cxt_buf + MAC_REG_LRT,
MAC_REG_PAGE1SEL - MAC_REG_LRT);
iowrite8(*(cxt_buf + MAC_REG_CFG), io_base + MAC_REG_CFG);
/* restore PS Config. */
memcpy_toio(io_base + MAC_REG_PSCFG, cxt_buf + MAC_REG_PSCFG,
MAC_REG_BBREGCTL - MAC_REG_PSCFG);
/* restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR */
iowrite32(*(u32 *)(cxt_buf + MAC_REG_TXDMAPTR0),
io_base + MAC_REG_TXDMAPTR0);
iowrite32(*(u32 *)(cxt_buf + MAC_REG_AC0DMAPTR),
io_base + MAC_REG_AC0DMAPTR);
iowrite32(*(u32 *)(cxt_buf + MAC_REG_BCNDMAPTR),
io_base + MAC_REG_BCNDMAPTR);
iowrite32(*(u32 *)(cxt_buf + MAC_REG_RXDMAPTR0),
io_base + MAC_REG_RXDMAPTR0);
iowrite32(*(u32 *)(cxt_buf + MAC_REG_RXDMAPTR1),
io_base + MAC_REG_RXDMAPTR1);
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Malcolm Priestley | 137 | 68.84% | 8 | 57.14% |
Forest Bond | 47 | 23.62% | 1 | 7.14% |
Charles Clément | 7 | 3.52% | 2 | 14.29% |
Matteo Semenzato | 5 | 2.51% | 1 | 7.14% |
Jim Lieb | 2 | 1.01% | 1 | 7.14% |
Guillaume Clement | 1 | 0.50% | 1 | 7.14% |
Total | 199 | 100.00% | 14 | 100.00% |
/*
* Description:
* Software Reset MAC
*
* Parameters:
* In:
* io_base - Base Address for MAC
* Out:
* none
*
* Return Value: true if Reset Success; otherwise false
*
*/
bool MACbSoftwareReset(struct vnt_private *priv)
{
void __iomem *io_base = priv->PortOffset;
unsigned short ww;
/* turn on HOSTCR_SOFTRST, just write 0x01 to reset */
iowrite8(0x01, io_base + MAC_REG_HOSTCR);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_SOFTRST))
break;
}
if (ww == W_MAX_TIMEOUT)
return false;
return true;
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Forest Bond | 37 | 49.33% | 1 | 9.09% |
Malcolm Priestley | 32 | 42.67% | 5 | 45.45% |
Charles Clément | 3 | 4.00% | 3 | 27.27% |
Jim Lieb | 2 | 2.67% | 1 | 9.09% |
Matteo Semenzato | 1 | 1.33% | 1 | 9.09% |
Total | 75 | 100.00% | 11 | 100.00% |
/*
* Description:
* save some important register's value, then do reset, then restore
* register's value
*
* Parameters:
* In:
* io_base - Base Address for MAC
* Out:
* none
*
* Return Value: true if success; otherwise false
*
*/
bool MACbSafeSoftwareReset(struct vnt_private *priv)
{
unsigned char abyTmpRegData[MAC_MAX_CONTEXT_SIZE_PAGE0 + MAC_MAX_CONTEXT_SIZE_PAGE1];
bool bRetVal;
/* PATCH....
* save some important register's value, then do
* reset, then restore register's value
*/
/* save MAC context */
MACvSaveContext(priv, abyTmpRegData);
/* do reset */
bRetVal = MACbSoftwareReset(priv);
/* restore MAC context, except CR0 */
MACvRestoreContext(priv, abyTmpRegData);
return bRetVal;
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Malcolm Priestley | 27 | 54.00% | 2 | 33.33% |
Forest Bond | 17 | 34.00% | 1 | 16.67% |
Matteo Semenzato | 4 | 8.00% | 1 | 16.67% |
Charles Clément | 1 | 2.00% | 1 | 16.67% |
Guillaume Clement | 1 | 2.00% | 1 | 16.67% |
Total | 50 | 100.00% | 6 | 100.00% |
/*
* Description:
* Turn Off MAC Rx
*
* Parameters:
* In:
* io_base - Base Address for MAC
* Out:
* none
*
* Return Value: true if success; otherwise false
*
*/
bool MACbSafeRxOff(struct vnt_private *priv)
{
void __iomem *io_base = priv->PortOffset;
unsigned short ww;
/* turn off wow temp for turn off Rx safely */
/* Clear RX DMA0,1 */
iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_RXDMACTL0);
iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_RXDMACTL1);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
if (!(ioread32(io_base + MAC_REG_RXDMACTL0) & DMACTL_RUN))
break;
}
if (ww == W_MAX_TIMEOUT) {
pr_debug(" DBG_PORT80(0x10)\n");
return false;
}
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
if (!(ioread32(io_base + MAC_REG_RXDMACTL1) & DMACTL_RUN))
break;
}
if (ww == W_MAX_TIMEOUT) {
pr_debug(" DBG_PORT80(0x11)\n");
return false;
}
/* try to safe shutdown RX */
MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_RXON);
/* W_MAX_TIMEOUT is the timeout period */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_RXONST))
break;
}
if (ww == W_MAX_TIMEOUT) {
pr_debug(" DBG_PORT80(0x12)\n");
return false;
}
return true;
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Forest Bond | 111 | 56.92% | 1 | 9.09% |
Malcolm Priestley | 69 | 35.38% | 6 | 54.55% |
Jim Lieb | 6 | 3.08% | 1 | 9.09% |
Matteo Semenzato | 4 | 2.05% | 1 | 9.09% |
Guillaume Clement | 3 | 1.54% | 1 | 9.09% |
Charles Clément | 2 | 1.03% | 1 | 9.09% |
Total | 195 | 100.00% | 11 | 100.00% |
/*
* Description:
* Turn Off MAC Tx
*
* Parameters:
* In:
* io_base - Base Address for MAC
* Out:
* none
*
* Return Value: true if success; otherwise false
*
*/
bool MACbSafeTxOff(struct vnt_private *priv)
{
void __iomem *io_base = priv->PortOffset;
unsigned short ww;
/* Clear TX DMA */
/* Tx0 */
iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_TXDMACTL0);
/* AC0 */
iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_AC0DMACTL);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
if (!(ioread32(io_base + MAC_REG_TXDMACTL0) & DMACTL_RUN))
break;
}
if (ww == W_MAX_TIMEOUT) {
pr_debug(" DBG_PORT80(0x20)\n");
return false;
}
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
if (!(ioread32(io_base + MAC_REG_AC0DMACTL) & DMACTL_RUN))
break;
}
if (ww == W_MAX_TIMEOUT) {
pr_debug(" DBG_PORT80(0x21)\n");
return false;
}
/* try to safe shutdown TX */
MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_TXON);
/* W_MAX_TIMEOUT is the timeout period */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_TXONST))
break;
}
if (ww == W_MAX_TIMEOUT) {
pr_debug(" DBG_PORT80(0x24)\n");
return false;
}
return true;
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Malcolm Priestley | 98 | 50.00% | 6 | 50.00% |
Forest Bond | 83 | 42.35% | 1 | 8.33% |
Matteo Semenzato | 5 | 2.55% | 1 | 8.33% |
Jim Lieb | 4 | 2.04% | 1 | 8.33% |
Guillaume Clement | 3 | 1.53% | 1 | 8.33% |
Charles Clément | 2 | 1.02% | 1 | 8.33% |
Joe Perches | 1 | 0.51% | 1 | 8.33% |
Total | 196 | 100.00% | 12 | 100.00% |
/*
* Description:
* Stop MAC function
*
* Parameters:
* In:
* io_base - Base Address for MAC
* Out:
* none
*
* Return Value: true if success; otherwise false
*
*/
bool MACbSafeStop(struct vnt_private *priv)
{
void __iomem *io_base = priv->PortOffset;
MACvRegBitsOff(io_base, MAC_REG_TCR, TCR_AUTOBCNTX);
if (!MACbSafeRxOff(priv)) {
pr_debug(" MACbSafeRxOff == false)\n");
MACbSafeSoftwareReset(priv);
return false;
}
if (!MACbSafeTxOff(priv)) {
pr_debug(" MACbSafeTxOff == false)\n");
MACbSafeSoftwareReset(priv);
return false;
}
MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_MACEN);
return true;
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Malcolm Priestley | 64 | 74.42% | 3 | 60.00% |
Forest Bond | 19 | 22.09% | 1 | 20.00% |
Guillaume Clement | 3 | 3.49% | 1 | 20.00% |
Total | 86 | 100.00% | 5 | 100.00% |
/*
* Description:
* Shut Down MAC
*
* Parameters:
* In:
* io_base - Base Address for MAC
* Out:
* none
*
* Return Value: true if success; otherwise false
*
*/
bool MACbShutdown(struct vnt_private *priv)
{
void __iomem *io_base = priv->PortOffset;
/* disable MAC IMR */
MACvIntDisable(io_base);
MACvSetLoopbackMode(priv, MAC_LB_INTERNAL);
/* stop the adapter */
if (!MACbSafeStop(priv)) {
MACvSetLoopbackMode(priv, MAC_LB_NONE);
return false;
}
MACvSetLoopbackMode(priv, MAC_LB_NONE);
return true;
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Malcolm Priestley | 37 | 58.73% | 3 | 50.00% |
Forest Bond | 21 | 33.33% | 1 | 16.67% |
Guillaume Clement | 3 | 4.76% | 1 | 16.67% |
Matteo Semenzato | 2 | 3.17% | 1 | 16.67% |
Total | 63 | 100.00% | 6 | 100.00% |
/*
* Description:
* Initialize MAC
*
* Parameters:
* In:
* io_base - Base Address for MAC
* Out:
* none
*
* Return Value: none
*
*/
void MACvInitialize(struct vnt_private *priv)
{
void __iomem *io_base = priv->PortOffset;
/* clear sticky bits */
MACvClearStckDS(io_base);
/* disable force PME-enable */
iowrite8(PME_OVR, io_base + MAC_REG_PMC1);
/* only 3253 A */
/* do reset */
MACbSoftwareReset(priv);
/* reset TSF counter */
iowrite8(TFTCTL_TSFCNTRST, io_base + MAC_REG_TFTCTL);
/* enable TSF counter */
iowrite8(TFTCTL_TSFCNTREN, io_base + MAC_REG_TFTCTL);
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Malcolm Priestley | 44 | 70.97% | 4 | 66.67% |
Forest Bond | 12 | 19.35% | 1 | 16.67% |
Matteo Semenzato | 6 | 9.68% | 1 | 16.67% |
Total | 62 | 100.00% | 6 | 100.00% |
/*
* Description:
* Set the chip with current rx descriptor address
*
* Parameters:
* In:
* io_base - Base Address for MAC
* curr_desc_addr - Descriptor Address
* Out:
* none
*
* Return Value: none
*
*/
void MACvSetCurrRx0DescAddr(struct vnt_private *priv, u32 curr_desc_addr)
{
void __iomem *io_base = priv->PortOffset;
unsigned short ww;
unsigned char org_dma_ctl;
org_dma_ctl = ioread8(io_base + MAC_REG_RXDMACTL0);
if (org_dma_ctl & DMACTL_RUN)
iowrite8(DMACTL_RUN, io_base + MAC_REG_RXDMACTL0 + 2);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
if (!(ioread8(io_base + MAC_REG_RXDMACTL0) & DMACTL_RUN))
break;
}
iowrite32(curr_desc_addr, io_base + MAC_REG_RXDMAPTR0);
if (org_dma_ctl & DMACTL_RUN)
iowrite8(DMACTL_RUN, io_base + MAC_REG_RXDMACTL0);
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Malcolm Priestley | 64 | 58.18% | 10 | 66.67% |
Forest Bond | 40 | 36.36% | 1 | 6.67% |
Jim Lieb | 3 | 2.73% | 1 | 6.67% |
Charles Clément | 2 | 1.82% | 2 | 13.33% |
Guillaume Clement | 1 | 0.91% | 1 | 6.67% |
Total | 110 | 100.00% | 15 | 100.00% |
/*
* Description:
* Set the chip with current rx descriptor address
*
* Parameters:
* In:
* io_base - Base Address for MAC
* curr_desc_addr - Descriptor Address
* Out:
* none
*
* Return Value: none
*
*/
void MACvSetCurrRx1DescAddr(struct vnt_private *priv, u32 curr_desc_addr)
{
void __iomem *io_base = priv->PortOffset;
unsigned short ww;
unsigned char org_dma_ctl;
org_dma_ctl = ioread8(io_base + MAC_REG_RXDMACTL1);
if (org_dma_ctl & DMACTL_RUN)
iowrite8(DMACTL_RUN, io_base + MAC_REG_RXDMACTL1 + 2);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
if (!(ioread8(io_base + MAC_REG_RXDMACTL1) & DMACTL_RUN))
break;
}
iowrite32(curr_desc_addr, io_base + MAC_REG_RXDMAPTR1);
if (org_dma_ctl & DMACTL_RUN)
iowrite8(DMACTL_RUN, io_base + MAC_REG_RXDMACTL1);
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Malcolm Priestley | 68 | 61.82% | 10 | 66.67% |
Forest Bond | 38 | 34.55% | 1 | 6.67% |
Charles Clément | 2 | 1.82% | 2 | 13.33% |
Guillaume Clement | 1 | 0.91% | 1 | 6.67% |
Jim Lieb | 1 | 0.91% | 1 | 6.67% |
Total | 110 | 100.00% | 15 | 100.00% |
/*
* Description:
* Set the chip with current tx0 descriptor address
*
* Parameters:
* In:
* io_base - Base Address for MAC
* curr_desc_addr - Descriptor Address
* Out:
* none
*
* Return Value: none
*
*/
void MACvSetCurrTx0DescAddrEx(struct vnt_private *priv,
u32 curr_desc_addr)
{
void __iomem *io_base = priv->PortOffset;
unsigned short ww;
unsigned char org_dma_ctl;
org_dma_ctl = ioread8(io_base + MAC_REG_TXDMACTL0);
if (org_dma_ctl & DMACTL_RUN)
iowrite8(DMACTL_RUN, io_base + MAC_REG_TXDMACTL0 + 2);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
if (!(ioread8(io_base + MAC_REG_TXDMACTL0) & DMACTL_RUN))
break;
}
iowrite32(curr_desc_addr, io_base + MAC_REG_TXDMAPTR0);
if (org_dma_ctl & DMACTL_RUN)
iowrite8(DMACTL_RUN, io_base + MAC_REG_TXDMACTL0);
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Malcolm Priestley | 68 | 61.82% | 10 | 71.43% |
Forest Bond | 38 | 34.55% | 1 | 7.14% |
Charles Clément | 2 | 1.82% | 1 | 7.14% |
Guillaume Clement | 1 | 0.91% | 1 | 7.14% |
Jim Lieb | 1 | 0.91% | 1 | 7.14% |
Total | 110 | 100.00% | 14 | 100.00% |
/*
* Description:
* Set the chip with current AC0 descriptor address
*
* Parameters:
* In:
* io_base - Base Address for MAC
* curr_desc_addr - Descriptor Address
* Out:
* none
*
* Return Value: none
*
*/
/* TxDMA1 = AC0DMA */
void MACvSetCurrAC0DescAddrEx(struct vnt_private *priv,
u32 curr_desc_addr)
{
void __iomem *io_base = priv->PortOffset;
unsigned short ww;
unsigned char org_dma_ctl;
org_dma_ctl = ioread8(io_base + MAC_REG_AC0DMACTL);
if (org_dma_ctl & DMACTL_RUN)
iowrite8(DMACTL_RUN, io_base + MAC_REG_AC0DMACTL + 2);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
if (!(ioread8(io_base + MAC_REG_AC0DMACTL) & DMACTL_RUN))
break;
}
if (ww == W_MAX_TIMEOUT)
pr_debug(" DBG_PORT80(0x26)\n");
iowrite32(curr_desc_addr, io_base + MAC_REG_AC0DMAPTR);
if (org_dma_ctl & DMACTL_RUN)
iowrite8(DMACTL_RUN, io_base + MAC_REG_AC0DMACTL);
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Malcolm Priestley | 78 | 64.46% | 10 | 71.43% |
Forest Bond | 39 | 32.23% | 1 | 7.14% |
Charles Clément | 2 | 1.65% | 1 | 7.14% |
Joe Perches | 1 | 0.83% | 1 | 7.14% |
Guillaume Clement | 1 | 0.83% | 1 | 7.14% |
Total | 121 | 100.00% | 14 | 100.00% |
void MACvSetCurrTXDescAddr(int iTxType, struct vnt_private *priv,
u32 curr_desc_addr)
{
if (iTxType == TYPE_AC0DMA)
MACvSetCurrAC0DescAddrEx(priv, curr_desc_addr);
else if (iTxType == TYPE_TXDMA0)
MACvSetCurrTx0DescAddrEx(priv, curr_desc_addr);
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Malcolm Priestley | 35 | 81.40% | 4 | 80.00% |
Forest Bond | 8 | 18.60% | 1 | 20.00% |
Total | 43 | 100.00% | 5 | 100.00% |
/*
* Description:
* Micro Second Delay via MAC
*
* Parameters:
* In:
* io_base - Base Address for MAC
* uDelay - Delay time (timer resolution is 4 us)
* Out:
* none
*
* Return Value: none
*
*/
void MACvTimer0MicroSDelay(struct vnt_private *priv, unsigned int uDelay)
{
void __iomem *io_base = priv->PortOffset;
unsigned char byValue;
unsigned int uu, ii;
iowrite8(0, io_base + MAC_REG_TMCTL0);
iowrite32(uDelay, io_base + MAC_REG_TMDATA0);
iowrite8((TMCTL_TMD | TMCTL_TE), io_base + MAC_REG_TMCTL0);
for (ii = 0; ii < 66; ii++) { /* assume max PCI clock is 66Mhz */
for (uu = 0; uu < uDelay; uu++) {
byValue = ioread8(io_base + MAC_REG_TMCTL0);
if ((byValue == 0) ||
(byValue & TMCTL_TSUSP)) {
iowrite8(0, io_base + MAC_REG_TMCTL0);
return;
}
}
}
iowrite8(0, io_base + MAC_REG_TMCTL0);
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Malcolm Priestley | 100 | 71.94% | 6 | 75.00% |
Forest Bond | 38 | 27.34% | 1 | 12.50% |
Matteo Semenzato | 1 | 0.72% | 1 | 12.50% |
Total | 139 | 100.00% | 8 | 100.00% |
/*
* Description:
* Micro Second One shot timer via MAC
*
* Parameters:
* In:
* io_base - Base Address for MAC
* uDelay - Delay time
* Out:
* none
*
* Return Value: none
*
*/
void MACvOneShotTimer1MicroSec(struct vnt_private *priv,
unsigned int uDelayTime)
{
void __iomem *io_base = priv->PortOffset;
iowrite8(0, io_base + MAC_REG_TMCTL1);
iowrite32(uDelayTime, io_base + MAC_REG_TMDATA1);
iowrite8((TMCTL_TMD | TMCTL_TE), io_base + MAC_REG_TMCTL1);
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Malcolm Priestley | 34 | 62.96% | 5 | 62.50% |
Forest Bond | 17 | 31.48% | 1 | 12.50% |
Charles Clément | 2 | 3.70% | 1 | 12.50% |
Guillaume Clement | 1 | 1.85% | 1 | 12.50% |
Total | 54 | 100.00% | 8 | 100.00% |
void MACvSetMISCFifo(struct vnt_private *priv, unsigned short offset,
u32 data)
{
void __iomem *io_base = priv->PortOffset;
if (offset > 273)
return;
iowrite16(offset, io_base + MAC_REG_MISCFFNDEX);
iowrite32(data, io_base + MAC_REG_MISCFFDATA);
iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Malcolm Priestley | 34 | 56.67% | 8 | 66.67% |
Forest Bond | 23 | 38.33% | 1 | 8.33% |
Charles Clément | 2 | 3.33% | 2 | 16.67% |
Guillaume Clement | 1 | 1.67% | 1 | 8.33% |
Total | 60 | 100.00% | 12 | 100.00% |
bool MACbPSWakeup(struct vnt_private *priv)
{
void __iomem *io_base = priv->PortOffset;
unsigned int ww;
/* Read PSCTL */
if (MACbIsRegBitsOff(priv, MAC_REG_PSCTL, PSCTL_PS))
return true;
/* Disable PS */
MACvRegBitsOff(io_base, MAC_REG_PSCTL, PSCTL_PSEN);
/* Check if SyncFlushOK */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
if (ioread8(io_base + MAC_REG_PSCTL) & PSCTL_WAKEDONE)
break;
}
if (ww == W_MAX_TIMEOUT) {
pr_debug(" DBG_PORT80(0x33)\n");
return false;
}
return true;
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Malcolm Priestley | 74 | 77.89% | 4 | 44.44% |
Forest Bond | 13 | 13.68% | 1 | 11.11% |
Guillaume Clement | 3 | 3.16% | 1 | 11.11% |
Matteo Semenzato | 3 | 3.16% | 1 | 11.11% |
Joe Perches | 1 | 1.05% | 1 | 11.11% |
Charles Clément | 1 | 1.05% | 1 | 11.11% |
Total | 95 | 100.00% | 9 | 100.00% |
/*
* Description:
* Set the Key by MISCFIFO
*
* Parameters:
* In:
* io_base - Base Address for MAC
*
* Out:
* none
*
* Return Value: none
*
*/
void MACvSetKeyEntry(struct vnt_private *priv, unsigned short wKeyCtl,
unsigned int uEntryIdx, unsigned int uKeyIdx,
unsigned char *pbyAddr, u32 *pdwKey,
unsigned char byLocalID)
{
void __iomem *io_base = priv->PortOffset;
unsigned short offset;
u32 data;
int ii;
if (byLocalID <= 1)
return;
pr_debug("MACvSetKeyEntry\n");
offset = MISCFIFO_KEYETRY0;
offset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
data = 0;
data |= wKeyCtl;
data <<= 16;
data |= MAKEWORD(*(pbyAddr + 4), *(pbyAddr + 5));
pr_debug("1. offset: %d, Data: %X, KeyCtl:%X\n",
offset, data, wKeyCtl);
iowrite16(offset, io_base + MAC_REG_MISCFFNDEX);
iowrite32(data, io_base + MAC_REG_MISCFFDATA);
iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
offset++;
data = 0;
data |= *(pbyAddr + 3);
data <<= 8;
data |= *(pbyAddr + 2);
data <<= 8;
data |= *(pbyAddr + 1);
data <<= 8;
data |= *pbyAddr;
pr_debug("2. offset: %d, Data: %X\n", offset, data);
iowrite16(offset, io_base + MAC_REG_MISCFFNDEX);
iowrite32(data, io_base + MAC_REG_MISCFFDATA);
iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
offset++;
offset += (uKeyIdx * 4);
for (ii = 0; ii < 4; ii++) {
/* always push 128 bits */
pr_debug("3.(%d) offset: %d, Data: %X\n",
ii, offset + ii, *pdwKey);
iowrite16(offset + ii, io_base + MAC_REG_MISCFFNDEX);
iowrite32(*pdwKey++, io_base + MAC_REG_MISCFFDATA);
iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
}
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Malcolm Priestley | 168 | 54.90% | 7 | 46.67% |
Forest Bond | 124 | 40.52% | 1 | 6.67% |
Charles Clément | 10 | 3.27% | 4 | 26.67% |
Joe Perches | 2 | 0.65% | 1 | 6.67% |
Matteo Semenzato | 1 | 0.33% | 1 | 6.67% |
Guillaume Clement | 1 | 0.33% | 1 | 6.67% |
Total | 306 | 100.00% | 15 | 100.00% |
/*
* Description:
* Disable the Key Entry by MISCFIFO
*
* Parameters:
* In:
* io_base - Base Address for MAC
*
* Out:
* none
*
* Return Value: none
*
*/
void MACvDisableKeyEntry(struct vnt_private *priv, unsigned int uEntryIdx)
{
void __iomem *io_base = priv->PortOffset;
unsigned short offset;
offset = MISCFIFO_KEYETRY0;
offset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
iowrite16(offset, io_base + MAC_REG_MISCFFNDEX);
iowrite32(0, io_base + MAC_REG_MISCFFDATA);
iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Forest Bond | 33 | 50.00% | 1 | 10.00% |
Malcolm Priestley | 28 | 42.42% | 6 | 60.00% |
Charles Clément | 4 | 6.06% | 2 | 20.00% |
Guillaume Clement | 1 | 1.52% | 1 | 10.00% |
Total | 66 | 100.00% | 10 | 100.00% |
Overall Contributors
Person | Tokens | Prop | Commits | CommitProp |
Malcolm Priestley | 1436 | 58.47% | 19 | 54.29% |
Forest Bond | 853 | 34.73% | 1 | 2.86% |
Charles Clément | 63 | 2.57% | 9 | 25.71% |
Matteo Semenzato | 38 | 1.55% | 1 | 2.86% |
Guillaume Clement | 34 | 1.38% | 1 | 2.86% |
Jim Lieb | 25 | 1.02% | 1 | 2.86% |
Joe Perches | 5 | 0.20% | 1 | 2.86% |
Varsha Rao | 1 | 0.04% | 1 | 2.86% |
Kathryn Hampton | 1 | 0.04% | 1 | 2.86% |
Total | 2456 | 100.00% | 35 | 100.00% |
Information contained on this website is for historical information purposes only and does not indicate or represent copyright ownership.