Release 4.11 drivers/watchdog/sa1100_wdt.c
/*
* Watchdog driver for the SA11x0/PXA2xx
*
* (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
* Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
* Neither Oleg Drokin nor iXcelerator.com admit liability nor provide
* warranty for any of this software. This material is provided
* "AS-IS" and at no charge.
*
* (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
*
* 27/11/2000 Initial release
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/clk.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/fs.h>
#include <linux/miscdevice.h>
#include <linux/watchdog.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/bitops.h>
#include <linux/uaccess.h>
#include <linux/timex.h>
#ifdef CONFIG_ARCH_PXA
#include <mach/regs-ost.h>
#endif
#include <mach/reset.h>
#include <mach/hardware.h>
static unsigned long oscr_freq;
static unsigned long sa1100wdt_users;
static unsigned int pre_margin;
static int boot_status;
/*
* Allow only one person to hold it open
*/
static int sa1100dog_open(struct inode *inode, struct file *file)
{
if (test_and_set_bit(1, &sa1100wdt_users))
return -EBUSY;
/* Activate SA1100 Watchdog timer */
writel_relaxed(readl_relaxed(OSCR) + pre_margin, OSMR3);
writel_relaxed(OSSR_M3, OSSR);
writel_relaxed(OWER_WME, OWER);
writel_relaxed(readl_relaxed(OIER) | OIER_E3, OIER);
return nonseekable_open(inode, file);
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Russell King | 71 | 92.21% | 2 | 66.67% |
Wim Van Sebroeck | 6 | 7.79% | 1 | 33.33% |
Total | 77 | 100.00% | 3 | 100.00% |
/*
* The watchdog cannot be disabled.
*
* Previous comments suggested that turning off the interrupt by
* clearing OIER[E3] would prevent the watchdog timing out but this
* does not appear to be true (at least on the PXA255).
*/
static int sa1100dog_release(struct inode *inode, struct file *file)
{
pr_crit("Device closed - timer will not stop\n");
clear_bit(1, &sa1100wdt_users);
return 0;
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Russell King | 30 | 93.75% | 1 | 50.00% |
Joe Perches | 2 | 6.25% | 1 | 50.00% |
Total | 32 | 100.00% | 2 | 100.00% |
static ssize_t sa1100dog_write(struct file *file, const char __user *data,
size_t len, loff_t *ppos)
{
if (len)
/* Refresh OSMR3 timer. */
writel_relaxed(readl_relaxed(OSCR) + pre_margin, OSMR3);
return len;
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Russell King | 43 | 97.73% | 2 | 66.67% |
Ian Campbell | 1 | 2.27% | 1 | 33.33% |
Total | 44 | 100.00% | 3 | 100.00% |
static const struct watchdog_info ident = {
.options = WDIOF_CARDRESET | WDIOF_SETTIMEOUT
| WDIOF_KEEPALIVEPING,
.identity = "SA1100/PXA255 Watchdog",
.firmware_version = 1,
};
static long sa1100dog_ioctl(struct file *file, unsigned int cmd,
unsigned long arg)
{
int ret = -ENOTTY;
int time;
void __user *argp = (void __user *)arg;
int __user *p = argp;
switch (cmd) {
case WDIOC_GETSUPPORT:
ret = copy_to_user(argp, &ident,
sizeof(ident)) ? -EFAULT : 0;
break;
case WDIOC_GETSTATUS:
ret = put_user(0, p);
break;
case WDIOC_GETBOOTSTATUS:
ret = put_user(boot_status, p);
break;
case WDIOC_KEEPALIVE:
writel_relaxed(readl_relaxed(OSCR) + pre_margin, OSMR3);
ret = 0;
break;
case WDIOC_SETTIMEOUT:
ret = get_user(time, p);
if (ret)
break;
if (time <= 0 || (oscr_freq * (long long)time >= 0xffffffff)) {
ret = -EINVAL;
break;
}
pre_margin = oscr_freq * time;
writel_relaxed(readl_relaxed(OSCR) + pre_margin, OSMR3);
/*fall through*/
case WDIOC_GETTIMEOUT:
ret = put_user(pre_margin / oscr_freq, p);
break;
}
return ret;
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Russell King | 153 | 75.37% | 2 | 25.00% |
Ian Campbell | 24 | 11.82% | 1 | 12.50% |
Wim Van Sebroeck | 12 | 5.91% | 1 | 12.50% |
Raphaël Assénat | 10 | 4.93% | 1 | 12.50% |
Eric Miao | 2 | 0.99% | 1 | 12.50% |
Alan Cox | 1 | 0.49% | 1 | 12.50% |
Samuel Tardieu | 1 | 0.49% | 1 | 12.50% |
Total | 203 | 100.00% | 8 | 100.00% |
static const struct file_operations sa1100dog_fops = {
.owner = THIS_MODULE,
.llseek = no_llseek,
.write = sa1100dog_write,
.unlocked_ioctl = sa1100dog_ioctl,
.open = sa1100dog_open,
.release = sa1100dog_release,
};
static struct miscdevice sa1100dog_miscdev = {
.minor = WATCHDOG_MINOR,
.name = "watchdog",
.fops = &sa1100dog_fops,
};
static int margin __initdata = 60;
/* (secs) Default is 1 minute */
static struct clk *clk;
static int __init sa1100dog_init(void)
{
int ret;
clk = clk_get(NULL, "OSTIMER0");
if (IS_ERR(clk)) {
pr_err("SA1100/PXA2xx Watchdog Timer: clock not found: %d\n",
(int) PTR_ERR(clk));
return PTR_ERR(clk);
}
ret = clk_prepare_enable(clk);
if (ret) {
pr_err("SA1100/PXA2xx Watchdog Timer: clock failed to prepare+enable: %d\n",
ret);
goto err;
}
oscr_freq = clk_get_rate(clk);
/*
* Read the reset status, and save it for later. If
* we suspend, RCSR will be cleared, and the watchdog
* reset reason will be lost.
*/
boot_status = (reset_status & RESET_STATUS_WATCHDOG) ?
WDIOF_CARDRESET : 0;
pre_margin = oscr_freq * margin;
ret = misc_register(&sa1100dog_miscdev);
if (ret == 0) {
pr_info("SA1100/PXA2xx Watchdog Timer: timer margin %d sec\n",
margin);
return 0;
}
clk_disable_unprepare(clk);
err:
clk_put(clk);
return ret;
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Robert Jarzmik | 77 | 55.40% | 1 | 14.29% |
Russell King | 49 | 35.25% | 1 | 14.29% |
Eric Miao | 6 | 4.32% | 2 | 28.57% |
Vladimir Zapolskiy | 5 | 3.60% | 1 | 14.29% |
Joe Perches | 1 | 0.72% | 1 | 14.29% |
Ian Campbell | 1 | 0.72% | 1 | 14.29% |
Total | 139 | 100.00% | 7 | 100.00% |
static void __exit sa1100dog_exit(void)
{
misc_deregister(&sa1100dog_miscdev);
clk_disable_unprepare(clk);
clk_put(clk);
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Russell King | 15 | 60.00% | 1 | 50.00% |
Robert Jarzmik | 10 | 40.00% | 1 | 50.00% |
Total | 25 | 100.00% | 2 | 100.00% |
module_init(sa1100dog_init);
module_exit(sa1100dog_exit);
MODULE_AUTHOR("Oleg Drokin <green@crimea.edu>");
MODULE_DESCRIPTION("SA1100/PXA2xx Watchdog");
module_param(margin, int, 0);
MODULE_PARM_DESC(margin, "Watchdog margin in seconds (default 60s)");
MODULE_LICENSE("GPL");
Overall Contributors
Person | Tokens | Prop | Commits | CommitProp |
Russell King | 520 | 69.80% | 5 | 17.86% |
Robert Jarzmik | 96 | 12.89% | 1 | 3.57% |
Ian Campbell | 37 | 4.97% | 6 | 21.43% |
Wim Van Sebroeck | 24 | 3.22% | 4 | 14.29% |
Eric Miao | 16 | 2.15% | 3 | 10.71% |
Raphaël Assénat | 16 | 2.15% | 1 | 3.57% |
Joe Perches | 10 | 1.34% | 1 | 3.57% |
Andrew Morton | 7 | 0.94% | 1 | 3.57% |
Alan Cox | 6 | 0.81% | 1 | 3.57% |
Vladimir Zapolskiy | 5 | 0.67% | 1 | 3.57% |
Rob Herring | 3 | 0.40% | 1 | 3.57% |
Jiri Slaby | 3 | 0.40% | 1 | 3.57% |
Arjan van de Ven | 1 | 0.13% | 1 | 3.57% |
Samuel Tardieu | 1 | 0.13% | 1 | 3.57% |
Total | 745 | 100.00% | 28 | 100.00% |
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