Release 4.12 drivers/clocksource/mips-gic-timer.c
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
*/
#include <linux/clk.h>
#include <linux/clockchips.h>
#include <linux/cpu.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irqchip/mips-gic.h>
#include <linux/notifier.h>
#include <linux/of_irq.h>
#include <linux/percpu.h>
#include <linux/smp.h>
#include <linux/time.h>
static DEFINE_PER_CPU(struct clock_event_device, gic_clockevent_device);
static int gic_timer_irq;
static unsigned int gic_frequency;
static int gic_next_event(unsigned long delta, struct clock_event_device *evt)
{
u64 cnt;
int res;
cnt = gic_read_count();
cnt += (u64)delta;
gic_write_cpu_compare(cnt, cpumask_first(evt->cpumask));
res = ((int)(gic_read_count() - cnt) >= 0) ? -ETIME : 0;
return res;
}
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| Person | Tokens | Prop | Commits | CommitProp |
| Andrew Bresticker | 69 | 100.00% | 1 | 100.00% |
| Total | 69 | 100.00% | 1 | 100.00% |
static irqreturn_t gic_compare_interrupt(int irq, void *dev_id)
{
struct clock_event_device *cd = dev_id;
gic_write_compare(gic_read_compare());
cd->event_handler(cd);
return IRQ_HANDLED;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Andrew Bresticker | 36 | 100.00% | 3 | 100.00% |
| Total | 36 | 100.00% | 3 | 100.00% |
struct irqaction gic_compare_irqaction = {
.handler = gic_compare_interrupt,
.percpu_dev_id = &gic_clockevent_device,
.flags = IRQF_PERCPU | IRQF_TIMER,
.name = "timer",
};
static void gic_clockevent_cpu_init(unsigned int cpu,
struct clock_event_device *cd)
{
cd->name = "MIPS GIC";
cd->features = CLOCK_EVT_FEAT_ONESHOT |
CLOCK_EVT_FEAT_C3STOP;
cd->rating = 350;
cd->irq = gic_timer_irq;
cd->cpumask = cpumask_of(cpu);
cd->set_next_event = gic_next_event;
clockevents_config_and_register(cd, gic_frequency, 0x300, 0x7fffffff);
enable_percpu_irq(gic_timer_irq, IRQ_TYPE_NONE);
}
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| Person | Tokens | Prop | Commits | CommitProp |
| Andrew Bresticker | 70 | 94.59% | 4 | 80.00% |
| Richard Cochran | 4 | 5.41% | 1 | 20.00% |
| Total | 74 | 100.00% | 5 | 100.00% |
static void gic_clockevent_cpu_exit(struct clock_event_device *cd)
{
disable_percpu_irq(gic_timer_irq);
}
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| Person | Tokens | Prop | Commits | CommitProp |
| Andrew Bresticker | 16 | 100.00% | 1 | 100.00% |
| Total | 16 | 100.00% | 1 | 100.00% |
static void gic_update_frequency(void *data)
{
unsigned long rate = (unsigned long)data;
clockevents_update_freq(this_cpu_ptr(&gic_clockevent_device), rate);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Ezequiel García | 31 | 100.00% | 1 | 100.00% |
| Total | 31 | 100.00% | 1 | 100.00% |
static int gic_starting_cpu(unsigned int cpu)
{
gic_clockevent_cpu_init(cpu, this_cpu_ptr(&gic_clockevent_device));
return 0;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Andrew Bresticker | 18 | 75.00% | 1 | 50.00% |
| Richard Cochran | 6 | 25.00% | 1 | 50.00% |
| Total | 24 | 100.00% | 2 | 100.00% |
static int gic_clk_notifier(struct notifier_block *nb, unsigned long action,
void *data)
{
struct clk_notifier_data *cnd = data;
if (action == POST_RATE_CHANGE)
on_each_cpu(gic_update_frequency, (void *)cnd->new_rate, 1);
return NOTIFY_OK;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Ezequiel García | 50 | 100.00% | 1 | 100.00% |
| Total | 50 | 100.00% | 1 | 100.00% |
static int gic_dying_cpu(unsigned int cpu)
{
gic_clockevent_cpu_exit(this_cpu_ptr(&gic_clockevent_device));
return 0;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Richard Cochran | 20 | 90.91% | 1 | 50.00% |
| Andrew Bresticker | 2 | 9.09% | 1 | 50.00% |
| Total | 22 | 100.00% | 2 | 100.00% |
static struct notifier_block gic_clk_nb = {
.notifier_call = gic_clk_notifier,
};
static int gic_clockevent_init(void)
{
int ret;
if (!gic_frequency)
return -ENXIO;
ret = setup_percpu_irq(gic_timer_irq, &gic_compare_irqaction);
if (ret < 0) {
pr_err("GIC timer IRQ %d setup failed: %d\n",
gic_timer_irq, ret);
return ret;
}
cpuhp_setup_state(CPUHP_AP_MIPS_GIC_TIMER_STARTING,
"clockevents/mips/gic/timer:starting",
gic_starting_cpu, gic_dying_cpu);
return 0;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Andrew Bresticker | 30 | 46.88% | 2 | 33.33% |
| Ezequiel García | 15 | 23.44% | 1 | 16.67% |
| Paul Burton | 11 | 17.19% | 1 | 16.67% |
| Richard Cochran | 7 | 10.94% | 1 | 16.67% |
| Thomas Gleixner | 1 | 1.56% | 1 | 16.67% |
| Total | 64 | 100.00% | 6 | 100.00% |
static u64 gic_hpt_read(struct clocksource *cs)
{
return gic_read_count();
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Steven J. Hill | 14 | 93.33% | 2 | 66.67% |
| Thomas Gleixner | 1 | 6.67% | 1 | 33.33% |
| Total | 15 | 100.00% | 3 | 100.00% |
static struct clocksource gic_clocksource = {
.name = "GIC",
.read = gic_hpt_read,
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
.archdata = { .vdso_clock_mode = VDSO_CLOCK_GIC },
};
static int __init __gic_clocksource_init(void)
{
int ret;
/* Set clocksource mask. */
gic_clocksource.mask = CLOCKSOURCE_MASK(gic_get_count_width());
/* Calculate a somewhat reasonable rating value. */
gic_clocksource.rating = 200 + gic_frequency / 10000000;
ret = clocksource_register_hz(&gic_clocksource, gic_frequency);
if (ret < 0)
pr_warn("GIC: Unable to register clocksource\n");
return ret;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Steven J. Hill | 31 | 53.45% | 1 | 16.67% |
| Ezequiel García | 15 | 25.86% | 1 | 16.67% |
| Andrew Bresticker | 7 | 12.07% | 2 | 33.33% |
| Daniel Lezcano | 4 | 6.90% | 1 | 16.67% |
| Markos Chandras | 1 | 1.72% | 1 | 16.67% |
| Total | 58 | 100.00% | 6 | 100.00% |
static int __init gic_clocksource_of_init(struct device_node *node)
{
struct clk *clk;
int ret;
if (!gic_present || !node->parent ||
!of_device_is_compatible(node->parent, "mti,gic")) {
pr_warn("No DT definition for the mips gic driver\n");
return -ENXIO;
}
clk = of_clk_get(node, 0);
if (!IS_ERR(clk)) {
if (clk_prepare_enable(clk) < 0) {
pr_err("GIC failed to enable clock\n");
clk_put(clk);
return PTR_ERR(clk);
}
gic_frequency = clk_get_rate(clk);
} else if (of_property_read_u32(node, "clock-frequency",
&gic_frequency)) {
pr_err("GIC frequency not specified.\n");
return -EINVAL;;
}
gic_timer_irq = irq_of_parse_and_map(node, 0);
if (!gic_timer_irq) {
pr_err("GIC timer IRQ not specified.\n");
return -EINVAL;;
}
ret = __gic_clocksource_init();
if (ret)
return ret;
ret = gic_clockevent_init();
if (!ret && !IS_ERR(clk)) {
if (clk_notifier_register(clk, &gic_clk_nb) < 0)
pr_warn("GIC: Unable to register clock notifier\n");
}
/* And finally start the counter */
gic_start_count();
return 0;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Andrew Bresticker | 108 | 51.67% | 2 | 25.00% |
| Ezequiel García | 61 | 29.19% | 3 | 37.50% |
| Daniel Lezcano | 38 | 18.18% | 1 | 12.50% |
| Rafał Miłecki | 1 | 0.48% | 1 | 12.50% |
| Paul Gortmaker | 1 | 0.48% | 1 | 12.50% |
| Total | 209 | 100.00% | 8 | 100.00% |
CLOCKSOURCE_OF_DECLARE(mips_gic_timer, "mti,gic-timer",
gic_clocksource_of_init);
Overall Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Andrew Bresticker | 437 | 54.49% | 11 | 40.74% |
| Ezequiel García | 184 | 22.94% | 4 | 14.81% |
| Steven J. Hill | 75 | 9.35% | 2 | 7.41% |
| Daniel Lezcano | 43 | 5.36% | 2 | 7.41% |
| Richard Cochran | 37 | 4.61% | 1 | 3.70% |
| Paul Burton | 11 | 1.37% | 1 | 3.70% |
| Alex Smith | 10 | 1.25% | 1 | 3.70% |
| Thomas Gleixner | 2 | 0.25% | 2 | 7.41% |
| Markos Chandras | 1 | 0.12% | 1 | 3.70% |
| Rafał Miłecki | 1 | 0.12% | 1 | 3.70% |
| Paul Gortmaker | 1 | 0.12% | 1 | 3.70% |
| Total | 802 | 100.00% | 27 | 100.00% |
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