Release 4.12 drivers/misc/ioc4.c
  
  
  
/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2005-2006 Silicon Graphics, Inc.  All Rights Reserved.
 */
/* This file contains the master driver module for use by SGI IOC4 subdrivers.
 *
 * It allocates any resources shared between multiple subdevices, and
 * provides accessor functions (where needed) and the like for those
 * resources.  It also provides a mechanism for the subdevice modules
 * to support loading and unloading.
 *
 * Non-shared resources (e.g. external interrupt A_INT_OUT register page
 * alias, serial port and UART registers) are handled by the subdevice
 * modules themselves.
 *
 * This is all necessary because IOC4 is not implemented as a multi-function
 * PCI device, but an amalgamation of disparate registers for several
 * types of device (ATA, serial, external interrupts).  The normal
 * resource management in the kernel doesn't have quite the right interfaces
 * to handle this situation (e.g. multiple modules can't claim the same
 * PCI ID), thus this IOC4 master module.
 */
#include <linux/errno.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/ioc4.h>
#include <linux/ktime.h>
#include <linux/slab.h>
#include <linux/mutex.h>
#include <linux/time.h>
#include <asm/io.h>
/***************
 * Definitions *
 ***************/
/* Tweakable values */
/* PCI bus speed detection/calibration */
#define IOC4_CALIBRATE_COUNT 63		
/* Calibration cycle period */
#define IOC4_CALIBRATE_CYCLES 256	
/* Average over this many cycles */
#define IOC4_CALIBRATE_DISCARD 2	
/* Discard first few cycles */
#define IOC4_CALIBRATE_LOW_MHZ 25	
/* Lower bound on bus speed sanity */
#define IOC4_CALIBRATE_HIGH_MHZ 75	
/* Upper bound on bus speed sanity */
#define IOC4_CALIBRATE_DEFAULT_MHZ 66	
/* Assumed if sanity check fails */
/************************
 * Submodule management *
 ************************/
static DEFINE_MUTEX(ioc4_mutex);
static LIST_HEAD(ioc4_devices);
static LIST_HEAD(ioc4_submodules);
/* Register an IOC4 submodule */
int
ioc4_register_submodule(struct ioc4_submodule *is)
{
	struct ioc4_driver_data *idd;
	mutex_lock(&ioc4_mutex);
	list_add(&is->is_list, &ioc4_submodules);
	/* Initialize submodule for each IOC4 */
	if (!is->is_probe)
		goto out;
	list_for_each_entry(idd, &ioc4_devices, idd_list) {
		if (is->is_probe(idd)) {
			printk(KERN_WARNING
			       "%s: IOC4 submodule %s probe failed "
			       "for pci_dev %s",
			       __func__, module_name(is->is_owner),
			       pci_name(idd->idd_pdev));
		}
	}
 out:
	mutex_unlock(&ioc4_mutex);
	return 0;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp | 
| Brent Casavant | 88 | 89.80% | 1 | 33.33% | 
| Jes Sorensen | 9 | 9.18% | 1 | 33.33% | 
| Harvey Harrison | 1 | 1.02% | 1 | 33.33% | 
| Total | 98 | 100.00% | 3 | 100.00% | 
/* Unregister an IOC4 submodule */
void
ioc4_unregister_submodule(struct ioc4_submodule *is)
{
	struct ioc4_driver_data *idd;
	mutex_lock(&ioc4_mutex);
	list_del(&is->is_list);
	/* Remove submodule for each IOC4 */
	if (!is->is_remove)
		goto out;
	list_for_each_entry(idd, &ioc4_devices, idd_list) {
		if (is->is_remove(idd)) {
			printk(KERN_WARNING
			       "%s: IOC4 submodule %s remove failed "
			       "for pci_dev %s.\n",
			       __func__, module_name(is->is_owner),
			       pci_name(idd->idd_pdev));
		}
	}
 out:
	mutex_unlock(&ioc4_mutex);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp | 
| Brent Casavant | 82 | 89.13% | 1 | 33.33% | 
| Jes Sorensen | 9 | 9.78% | 1 | 33.33% | 
| Harvey Harrison | 1 | 1.09% | 1 | 33.33% | 
| Total | 92 | 100.00% | 3 | 100.00% | 
/*********************
 * Device management *
 *********************/
#define IOC4_CALIBRATE_LOW_LIMIT \
	(1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_LOW_MHZ)
#define IOC4_CALIBRATE_HIGH_LIMIT \
	(1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_HIGH_MHZ)
#define IOC4_CALIBRATE_DEFAULT \
	(1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_DEFAULT_MHZ)
#define IOC4_CALIBRATE_END \
	(IOC4_CALIBRATE_CYCLES + IOC4_CALIBRATE_DISCARD)
#define IOC4_INT_OUT_MODE_TOGGLE 0x7	
/* Toggle INT_OUT every COUNT+1 ticks */
/* Determines external interrupt output clock period of the PCI bus an
 * IOC4 is attached to.  This value can be used to determine the PCI
 * bus speed.
 *
 * IOC4 has a design feature that various internal timers are derived from
 * the PCI bus clock.  This causes IOC4 device drivers to need to take the
 * bus speed into account when setting various register values (e.g. INT_OUT
 * register COUNT field, UART divisors, etc).  Since this information is
 * needed by several subdrivers, it is determined by the main IOC4 driver,
 * even though the following code utilizes external interrupt registers
 * to perform the speed calculation.
 */
static void
ioc4_clock_calibrate(struct ioc4_driver_data *idd)
{
	union ioc4_int_out int_out;
	union ioc4_gpcr gpcr;
	unsigned int state, last_state;
	uint64_t start, end, period;
	unsigned int count;
	/* Enable output */
	gpcr.raw = 0;
	gpcr.fields.dir = IOC4_GPCR_DIR_0;
	gpcr.fields.int_out_en = 1;
	writel(gpcr.raw, &idd->idd_misc_regs->gpcr_s.raw);
	/* Reset to power-on state */
	writel(0, &idd->idd_misc_regs->int_out.raw);
	mmiowb();
	/* Set up square wave */
	int_out.raw = 0;
	int_out.fields.count = IOC4_CALIBRATE_COUNT;
	int_out.fields.mode = IOC4_INT_OUT_MODE_TOGGLE;
	int_out.fields.diag = 0;
	writel(int_out.raw, &idd->idd_misc_regs->int_out.raw);
	mmiowb();
	/* Check square wave period averaged over some number of cycles */
	start = ktime_get_ns();
	state = 1; /* make sure the first read isn't a rising edge */
	for (count = 0; count <= IOC4_CALIBRATE_END; count++) {
		do { /* wait for a rising edge */
			last_state = state;
			int_out.raw = readl(&idd->idd_misc_regs->int_out.raw);
			state = int_out.fields.int_out;
		} while (last_state || !state);
		/* discard the first few cycles */
		if (count == IOC4_CALIBRATE_DISCARD)
			start = ktime_get_ns();
	}
	end = ktime_get_ns();
	/* Calculation rearranged to preserve intermediate precision.
         * Logically:
         * 1. "end - start" gives us the measurement period over all
         *    the square wave cycles.
         * 2. Divide by number of square wave cycles to get the period
         *    of a square wave cycle.
         * 3. Divide by 2*(int_out.fields.count+1), which is the formula
         *    by which the IOC4 generates the square wave, to get the
         *    period of an IOC4 INT_OUT count.
         */
	period = (end - start) /
		(IOC4_CALIBRATE_CYCLES * 2 * (IOC4_CALIBRATE_COUNT + 1));
	/* Bounds check the result. */
	if (period > IOC4_CALIBRATE_LOW_LIMIT ||
	    period < IOC4_CALIBRATE_HIGH_LIMIT) {
		printk(KERN_INFO
		       "IOC4 %s: Clock calibration failed.  Assuming"
		       "PCI clock is %d ns.\n",
		       pci_name(idd->idd_pdev),
		       IOC4_CALIBRATE_DEFAULT / IOC4_EXTINT_COUNT_DIVISOR);
		period = IOC4_CALIBRATE_DEFAULT;
	} else {
		u64 ns = period;
		do_div(ns, IOC4_EXTINT_COUNT_DIVISOR);
		printk(KERN_DEBUG
		       "IOC4 %s: PCI clock is %llu ns.\n",
		       pci_name(idd->idd_pdev), (unsigned long long)ns);
	}
	/* Remember results.  We store the extint clock period rather
         * than the PCI clock period so that greater precision is
         * retained.  Divide by IOC4_EXTINT_COUNT_DIVISOR to get
         * PCI clock period.
         */
	idd->count_period = period;
}
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| Brent Casavant | 276 | 85.19% | 4 | 57.14% | 
| Richard Leitner | 38 | 11.73% | 1 | 14.29% | 
| Randy Dunlap | 6 | 1.85% | 1 | 14.29% | 
| Thomas Gleixner | 4 | 1.23% | 1 | 14.29% | 
| Total | 324 | 100.00% | 7 | 100.00% | 
/* There are three variants of IOC4 cards: IO9, IO10, and PCI-RT.
 * Each brings out different combinations of IOC4 signals, thus.
 * the IOC4 subdrivers need to know to which we're attached.
 *
 * We look for the presence of a SCSI (IO9) or SATA (IO10) controller
 * on the same PCI bus at slot number 3 to differentiate IO9 from IO10.
 * If neither is present, it's a PCI-RT.
 */
static unsigned int
ioc4_variant(struct ioc4_driver_data *idd)
{
	struct pci_dev *pdev = NULL;
	int found = 0;
	/* IO9: Look for a QLogic ISP 12160 at the same bus and slot 3. */
	do {
		pdev = pci_get_device(PCI_VENDOR_ID_QLOGIC,
				      PCI_DEVICE_ID_QLOGIC_ISP12160, pdev);
		if (pdev &&
		    idd->idd_pdev->bus->number == pdev->bus->number &&
		    3 == PCI_SLOT(pdev->devfn))
			found = 1;
	} while (pdev && !found);
	if (NULL != pdev) {
		pci_dev_put(pdev);
		return IOC4_VARIANT_IO9;
	}
	/* IO10: Look for a Vitesse VSC 7174 at the same bus and slot 3. */
	pdev = NULL;
	do {
		pdev = pci_get_device(PCI_VENDOR_ID_VITESSE,
				      PCI_DEVICE_ID_VITESSE_VSC7174, pdev);
		if (pdev &&
		    idd->idd_pdev->bus->number == pdev->bus->number &&
		    3 == PCI_SLOT(pdev->devfn))
			found = 1;
	} while (pdev && !found);
	if (NULL != pdev) {
		pci_dev_put(pdev);
		return IOC4_VARIANT_IO10;
	}
	/* PCI-RT: No SCSI/SATA controller will be present */
	return IOC4_VARIANT_PCI_RT;
}
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| Julia Lawall | 14 | 8.14% | 1 | 50.00% | 
| Total | 172 | 100.00% | 2 | 100.00% | 
static void
ioc4_load_modules(struct work_struct *work)
{
	request_module("sgiioc4");
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp | 
| Brent Casavant | 15 | 93.75% | 1 | 50.00% | 
| Tejun Heo | 1 | 6.25% | 1 | 50.00% | 
| Total | 16 | 100.00% | 2 | 100.00% | 
static DECLARE_WORK(ioc4_load_modules_work, ioc4_load_modules);
/* Adds a new instance of an IOC4 card */
static int
ioc4_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id)
{
	struct ioc4_driver_data *idd;
	struct ioc4_submodule *is;
	uint32_t pcmd;
	int ret;
	/* Enable IOC4 and take ownership of it */
	if ((ret = pci_enable_device(pdev))) {
		printk(KERN_WARNING
		       "%s: Failed to enable IOC4 device for pci_dev %s.\n",
		       __func__, pci_name(pdev));
		goto out;
	}
	pci_set_master(pdev);
	/* Set up per-IOC4 data */
	idd = kmalloc(sizeof(struct ioc4_driver_data), GFP_KERNEL);
	if (!idd) {
		printk(KERN_WARNING
		       "%s: Failed to allocate IOC4 data for pci_dev %s.\n",
		       __func__, pci_name(pdev));
		ret = -ENODEV;
		goto out_idd;
	}
	idd->idd_pdev = pdev;
	idd->idd_pci_id = pci_id;
	/* Map IOC4 misc registers.  These are shared between subdevices
         * so the main IOC4 module manages them.
         */
	idd->idd_bar0 = pci_resource_start(idd->idd_pdev, 0);
	if (!idd->idd_bar0) {
		printk(KERN_WARNING
		       "%s: Unable to find IOC4 misc resource "
		       "for pci_dev %s.\n",
		       __func__, pci_name(idd->idd_pdev));
		ret = -ENODEV;
		goto out_pci;
	}
	if (!request_mem_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs),
			    "ioc4_misc")) {
		printk(KERN_WARNING
		       "%s: Unable to request IOC4 misc region "
		       "for pci_dev %s.\n",
		       __func__, pci_name(idd->idd_pdev));
		ret = -ENODEV;
		goto out_pci;
	}
	idd->idd_misc_regs = ioremap(idd->idd_bar0,
				     sizeof(struct ioc4_misc_regs));
	if (!idd->idd_misc_regs) {
		printk(KERN_WARNING
		       "%s: Unable to remap IOC4 misc region "
		       "for pci_dev %s.\n",
		       __func__, pci_name(idd->idd_pdev));
		ret = -ENODEV;
		goto out_misc_region;
	}
	/* Failsafe portion of per-IOC4 initialization */
	/* Detect card variant */
	idd->idd_variant = ioc4_variant(idd);
	printk(KERN_INFO "IOC4 %s: %s card detected.\n", pci_name(pdev),
	       idd->idd_variant == IOC4_VARIANT_IO9 ? "IO9" :
	       idd->idd_variant == IOC4_VARIANT_PCI_RT ? "PCI-RT" :
	       idd->idd_variant == IOC4_VARIANT_IO10 ? "IO10" : "unknown");
	/* Initialize IOC4 */
	pci_read_config_dword(idd->idd_pdev, PCI_COMMAND, &pcmd);
	pci_write_config_dword(idd->idd_pdev, PCI_COMMAND,
			       pcmd | PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
	/* Determine PCI clock */
	ioc4_clock_calibrate(idd);
	/* Disable/clear all interrupts.  Need to do this here lest
         * one submodule request the shared IOC4 IRQ, but interrupt
         * is generated by a different subdevice.
         */
	/* Disable */
	writel(~0, &idd->idd_misc_regs->other_iec.raw);
	writel(~0, &idd->idd_misc_regs->sio_iec);
	/* Clear (i.e. acknowledge) */
	writel(~0, &idd->idd_misc_regs->other_ir.raw);
	writel(~0, &idd->idd_misc_regs->sio_ir);
	/* Track PCI-device specific data */
	idd->idd_serial_data = NULL;
	pci_set_drvdata(idd->idd_pdev, idd);
	mutex_lock(&ioc4_mutex);
	list_add_tail(&idd->idd_list, &ioc4_devices);
	/* Add this IOC4 to all submodules */
	list_for_each_entry(is, &ioc4_submodules, is_list) {
		if (is->is_probe && is->is_probe(idd)) {
			printk(KERN_WARNING
			       "%s: IOC4 submodule 0x%s probe failed "
			       "for pci_dev %s.\n",
			       __func__, module_name(is->is_owner),
			       pci_name(idd->idd_pdev));
		}
	}
	mutex_unlock(&ioc4_mutex);
	/* Request sgiioc4 IDE driver on boards that bring that functionality
         * off of IOC4.  The root filesystem may be hosted on a drive connected
         * to IOC4, so we need to make sure the sgiioc4 driver is loaded as it
         * won't be picked up by modprobes due to the ioc4 module owning the
         * PCI device.
         */
	if (idd->idd_variant != IOC4_VARIANT_PCI_RT) {
		/* Request the module from a work procedure as the modprobe
                 * goes out to a userland helper and that will hang if done
                 * directly from ioc4_probe().
                 */
		printk(KERN_INFO "IOC4 loading sgiioc4 submodule\n");
		schedule_work(&ioc4_load_modules_work);
	}
	return 0;
out_misc_region:
	release_mem_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs));
out_pci:
	kfree(idd);
out_idd:
	pci_disable_device(pdev);
out:
	return ret;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp | 
| Brent Casavant | 540 | 97.65% | 6 | 66.67% | 
| Harvey Harrison | 6 | 1.08% | 1 | 11.11% | 
| Jes Sorensen | 4 | 0.72% | 1 | 11.11% | 
| Tejun Heo | 3 | 0.54% | 1 | 11.11% | 
| Total | 553 | 100.00% | 9 | 100.00% | 
/* Removes a particular instance of an IOC4 card. */
static void
ioc4_remove(struct pci_dev *pdev)
{
	struct ioc4_submodule *is;
	struct ioc4_driver_data *idd;
	idd = pci_get_drvdata(pdev);
	/* Remove this IOC4 from all submodules */
	mutex_lock(&ioc4_mutex);
	list_for_each_entry(is, &ioc4_submodules, is_list) {
		if (is->is_remove && is->is_remove(idd)) {
			printk(KERN_WARNING
			       "%s: IOC4 submodule 0x%s remove failed "
			       "for pci_dev %s.\n",
			       __func__, module_name(is->is_owner),
			       pci_name(idd->idd_pdev));
		}
	}
	mutex_unlock(&ioc4_mutex);
	/* Release resources */
	iounmap(idd->idd_misc_regs);
	if (!idd->idd_bar0) {
		printk(KERN_WARNING
		       "%s: Unable to get IOC4 misc mapping for pci_dev %s. "
		       "Device removal may be incomplete.\n",
		       __func__, pci_name(idd->idd_pdev));
	}
	release_mem_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs));
	/* Disable IOC4 and relinquish */
	pci_disable_device(pdev);
	/* Remove and free driver data */
	mutex_lock(&ioc4_mutex);
	list_del(&idd->idd_list);
	mutex_unlock(&ioc4_mutex);
	kfree(idd);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp | 
| Brent Casavant | 121 | 72.46% | 2 | 40.00% | 
| Patrick Gefre | 36 | 21.56% | 1 | 20.00% | 
| Jes Sorensen | 8 | 4.79% | 1 | 20.00% | 
| Harvey Harrison | 2 | 1.20% | 1 | 20.00% | 
| Total | 167 | 100.00% | 5 | 100.00% | 
static struct pci_device_id ioc4_id_table[] = {
	{PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC4, PCI_ANY_ID,
	 PCI_ANY_ID, 0x0b4000, 0xFFFFFF},
	{0}
};
static struct pci_driver ioc4_driver = {
	.name = "IOC4",
	.id_table = ioc4_id_table,
	.probe = ioc4_probe,
	.remove = ioc4_remove,
};
MODULE_DEVICE_TABLE(pci, ioc4_id_table);
/*********************
 * Module management *
 *********************/
/* Module load */
static int __init
ioc4_init(void)
{
	return pci_register_driver(&ioc4_driver);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp | 
| Patrick Gefre | 13 | 81.25% | 1 | 33.33% | 
| Brent Casavant | 2 | 12.50% | 1 | 33.33% | 
| Jean Delvare | 1 | 6.25% | 1 | 33.33% | 
| Total | 16 | 100.00% | 3 | 100.00% | 
/* Module unload */
static void __exit
ioc4_exit(void)
{
	/* Ensure ioc4_load_modules() has completed before exiting */
	flush_work(&ioc4_load_modules_work);
	pci_unregister_driver(&ioc4_driver);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp | 
| Brent Casavant | 16 | 72.73% | 2 | 40.00% | 
| Tejun Heo | 5 | 22.73% | 2 | 40.00% | 
| Jean Delvare | 1 | 4.55% | 1 | 20.00% | 
| Total | 22 | 100.00% | 5 | 100.00% | 
module_init(ioc4_init);
module_exit(ioc4_exit);
MODULE_AUTHOR("Brent Casavant - Silicon Graphics, Inc. <bcasavan@sgi.com>");
MODULE_DESCRIPTION("PCI driver master module for SGI IOC4 Base-IO Card");
MODULE_LICENSE("GPL");
EXPORT_SYMBOL(ioc4_register_submodule);
EXPORT_SYMBOL(ioc4_unregister_submodule);
Overall Contributors
| Person | Tokens | Prop | Commits | CommitProp | 
| Brent Casavant | 1428 | 85.05% | 8 | 40.00% | 
| Patrick Gefre | 123 | 7.33% | 1 | 5.00% | 
| Richard Leitner | 38 | 2.26% | 1 | 5.00% | 
| Jes Sorensen | 34 | 2.03% | 1 | 5.00% | 
| Tejun Heo | 17 | 1.01% | 3 | 15.00% | 
| Julia Lawall | 14 | 0.83% | 1 | 5.00% | 
| Harvey Harrison | 10 | 0.60% | 1 | 5.00% | 
| Randy Dunlap | 6 | 0.36% | 1 | 5.00% | 
| Thomas Gleixner | 4 | 0.24% | 1 | 5.00% | 
| Al Viro | 3 | 0.18% | 1 | 5.00% | 
| Jean Delvare | 2 | 0.12% | 1 | 5.00% | 
| Total | 1679 | 100.00% | 20 | 100.00% | 
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