Release 4.12 include/asm-generic/io.h

/* Generic I/O port emulation, based on MN10300 code
 *
 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
 * Written by David Howells (dhowells@redhat.com)
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public Licence
 * as published by the Free Software Foundation; either version
 * 2 of the Licence, or (at your option) any later version.
 */
#ifndef __ASM_GENERIC_IO_H

#define __ASM_GENERIC_IO_H

#include <asm/page.h> /* I/O is all done through memory accesses */
#include <linux/string.h> /* for memset() and memcpy() */
#include <linux/types.h>

#ifdef CONFIG_GENERIC_IOMAP
#include <asm-generic/iomap.h>
#endif

#include <asm-generic/pci_iomap.h>

#ifndef mmiowb

#define mmiowb() do {} while (0)
#endif

/*
 * __raw_{read,write}{b,w,l,q}() access memory in native endianness.
 *
 * On some architectures memory mapped IO needs to be accessed differently.
 * On the simple architectures, we just read/write the memory location
 * directly.
 */

#ifndef __raw_readb

#define __raw_readb __raw_readb


static inline u8 __raw_readb(const volatile void __iomem *addr)
{
	return *(const volatile u8 __force *)addr;
}
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#endif

#ifndef __raw_readw

#define __raw_readw __raw_readw


static inline u16 __raw_readw(const volatile void __iomem *addr)
{
	return *(const volatile u16 __force *)addr;
}
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#endif

#ifndef __raw_readl

#define __raw_readl __raw_readl


static inline u32 __raw_readl(const volatile void __iomem *addr)
{
	return *(const volatile u32 __force *)addr;
}
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#endif

#ifdef CONFIG_64BIT
#ifndef __raw_readq

#define __raw_readq __raw_readq


static inline u64 __raw_readq(const volatile void __iomem *addr)
{
	return *(const volatile u64 __force *)addr;
}
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#endif
#endif /* CONFIG_64BIT */

#ifndef __raw_writeb

#define __raw_writeb __raw_writeb


static inline void __raw_writeb(u8 value, volatile void __iomem *addr)
{
	*(volatile u8 __force *)addr = value;
}
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#endif

#ifndef __raw_writew

#define __raw_writew __raw_writew


static inline void __raw_writew(u16 value, volatile void __iomem *addr)
{
	*(volatile u16 __force *)addr = value;
}
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#endif

#ifndef __raw_writel

#define __raw_writel __raw_writel


static inline void __raw_writel(u32 value, volatile void __iomem *addr)
{
	*(volatile u32 __force *)addr = value;
}
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#endif

#ifdef CONFIG_64BIT
#ifndef __raw_writeq

#define __raw_writeq __raw_writeq


static inline void __raw_writeq(u64 value, volatile void __iomem *addr)
{
	*(volatile u64 __force *)addr = value;
}
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#endif
#endif /* CONFIG_64BIT */

/*
 * {read,write}{b,w,l,q}() access little endian memory and return result in
 * native endianness.
 */

#ifndef readb

#define readb readb


static inline u8 readb(const volatile void __iomem *addr)
{
	return __raw_readb(addr);
}
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#endif

#ifndef readw

#define readw readw


static inline u16 readw(const volatile void __iomem *addr)
{
	return __le16_to_cpu(__raw_readw(addr));
}
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#endif

#ifndef readl

#define readl readl


static inline u32 readl(const volatile void __iomem *addr)
{
	return __le32_to_cpu(__raw_readl(addr));
}
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#endif

#ifdef CONFIG_64BIT
#ifndef readq

#define readq readq


static inline u64 readq(const volatile void __iomem *addr)
{
	return __le64_to_cpu(__raw_readq(addr));
}
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#endif
#endif /* CONFIG_64BIT */

#ifndef writeb

#define writeb writeb


static inline void writeb(u8 value, volatile void __iomem *addr)
{
	__raw_writeb(value, addr);
}
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#endif

#ifndef writew

#define writew writew


static inline void writew(u16 value, volatile void __iomem *addr)
{
	__raw_writew(cpu_to_le16(value), addr);
}
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#endif

#ifndef writel

#define writel writel


static inline void writel(u32 value, volatile void __iomem *addr)
{
	__raw_writel(__cpu_to_le32(value), addr);
}
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#endif

#ifdef CONFIG_64BIT
#ifndef writeq

#define writeq writeq


static inline void writeq(u64 value, volatile void __iomem *addr)
{
	__raw_writeq(__cpu_to_le64(value), addr);
}
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#endif
#endif /* CONFIG_64BIT */

/*
 * {read,write}{b,w,l,q}_relaxed() are like the regular version, but
 * are not guaranteed to provide ordering against spinlocks or memory
 * accesses.
 */
#ifndef readb_relaxed

#define readb_relaxed readb
#endif

#ifndef readw_relaxed

#define readw_relaxed readw
#endif

#ifndef readl_relaxed

#define readl_relaxed readl
#endif

#if defined(readq) && !defined(readq_relaxed)

#define readq_relaxed readq
#endif

#ifndef writeb_relaxed

#define writeb_relaxed writeb
#endif

#ifndef writew_relaxed

#define writew_relaxed writew
#endif

#ifndef writel_relaxed

#define writel_relaxed writel
#endif

#if defined(writeq) && !defined(writeq_relaxed)

#define writeq_relaxed writeq
#endif

/*
 * {read,write}s{b,w,l,q}() repeatedly access the same memory address in
 * native endianness in 8-, 16-, 32- or 64-bit chunks (@count times).
 */
#ifndef readsb

#define readsb readsb


static inline void readsb(const volatile void __iomem *addr, void *buffer,
			  unsigned int count)
{
	if (count) {
		u8 *buf = buffer;

		do {
			u8 x = __raw_readb(addr);
			*buf++ = x;
		} while (--count);
	}
}
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#endif

#ifndef readsw

#define readsw readsw


static inline void readsw(const volatile void __iomem *addr, void *buffer,
			  unsigned int count)
{
	if (count) {
		u16 *buf = buffer;

		do {
			u16 x = __raw_readw(addr);
			*buf++ = x;
		} while (--count);
	}
}
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#endif

#ifndef readsl

#define readsl readsl


static inline void readsl(const volatile void __iomem *addr, void *buffer,
			  unsigned int count)
{
	if (count) {
		u32 *buf = buffer;

		do {
			u32 x = __raw_readl(addr);
			*buf++ = x;
		} while (--count);
	}
}
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#endif

#ifdef CONFIG_64BIT
#ifndef readsq

#define readsq readsq


static inline void readsq(const volatile void __iomem *addr, void *buffer,
			  unsigned int count)
{
	if (count) {
		u64 *buf = buffer;

		do {
			u64 x = __raw_readq(addr);
			*buf++ = x;
		} while (--count);
	}
}
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#endif
#endif /* CONFIG_64BIT */

#ifndef writesb

#define writesb writesb


static inline void writesb(volatile void __iomem *addr, const void *buffer,
			   unsigned int count)
{
	if (count) {
		const u8 *buf = buffer;

		do {
			__raw_writeb(*buf++, addr);
		} while (--count);
	}
}
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#endif

#ifndef writesw

#define writesw writesw


static inline void writesw(volatile void __iomem *addr, const void *buffer,
			   unsigned int count)
{
	if (count) {
		const u16 *buf = buffer;

		do {
			__raw_writew(*buf++, addr);
		} while (--count);
	}
}
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#endif

#ifndef writesl

#define writesl writesl


static inline void writesl(volatile void __iomem *addr, const void *buffer,
			   unsigned int count)
{
	if (count) {
		const u32 *buf = buffer;

		do {
			__raw_writel(*buf++, addr);
		} while (--count);
	}
}
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#endif

#ifdef CONFIG_64BIT
#ifndef writesq

#define writesq writesq


static inline void writesq(volatile void __iomem *addr, const void *buffer,
			   unsigned int count)
{
	if (count) {
		const u64 *buf = buffer;

		do {
			__raw_writeq(*buf++, addr);
		} while (--count);
	}
}
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#endif
#endif /* CONFIG_64BIT */

#ifndef PCI_IOBASE

#define PCI_IOBASE ((void __iomem *)0)
#endif

#ifndef IO_SPACE_LIMIT

#define IO_SPACE_LIMIT 0xffff
#endif

/*
 * {in,out}{b,w,l}() access little endian I/O. {in,out}{b,w,l}_p() can be
 * implemented on hardware that needs an additional delay for I/O accesses to
 * take effect.
 */

#ifndef inb

#define inb inb


static inline u8 inb(unsigned long addr)
{
	return readb(PCI_IOBASE + addr);
}
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#endif

#ifndef inw

#define inw inw


static inline u16 inw(unsigned long addr)
{
	return readw(PCI_IOBASE + addr);
}
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#endif

#ifndef inl

#define inl inl


static inline u32 inl(unsigned long addr)
{
	return readl(PCI_IOBASE + addr);
}
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#endif

#ifndef outb

#define outb outb


static inline void outb(u8 value, unsigned long addr)
{
	writeb(value, PCI_IOBASE + addr);
}
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#endif

#ifndef outw

#define outw outw


static inline void outw(u16 value, unsigned long addr)
{
	writew(value, PCI_IOBASE + addr);
}
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#endif

#ifndef outl

#define outl outl


static inline void outl(u32 value, unsigned long addr)
{
	writel(value, PCI_IOBASE + addr);
}
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#endif

#ifndef inb_p

#define inb_p inb_p


static inline u8 inb_p(unsigned long addr)
{
	return inb(addr);
}
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#endif

#ifndef inw_p

#define inw_p inw_p


static inline u16 inw_p(unsigned long addr)
{
	return inw(addr);
}
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#endif

#ifndef inl_p

#define inl_p inl_p


static inline u32 inl_p(unsigned long addr)
{
	return inl(addr);
}
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#endif

#ifndef outb_p

#define outb_p outb_p


static inline void outb_p(u8 value, unsigned long addr)
{
	outb(value, addr);
}
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#endif

#ifndef outw_p

#define outw_p outw_p


static inline void outw_p(u16 value, unsigned long addr)
{
	outw(value, addr);
}
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#endif

#ifndef outl_p

#define outl_p outl_p


static inline void outl_p(u32 value, unsigned long addr)
{
	outl(value, addr);
}
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#endif

/*
 * {in,out}s{b,w,l}{,_p}() are variants of the above that repeatedly access a
 * single I/O port multiple times.
 */

#ifndef insb

#define insb insb


static inline void insb(unsigned long addr, void *buffer, unsigned int count)
{
	readsb(PCI_IOBASE + addr, buffer, count);
}
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#endif

#ifndef insw

#define insw insw


static inline void insw(unsigned long addr, void *buffer, unsigned int count)
{
	readsw(PCI_IOBASE + addr, buffer, count);
}
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#endif

#ifndef insl

#define insl insl


static inline void insl(unsigned long addr, void *buffer, unsigned int count)
{
	readsl(PCI_IOBASE + addr, buffer, count);
}
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#endif

#ifndef outsb

#define outsb outsb


static inline void outsb(unsigned long addr, const void *buffer,
			 unsigned int count)
{
	writesb(PCI_IOBASE + addr, buffer, count);
}
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#endif

#ifndef outsw

#define outsw outsw


static inline void outsw(unsigned long addr, const void *buffer,
			 unsigned int count)
{
	writesw(PCI_IOBASE + addr, buffer, count);
}
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#endif

#ifndef outsl

#define outsl outsl


static inline void outsl(unsigned long addr, const void *buffer,
			 unsigned int count)
{
	writesl(PCI_IOBASE + addr, buffer, count);
}
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#endif

#ifndef insb_p

#define insb_p insb_p


static inline void insb_p(unsigned long addr, void *buffer, unsigned int count)
{
	insb(addr, buffer, count);
}
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#endif

#ifndef insw_p

#define insw_p insw_p


static inline void insw_p(unsigned long addr, void *buffer, unsigned int count)
{
	insw(addr, buffer, count);
}
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#endif

#ifndef insl_p

#define insl_p insl_p


static inline void insl_p(unsigned long addr, void *buffer, unsigned int count)
{
	insl(addr, buffer, count);
}
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#endif

#ifndef outsb_p

#define outsb_p outsb_p


static inline void outsb_p(unsigned long addr, const void *buffer,
			   unsigned int count)
{
	outsb(addr, buffer, count);
}
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#endif

#ifndef outsw_p

#define outsw_p outsw_p


static inline void outsw_p(unsigned long addr, const void *buffer,
			   unsigned int count)
{
	outsw(addr, buffer, count);
}
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#endif

#ifndef outsl_p

#define outsl_p outsl_p


static inline void outsl_p(unsigned long addr, const void *buffer,
			   unsigned int count)
{
	outsl(addr, buffer, count);
}
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#endif

#ifndef CONFIG_GENERIC_IOMAP
#ifndef ioread8

#define ioread8 ioread8


static inline u8 ioread8(const volatile void __iomem *addr)
{
	return readb(addr);
}
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#endif

#ifndef ioread16

#define ioread16 ioread16


static inline u16 ioread16(const volatile void __iomem *addr)
{
	return readw(addr);
}
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#endif

#ifndef ioread32

#define ioread32 ioread32


static inline u32 ioread32(const volatile void __iomem *addr)
{
	return readl(addr);
}
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#endif

#ifdef CONFIG_64BIT
#ifndef ioread64

#define ioread64 ioread64


static inline u64 ioread64(const volatile void __iomem *addr)
{
	return readq(addr);
}
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#endif
#endif /* CONFIG_64BIT */

#ifndef iowrite8

#define iowrite8 iowrite8


static inline void iowrite8(u8 value, volatile void __iomem *addr)
{
	writeb(value, addr);
}
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#endif

#ifndef iowrite16

#define iowrite16 iowrite16


static inline void iowrite16(u16 value, volatile void __iomem *addr)
{
	writew(value, addr);
}
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#endif

#ifndef iowrite32

#define iowrite32 iowrite32


static inline void iowrite32(u32 value, volatile void __iomem *addr)
{
	writel(value, addr);
}
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#endif

#ifdef CONFIG_64BIT
#ifndef iowrite64

#define iowrite64 iowrite64


static inline void iowrite64(u64 value, volatile void __iomem *addr)
{
	writeq(value, addr);
}
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#endif
#endif /* CONFIG_64BIT */

#ifndef ioread16be

#define ioread16be ioread16be


static inline u16 ioread16be(const volatile void __iomem *addr)
{
	return swab16(readw(addr));
}
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#endif

#ifndef ioread32be

#define ioread32be ioread32be


static inline u32 ioread32be(const volatile void __iomem *addr)
{
	return swab32(readl(addr));
}
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#endif

#ifdef CONFIG_64BIT
#ifndef ioread64be

#define ioread64be ioread64be


static inline u64 ioread64be(const volatile void __iomem *addr)
{
	return swab64(readq(addr));
}
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#endif
#endif /* CONFIG_64BIT */

#ifndef iowrite16be

#define iowrite16be iowrite16be


static inline void iowrite16be(u16 value, void volatile __iomem *addr)
{
	writew(swab16(value), addr);
}
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#endif

#ifndef iowrite32be

#define iowrite32be iowrite32be


static inline void iowrite32be(u32 value, volatile void __iomem *addr)
{
	writel(swab32(value), addr);
}
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#endif

#ifdef CONFIG_64BIT
#ifndef iowrite64be

#define iowrite64be iowrite64be


static inline void iowrite64be(u64 value, volatile void __iomem *addr)
{
	writeq(swab64(value), addr);
}
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#endif
#endif /* CONFIG_64BIT */

#ifndef ioread8_rep

#define ioread8_rep ioread8_rep


static inline void ioread8_rep(const volatile void __iomem *addr, void *buffer,
			       unsigned int count)
{
	readsb(addr, buffer, count);
}
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#endif

#ifndef ioread16_rep

#define ioread16_rep ioread16_rep


static inline void ioread16_rep(const volatile void __iomem *addr,
				void *buffer, unsigned int count)
{
	readsw