cregit-Linux how code gets into the kernel

Release 4.14 arch/arm64/kernel/setup.c

/*
 * Based on arch/arm/kernel/setup.c
 *
 * Copyright (C) 1995-2001 Russell King
 * Copyright (C) 2012 ARM Ltd.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <linux/acpi.h>
#include <linux/export.h>
#include <linux/kernel.h>
#include <linux/stddef.h>
#include <linux/ioport.h>
#include <linux/delay.h>
#include <linux/utsname.h>
#include <linux/initrd.h>
#include <linux/console.h>
#include <linux/cache.h>
#include <linux/bootmem.h>
#include <linux/screen_info.h>
#include <linux/init.h>
#include <linux/kexec.h>
#include <linux/root_dev.h>
#include <linux/cpu.h>
#include <linux/interrupt.h>
#include <linux/smp.h>
#include <linux/fs.h>
#include <linux/proc_fs.h>
#include <linux/memblock.h>
#include <linux/of_fdt.h>
#include <linux/efi.h>
#include <linux/psci.h>
#include <linux/sched/task.h>
#include <linux/mm.h>

#include <asm/acpi.h>
#include <asm/fixmap.h>
#include <asm/cpu.h>
#include <asm/cputype.h>
#include <asm/elf.h>
#include <asm/cpufeature.h>
#include <asm/cpu_ops.h>
#include <asm/kasan.h>
#include <asm/numa.h>
#include <asm/sections.h>
#include <asm/setup.h>
#include <asm/smp_plat.h>
#include <asm/cacheflush.h>
#include <asm/tlbflush.h>
#include <asm/traps.h>
#include <asm/memblock.h>
#include <asm/efi.h>
#include <asm/xen/hypervisor.h>
#include <asm/mmu_context.h>


phys_addr_t __fdt_pointer __initdata;

/*
 * Standard memory resources
 */

static struct resource mem_res[] = {
	{
		.name = "Kernel code",
		.start = 0,
		.end = 0,
		.flags = IORESOURCE_SYSTEM_RAM
	},
	{
		.name = "Kernel data",
		.start = 0,
		.end = 0,
		.flags = IORESOURCE_SYSTEM_RAM
	}
};


#define kernel_code mem_res[0]

#define kernel_data mem_res[1]

/*
 * The recorded values of x0 .. x3 upon kernel entry.
 */

u64 __cacheline_aligned boot_args[4];


void __init smp_setup_processor_id(void) { u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK; cpu_logical_map(0) = mpidr; /* * clear __my_cpu_offset on boot CPU to avoid hang caused by * using percpu variable early, for example, lockdep will * access percpu variable inside lock_release */ set_my_cpu_offset(0); pr_info("Booting Linux on physical CPU 0x%lx\n", (unsigned long)mpidr); }

Contributors

PersonTokensPropCommitsCommitProp
Mark Rutland2665.00%150.00%
Will Deacon1435.00%150.00%
Total40100.00%2100.00%


bool arch_match_cpu_phys_id(int cpu, u64 phys_id) { return phys_id == cpu_logical_map(cpu); }

Contributors

PersonTokensPropCommitsCommitProp
Sudeep KarkadaNagesha19100.00%1100.00%
Total19100.00%1100.00%

struct mpidr_hash mpidr_hash; /** * smp_build_mpidr_hash - Pre-compute shifts required at each affinity * level in order to build a linear index from an * MPIDR value. Resulting algorithm is a collision * free hash carried out through shifting and ORing */
static void __init smp_build_mpidr_hash(void) { u32 i, affinity, fs[4], bits[4], ls; u64 mask = 0; /* * Pre-scan the list of MPIDRS and filter out bits that do * not contribute to affinity levels, ie they never toggle. */ for_each_possible_cpu(i) mask |= (cpu_logical_map(i) ^ cpu_logical_map(0)); pr_debug("mask of set bits %#llx\n", mask); /* * Find and stash the last and first bit set at all affinity levels to * check how many bits are required to represent them. */ for (i = 0; i < 4; i++) { affinity = MPIDR_AFFINITY_LEVEL(mask, i); /* * Find the MSB bit and LSB bits position * to determine how many bits are required * to express the affinity level. */ ls = fls(affinity); fs[i] = affinity ? ffs(affinity) - 1 : 0; bits[i] = ls - fs[i]; } /* * An index can be created from the MPIDR_EL1 by isolating the * significant bits at each affinity level and by shifting * them in order to compress the 32 bits values space to a * compressed set of values. This is equivalent to hashing * the MPIDR_EL1 through shifting and ORing. It is a collision free * hash though not minimal since some levels might contain a number * of CPUs that is not an exact power of 2 and their bit * representation might contain holes, eg MPIDR_EL1[7:0] = {0x2, 0x80}. */ mpidr_hash.shift_aff[0] = MPIDR_LEVEL_SHIFT(0) + fs[0]; mpidr_hash.shift_aff[1] = MPIDR_LEVEL_SHIFT(1) + fs[1] - bits[0]; mpidr_hash.shift_aff[2] = MPIDR_LEVEL_SHIFT(2) + fs[2] - (bits[1] + bits[0]); mpidr_hash.shift_aff[3] = MPIDR_LEVEL_SHIFT(3) + fs[3] - (bits[2] + bits[1] + bits[0]); mpidr_hash.mask = mask; mpidr_hash.bits = bits[3] + bits[2] + bits[1] + bits[0]; pr_debug("MPIDR hash: aff0[%u] aff1[%u] aff2[%u] aff3[%u] mask[%#llx] bits[%u]\n", mpidr_hash.shift_aff[0], mpidr_hash.shift_aff[1], mpidr_hash.shift_aff[2], mpidr_hash.shift_aff[3], mpidr_hash.mask, mpidr_hash.bits); /* * 4x is an arbitrary value used to warn on a hash table much bigger * than expected on most systems. */ if (mpidr_hash_size() > 4 * num_possible_cpus()) pr_warn("Large number of MPIDR hash buckets detected\n"); }

Contributors

PersonTokensPropCommitsCommitProp
Lorenzo Pieralisi308100.00%1100.00%
Total308100.00%1100.00%


static void __init setup_machine_fdt(phys_addr_t dt_phys) { void *dt_virt = fixmap_remap_fdt(dt_phys); const char *name; if (!dt_virt || !early_init_dt_scan(dt_virt)) { pr_crit("\n" "Error: invalid device tree blob at physical address %pa (virtual address 0x%p)\n" "The dtb must be 8-byte aligned and must not exceed 2 MB in size\n" "\nPlease check your bootloader.", &dt_phys, dt_virt); while (true) cpu_relax(); } name = of_flat_dt_get_machine_name(); if (!name) return; pr_info("Machine model: %s\n", name); dump_stack_set_arch_desc("%s (DT)", name); }

Contributors

PersonTokensPropCommitsCommitProp
Catalin Marinas2732.93%222.22%
Geert Uytterhoeven1821.95%111.11%
Ard Biesheuvel1720.73%222.22%
Kefeng Wang67.32%111.11%
Steve Capper67.32%111.11%
Will Deacon56.10%111.11%
Rob Herring33.66%111.11%
Total82100.00%9100.00%


static void __init request_standard_resources(void) { struct memblock_region *region; struct resource *res; kernel_code.start = __pa_symbol(_text); kernel_code.end = __pa_symbol(__init_begin - 1); kernel_data.start = __pa_symbol(_sdata); kernel_data.end = __pa_symbol(_end - 1); for_each_memblock(memory, region) { res = alloc_bootmem_low(sizeof(*res)); if (memblock_is_nomap(region)) { res->name = "reserved"; res->flags = IORESOURCE_MEM; } else { res->name = "System RAM"; res->flags = IORESOURCE_SYSTEM_RAM | IORESOURCE_BUSY; } res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region)); res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1; request_resource(&iomem_resource, res); if (kernel_code.start >= res->start && kernel_code.end <= res->end) request_resource(res, &kernel_code); if (kernel_data.start >= res->start && kernel_data.end <= res->end) request_resource(res, &kernel_data); #ifdef CONFIG_KEXEC_CORE /* Userspace will find "Crash kernel" region in /proc/iomem. */ if (crashk_res.end && crashk_res.start >= res->start && crashk_res.end <= res->end) request_resource(res, &crashk_res); #endif } }

Contributors

PersonTokensPropCommitsCommitProp
Catalin Marinas15063.03%112.50%
AKASHI Takahiro6828.57%225.00%
Will Deacon72.94%112.50%
Ard Biesheuvel52.10%225.00%
Steve Capper41.68%112.50%
Laura Abbott41.68%112.50%
Total238100.00%8100.00%

u64 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID };
void __init setup_arch(char **cmdline_p) { pr_info("Boot CPU: AArch64 Processor [%08x]\n", read_cpuid_id()); sprintf(init_utsname()->machine, UTS_MACHINE); init_mm.start_code = (unsigned long) _text; init_mm.end_code = (unsigned long) _etext; init_mm.end_data = (unsigned long) _edata; init_mm.brk = (unsigned long) _end; *cmdline_p = boot_command_line; early_fixmap_init(); early_ioremap_init(); setup_machine_fdt(__fdt_pointer); parse_early_param(); /* * Unmask asynchronous aborts after bringing up possible earlycon. * (Report possible System Errors once we can report this occurred) */ local_async_enable(); /* * TTBR0 is only used for the identity mapping at this stage. Make it * point to zero page to avoid speculatively fetching new entries. */ cpu_uninstall_idmap(); xen_early_init(); efi_init(); arm64_memblock_init(); paging_init(); acpi_table_upgrade(); /* Parse the ACPI tables for possible boot-time configuration */ acpi_boot_table_init(); if (acpi_disabled) unflatten_device_tree(); bootmem_init(); kasan_init(); request_standard_resources(); early_ioremap_reset(); if (acpi_disabled) psci_dt_init(); else psci_acpi_init(); cpu_read_bootcpu_ops(); smp_init_cpus(); smp_build_mpidr_hash(); #ifdef CONFIG_ARM64_SW_TTBR0_PAN /* * Make sure init_thread_info.ttbr0 always generates translation * faults in case uaccess_enable() is inadvertently called by the init * thread. */ init_task.thread_info.ttbr0 = __pa_symbol(empty_zero_page); #endif #ifdef CONFIG_VT #if defined(CONFIG_VGA_CONSOLE) conswitchp = &vga_con; #elif defined(CONFIG_DUMMY_CONSOLE) conswitchp = &dummy_con; #endif #endif if (boot_args[1] || boot_args[2] || boot_args[3]) { pr_err("WARNING: x1-x3 nonzero in violation of boot protocol:\n" "\tx1: %016llx\n\tx2: %016llx\n\tx3: %016llx\n" "This indicates a broken bootloader or old kernel\n", boot_args[1], boot_args[2], boot_args[3]); } }

Contributors

PersonTokensPropCommitsCommitProp
Catalin Marinas11748.55%28.33%
Ard Biesheuvel4920.33%312.50%
Suzuki K. Poulose145.81%14.17%
David Daney104.15%14.17%
Jon Masters104.15%28.33%
Lorenzo Pieralisi72.90%28.33%
Graeme Gregory72.90%28.33%
Mark Salter62.49%312.50%
Will Deacon41.66%14.17%
Mark Rutland41.66%14.17%
Shannon Zhao31.24%14.17%
Laura Abbott31.24%14.17%
Andrey Ryabinin31.24%14.17%
Al Stone20.83%14.17%
Michal Marek10.41%14.17%
Geert Uytterhoeven10.41%14.17%
Total241100.00%24100.00%


static int __init topology_init(void) { int i; for_each_online_node(i) register_one_node(i); for_each_possible_cpu(i) { struct cpu *cpu = &per_cpu(cpu_data.cpu, i); cpu->hotpluggable = 1; register_cpu(cpu, i); } return 0; }

Contributors

PersonTokensPropCommitsCommitProp
Catalin Marinas4781.03%133.33%
Ganapatrao Kulkarni915.52%133.33%
Mark Rutland23.45%133.33%
Total58100.00%3100.00%

subsys_initcall(topology_init); /* * Dump out kernel offset information on panic. */
static int dump_kernel_offset(struct notifier_block *self, unsigned long v, void *p) { const unsigned long offset = kaslr_offset(); if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && offset > 0) { pr_emerg("Kernel Offset: 0x%lx from 0x%lx\n", offset, KIMAGE_VADDR); } else { pr_emerg("Kernel Offset: disabled\n"); } return 0; }

Contributors

PersonTokensPropCommitsCommitProp
Ard Biesheuvel5286.67%150.00%
Alexander Popov813.33%150.00%
Total60100.00%2100.00%

static struct notifier_block kernel_offset_notifier = { .notifier_call = dump_kernel_offset };
static int __init register_kernel_offset_dumper(void) { atomic_notifier_chain_register(&panic_notifier_list, &kernel_offset_notifier); return 0; }

Contributors

PersonTokensPropCommitsCommitProp
Ard Biesheuvel21100.00%1100.00%
Total21100.00%1100.00%

__initcall(register_kernel_offset_dumper);

Overall Contributors

PersonTokensPropCommitsCommitProp
Catalin Marinas49737.59%35.77%
Lorenzo Pieralisi32024.21%23.85%
Ard Biesheuvel17012.86%713.46%
AKASHI Takahiro685.14%23.85%
Mark Rutland463.48%713.46%
Will Deacon302.27%35.77%
Javi Merino211.59%11.92%
Sudeep KarkadaNagesha191.44%11.92%
Geert Uytterhoeven191.44%23.85%
Mark Salter151.13%35.77%
Suzuki K. Poulose141.06%11.92%
Ganapatrao Kulkarni120.91%11.92%
David Daney100.76%11.92%
Laura Abbott100.76%23.85%
Jon Masters100.76%23.85%
Steve Capper100.76%11.92%
Al Stone80.61%11.92%
Alexander Popov80.61%11.92%
Graeme Gregory70.53%23.85%
Andrey Ryabinin60.45%11.92%
Kefeng Wang60.45%11.92%
Ingo Molnar30.23%11.92%
Shannon Zhao30.23%11.92%
Andre Przywara30.23%11.92%
Rob Herring30.23%11.92%
Toshi Kani20.15%11.92%
Michal Marek10.08%11.92%
Stefano Stabellini10.08%11.92%
Total1322100.00%52100.00%
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