/* SPDX-License-Identifier: GPL-2.0 */ #ifndef _ASM_IA64_PCI_H #define _ASM_IA64_PCI_H #include <linux/mm.h> #include <linux/slab.h> #include <linux/spinlock.h> #include <linux/string.h> #include <linux/types.h> #include <linux/scatterlist.h> #include <asm/io.h> #include <asm/hw_irq.h> struct pci_vector_struct { __u16 segment; /* PCI Segment number */ __u16 bus; /* PCI Bus number */ __u32 pci_id; /* ACPI split 16 bits device, 16 bits function (see section 6.1.1) */ __u8 pin; /* PCI PIN (0 = A, 1 = B, 2 = C, 3 = D) */ __u32 irq; /* IRQ assigned */ }; /* * Can be used to override the logic in pci_scan_bus for skipping already-configured bus * numbers - to be used for buggy BIOSes or architectures with incomplete PCI setup by the * loader. */ #define pcibios_assign_all_busses() 0 #define PCIBIOS_MIN_IO 0x1000 #define PCIBIOS_MIN_MEM 0x10000000 void pcibios_config_init(void); struct pci_dev; /* * PCI_DMA_BUS_IS_PHYS should be set to 1 if there is _necessarily_ a direct * correspondence between device bus addresses and CPU physical addresses. * Platforms with a hardware I/O MMU _must_ turn this off to suppress the * bounce buffer handling code in the block and network device layers. * Platforms with separate bus address spaces _must_ turn this off and provide * a device DMA mapping implementation that takes care of the necessary * address translation. * * For now, the ia64 platforms which may have separate/multiple bus address * spaces all have I/O MMUs which support the merging of physically * discontiguous buffers, so we can use that as the sole factor to determine * the setting of PCI_DMA_BUS_IS_PHYS. */ extern unsigned long ia64_max_iommu_merge_mask; #define PCI_DMA_BUS_IS_PHYS (ia64_max_iommu_merge_mask == ~0UL) #define HAVE_PCI_MMAP #define ARCH_GENERIC_PCI_MMAP_RESOURCE #define arch_can_pci_mmap_wc() 1 #define HAVE_PCI_LEGACY extern int pci_mmap_legacy_page_range(struct pci_bus *bus, struct vm_area_struct *vma, enum pci_mmap_state mmap_state); #define pci_get_legacy_mem platform_pci_get_legacy_mem #define pci_legacy_read platform_pci_legacy_read #define pci_legacy_write platform_pci_legacy_write struct pci_controller { struct acpi_device *companion; void *iommu; int segment; int node; /* nearest node with memory or NUMA_NO_NODE for global allocation */ void *platform_data; }; #define PCI_CONTROLLER(busdev) ((struct pci_controller *) busdev->sysdata) #define pci_domain_nr(busdev) (PCI_CONTROLLER(busdev)->segment) extern struct pci_ops pci_root_ops;
static inline int pci_proc_domain(struct pci_bus *bus) { return (pci_domain_nr(bus) != 0); }Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Matthew Wilcox | 22 | 100.00% | 2 | 100.00% |
| Total | 22 | 100.00% | 2 | 100.00% |
| Person | Tokens | Prop | Commits | CommitProp |
| Bartlomiej Zolnierkiewicz | 22 | 78.57% | 1 | 50.00% |
| Yanmin Zhang | 6 | 21.43% | 1 | 50.00% |
| Total | 28 | 100.00% | 2 | 100.00% |
| Person | Tokens | Prop | Commits | CommitProp |
| Linus Torvalds (pre-git) | 38 | 15.45% | 2 | 7.41% |
| Jesse Barnes | 31 | 12.60% | 1 | 3.70% |
| Alex Williamson | 27 | 10.98% | 1 | 3.70% |
| David Howells | 25 | 10.16% | 1 | 3.70% |
| Bartlomiej Zolnierkiewicz | 25 | 10.16% | 1 | 3.70% |
| Matthew Wilcox | 24 | 9.76% | 4 | 14.81% |
| David Mosberger-Tang | 21 | 8.54% | 3 | 11.11% |
| Fenghua Yu | 11 | 4.47% | 1 | 3.70% |
| Yanmin Zhang | 9 | 3.66% | 1 | 3.70% |
| Patrick Gefre | 9 | 3.66% | 2 | 7.41% |
| David Woodhouse | 8 | 3.25% | 2 | 7.41% |
| Linus Torvalds | 4 | 1.63% | 1 | 3.70% |
| Christoph Lameter | 3 | 1.22% | 1 | 3.70% |
| Rafael J. Wysocki | 3 | 1.22% | 1 | 3.70% |
| Benjamin Herrenschmidt | 3 | 1.22% | 1 | 3.70% |
| Christoph Hellwig | 2 | 0.81% | 1 | 3.70% |
| Björn Helgaas | 1 | 0.41% | 1 | 3.70% |
| Suresh B. Siddha | 1 | 0.41% | 1 | 3.70% |
| Greg Kroah-Hartman | 1 | 0.41% | 1 | 3.70% |
| Total | 246 | 100.00% | 27 | 100.00% |