Release 4.14 arch/ia64/kernel/msi_ia64.c
// SPDX-License-Identifier: GPL-2.0
/*
* MSI hooks for standard x86 apic
*/
#include <linux/pci.h>
#include <linux/irq.h>
#include <linux/msi.h>
#include <linux/dmar.h>
#include <asm/smp.h>
#include <asm/msidef.h>
static struct irq_chip ia64_msi_chip;
#ifdef CONFIG_SMP
static int ia64_set_msi_irq_affinity(struct irq_data *idata,
const cpumask_t *cpu_mask, bool force)
{
struct msi_msg msg;
u32 addr, data;
int cpu = cpumask_first_and(cpu_mask, cpu_online_mask);
unsigned int irq = idata->irq;
if (irq_prepare_move(irq, cpu))
return -1;
__get_cached_msi_msg(irq_data_get_msi_desc(idata), &msg);
addr = msg.address_lo;
addr &= MSI_ADDR_DEST_ID_MASK;
addr |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));
msg.address_lo = addr;
data = msg.data;
data &= MSI_DATA_VECTOR_MASK;
data |= MSI_DATA_VECTOR(irq_to_vector(irq));
msg.data = data;
pci_write_msi_msg(irq, &msg);
cpumask_copy(irq_data_get_affinity_mask(idata), cpumask_of(cpu));
return 0;
}
Contributors
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| Eric W. Biedermann | 31 | 21.23% | 2 | 12.50% |
| Mark Maule | 22 | 15.07% | 1 | 6.25% |
| Thomas Gleixner | 19 | 13.01% | 2 | 12.50% |
| Yinghai Lu | 8 | 5.48% | 1 | 6.25% |
| Jiang Liu | 7 | 4.79% | 3 | 18.75% |
| Mike Travis | 5 | 3.42% | 1 | 6.25% |
| Rusty Russell | 2 | 1.37% | 1 | 6.25% |
| Xiantao Zhang | 2 | 1.37% | 1 | 6.25% |
| Yijing Wang | 2 | 1.37% | 1 | 6.25% |
| Kenji Kaneshige | 1 | 0.68% | 1 | 6.25% |
| Total | 146 | 100.00% | 16 | 100.00% |
#endif /* CONFIG_SMP */
int ia64_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
{
struct msi_msg msg;
unsigned long dest_phys_id;
int irq, vector;
irq = create_irq();
if (irq < 0)
return irq;
irq_set_msi_desc(irq, desc);
dest_phys_id = cpu_physical_id(cpumask_any_and(&(irq_to_domain(irq)),
cpu_online_mask));
vector = irq_to_vector(irq);
msg.address_hi = 0;
msg.address_lo =
MSI_ADDR_HEADER |
MSI_ADDR_DEST_MODE_PHYS |
MSI_ADDR_REDIRECTION_CPU |
MSI_ADDR_DEST_ID_CPU(dest_phys_id);
msg.data =
MSI_DATA_TRIGGER_EDGE |
MSI_DATA_LEVEL_ASSERT |
MSI_DATA_DELIVERY_FIXED |
MSI_DATA_VECTOR(vector);
pci_write_msi_msg(irq, &msg);
irq_set_chip_and_handler(irq, &ia64_msi_chip, handle_edge_irq);
return 0;
}
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| Rusty Russell | 5 | 3.82% | 1 | 8.33% |
| Srivatsa S. Bhat | 4 | 3.05% | 1 | 8.33% |
| Thomas Gleixner | 2 | 1.53% | 1 | 8.33% |
| Xiantao Zhang | 2 | 1.53% | 1 | 8.33% |
| Jiang Liu | 1 | 0.76% | 1 | 8.33% |
| Kenji Kaneshige | 1 | 0.76% | 1 | 8.33% |
| Total | 131 | 100.00% | 12 | 100.00% |
void ia64_teardown_msi_irq(unsigned int irq)
{
destroy_irq(irq);
}
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| Eric W. Biedermann | 7 | 50.00% | 3 | 75.00% |
| Mark Maule | 7 | 50.00% | 1 | 25.00% |
| Total | 14 | 100.00% | 4 | 100.00% |
static void ia64_ack_msi_irq(struct irq_data *data)
{
irq_complete_move(data->irq);
irq_move_irq(data);
ia64_eoi();
}
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| Person | Tokens | Prop | Commits | CommitProp |
| Eric W. Biedermann | 13 | 50.00% | 1 | 25.00% |
| Thomas Gleixner | 8 | 30.77% | 2 | 50.00% |
| Kenji Kaneshige | 5 | 19.23% | 1 | 25.00% |
| Total | 26 | 100.00% | 4 | 100.00% |
static int ia64_msi_retrigger_irq(struct irq_data *data)
{
unsigned int vector = irq_to_vector(data->irq);
ia64_resend_irq(vector);
return 1;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Eric W. Biedermann | 21 | 70.00% | 1 | 33.33% |
| Thomas Gleixner | 6 | 20.00% | 1 | 33.33% |
| Yasuaki Ishimatsu | 3 | 10.00% | 1 | 33.33% |
| Total | 30 | 100.00% | 3 | 100.00% |
/*
* Generic ops used on most IA64 platforms.
*/
static struct irq_chip ia64_msi_chip = {
.name = "PCI-MSI",
.irq_mask = pci_msi_mask_irq,
.irq_unmask = pci_msi_unmask_irq,
.irq_ack = ia64_ack_msi_irq,
#ifdef CONFIG_SMP
.irq_set_affinity = ia64_set_msi_irq_affinity,
#endif
.irq_retrigger = ia64_msi_retrigger_irq,
};
int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
{
if (platform_setup_msi_irq)
return platform_setup_msi_irq(pdev, desc);
return ia64_setup_msi_irq(pdev, desc);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Eric W. Biedermann | 35 | 100.00% | 2 | 100.00% |
| Total | 35 | 100.00% | 2 | 100.00% |
void arch_teardown_msi_irq(unsigned int irq)
{
if (platform_teardown_msi_irq)
return platform_teardown_msi_irq(irq);
return ia64_teardown_msi_irq(irq);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Eric W. Biedermann | 25 | 100.00% | 1 | 100.00% |
| Total | 25 | 100.00% | 1 | 100.00% |
#ifdef CONFIG_INTEL_IOMMU
#ifdef CONFIG_SMP
static int dmar_msi_set_affinity(struct irq_data *data,
const struct cpumask *mask, bool force)
{
unsigned int irq = data->irq;
struct irq_cfg *cfg = irq_cfg + irq;
struct msi_msg msg;
int cpu = cpumask_first_and(mask, cpu_online_mask);
if (irq_prepare_move(irq, cpu))
return -1;
dmar_msi_read(irq, &msg);
msg.data &= ~MSI_DATA_VECTOR_MASK;
msg.data |= MSI_DATA_VECTOR(cfg->vector);
msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK;
msg.address_lo |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));
dmar_msi_write(irq, &msg);
cpumask_copy(irq_data_get_affinity_mask(data), mask);
return 0;
}
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| Person | Tokens | Prop | Commits | CommitProp |
| Fenghua Yu | 90 | 69.23% | 1 | 12.50% |
| Thomas Gleixner | 19 | 14.62% | 2 | 25.00% |
| Yinghai Lu | 8 | 6.15% | 1 | 12.50% |
| Rusty Russell | 4 | 3.08% | 1 | 12.50% |
| Mike Travis | 4 | 3.08% | 1 | 12.50% |
| Jiang Liu | 3 | 2.31% | 1 | 12.50% |
| Xiantao Zhang | 2 | 1.54% | 1 | 12.50% |
| Total | 130 | 100.00% | 8 | 100.00% |
#endif /* CONFIG_SMP */
static struct irq_chip dmar_msi_type = {
.name = "DMAR_MSI",
.irq_unmask = dmar_msi_unmask,
.irq_mask = dmar_msi_mask,
.irq_ack = ia64_ack_msi_irq,
#ifdef CONFIG_SMP
.irq_set_affinity = dmar_msi_set_affinity,
#endif
.irq_retrigger = ia64_msi_retrigger_irq,
};
static void
msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg)
{
struct irq_cfg *cfg = irq_cfg + irq;
unsigned dest;
dest = cpu_physical_id(cpumask_first_and(&(irq_to_domain(irq)),
cpu_online_mask));
msg->address_hi = 0;
msg->address_lo =
MSI_ADDR_HEADER |
MSI_ADDR_DEST_MODE_PHYS |
MSI_ADDR_REDIRECTION_CPU |
MSI_ADDR_DEST_ID_CPU(dest);
msg->data =
MSI_DATA_TRIGGER_EDGE |
MSI_DATA_LEVEL_ASSERT |
MSI_DATA_DELIVERY_FIXED |
MSI_DATA_VECTOR(cfg->vector);
}
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| Srivatsa S. Bhat | 4 | 4.55% | 1 | 20.00% |
| Xiantao Zhang | 2 | 2.27% | 1 | 20.00% |
| Jiang Liu | 1 | 1.14% | 1 | 20.00% |
| Total | 88 | 100.00% | 5 | 100.00% |
int dmar_alloc_hwirq(int id, int node, void *arg)
{
int irq;
struct msi_msg msg;
irq = create_irq();
if (irq > 0) {
irq_set_handler_data(irq, arg);
irq_set_chip_and_handler_name(irq, &dmar_msi_type,
handle_edge_irq, "edge");
msi_compose_msg(NULL, irq, &msg);
dmar_msi_write(irq, &msg);
}
return irq;
}
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| Person | Tokens | Prop | Commits | CommitProp |
| Jiang Liu | 38 | 50.67% | 1 | 33.33% |
| Fenghua Yu | 36 | 48.00% | 1 | 33.33% |
| Thomas Gleixner | 1 | 1.33% | 1 | 33.33% |
| Total | 75 | 100.00% | 3 | 100.00% |
void dmar_free_hwirq(int irq)
{
irq_set_handler_data(irq, NULL);
destroy_irq(irq);
}
Contributors
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| Jiang Liu | 20 | 100.00% | 1 | 100.00% |
| Total | 20 | 100.00% | 1 | 100.00% |
#endif /* CONFIG_INTEL_IOMMU */
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| Eric W. Biedermann | 232 | 27.36% | 3 | 9.38% |
| Mark Maule | 93 | 10.97% | 1 | 3.12% |
| Jiang Liu | 70 | 8.25% | 4 | 12.50% |
| Thomas Gleixner | 67 | 7.90% | 7 | 21.88% |
| Yasuaki Ishimatsu | 60 | 7.08% | 3 | 9.38% |
| Rusty Russell | 16 | 1.89% | 2 | 6.25% |
| Yinghai Lu | 16 | 1.89% | 1 | 3.12% |
| Xiantao Zhang | 11 | 1.30% | 1 | 3.12% |
| Mike Travis | 9 | 1.06% | 1 | 3.12% |
| Srivatsa S. Bhat | 8 | 0.94% | 1 | 3.12% |
| Kenji Kaneshige | 7 | 0.83% | 2 | 6.25% |
| Yijing Wang | 2 | 0.24% | 1 | 3.12% |
| Christian Kujau | 2 | 0.24% | 1 | 3.12% |
| Suresh B. Siddha | 2 | 0.24% | 1 | 3.12% |
| Greg Kroah-Hartman | 1 | 0.12% | 1 | 3.12% |
| Jaswinder Singh Rajput | 1 | 0.12% | 1 | 3.12% |
| Total | 848 | 100.00% | 32 | 100.00% |
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