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Release 4.14 arch/powerpc/platforms/cell/iommu.c

Directory: arch/powerpc/platforms/cell
/*
 * IOMMU implementation for Cell Broadband Processor Architecture
 *
 * (C) Copyright IBM Corporation 2006-2008
 *
 * Author: Jeremy Kerr <jk@ozlabs.org>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2, or (at your option)
 * any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */


#undef DEBUG

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/notifier.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/slab.h>
#include <linux/memblock.h>

#include <asm/prom.h>
#include <asm/iommu.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <asm/udbg.h>
#include <asm/firmware.h>
#include <asm/cell-regs.h>

#include "cell.h"
#include "interrupt.h"

/* Define CELL_IOMMU_REAL_UNMAP to actually unmap non-used pages
 * instead of leaving them mapped to some dummy page. This can be
 * enabled once the appropriate workarounds for spider bugs have
 * been enabled
 */

#define CELL_IOMMU_REAL_UNMAP

/* Define CELL_IOMMU_STRICT_PROTECTION to enforce protection of
 * IO PTEs based on the transfer direction. That can be enabled
 * once spider-net has been fixed to pass the correct direction
 * to the DMA mapping functions
 */

#define CELL_IOMMU_STRICT_PROTECTION



#define NR_IOMMUS			2

/* IOC mmap registers */

#define IOC_Reg_Size			0x2000


#define IOC_IOPT_CacheInvd		0x908

#define IOC_IOPT_CacheInvd_NE_Mask	0xffe0000000000000ul

#define IOC_IOPT_CacheInvd_IOPTE_Mask	0x000003fffffffff8ul

#define IOC_IOPT_CacheInvd_Busy		0x0000000000000001ul


#define IOC_IOST_Origin			0x918

#define IOC_IOST_Origin_E		0x8000000000000000ul

#define IOC_IOST_Origin_HW		0x0000000000000800ul

#define IOC_IOST_Origin_HL		0x0000000000000400ul


#define IOC_IO_ExcpStat			0x920

#define IOC_IO_ExcpStat_V		0x8000000000000000ul

#define IOC_IO_ExcpStat_SPF_Mask	0x6000000000000000ul

#define IOC_IO_ExcpStat_SPF_S		0x6000000000000000ul

#define IOC_IO_ExcpStat_SPF_P		0x2000000000000000ul

#define IOC_IO_ExcpStat_ADDR_Mask	0x00000007fffff000ul

#define IOC_IO_ExcpStat_RW_Mask		0x0000000000000800ul

#define IOC_IO_ExcpStat_IOID_Mask	0x00000000000007fful


#define IOC_IO_ExcpMask			0x928

#define IOC_IO_ExcpMask_SFE		0x4000000000000000ul

#define IOC_IO_ExcpMask_PFE		0x2000000000000000ul


#define IOC_IOCmd_Offset		0x1000


#define IOC_IOCmd_Cfg			0xc00

#define IOC_IOCmd_Cfg_TE		0x0000800000000000ul


/* Segment table entries */

#define IOSTE_V			0x8000000000000000ul 
/* valid */

#define IOSTE_H			0x4000000000000000ul 
/* cache hint */

#define IOSTE_PT_Base_RPN_Mask  0x3ffffffffffff000ul 
/* base RPN of IOPT */

#define IOSTE_NPPT_Mask		0x0000000000000fe0ul 
/* no. pages in IOPT */

#define IOSTE_PS_Mask		0x0000000000000007ul 
/* page size */

#define IOSTE_PS_4K		0x0000000000000001ul 
/*   - 4kB  */

#define IOSTE_PS_64K		0x0000000000000003ul 
/*   - 64kB */

#define IOSTE_PS_1M		0x0000000000000005ul 
/*   - 1MB  */

#define IOSTE_PS_16M		0x0000000000000007ul 
/*   - 16MB */


/* IOMMU sizing */

#define IO_SEGMENT_SHIFT	28

#define IO_PAGENO_BITS(shift)	(IO_SEGMENT_SHIFT - (shift))

/* The high bit needs to be set on every DMA address */

#define SPIDER_DMA_OFFSET	0x80000000ul


struct iommu_window {
	
struct list_head list;
	
struct cbe_iommu *iommu;
	
unsigned long offset;
	
unsigned long size;
	
unsigned int ioid;
	
struct iommu_table table;
};


#define NAMESIZE 8

struct cbe_iommu {
	
int nid;
	
char name[NAMESIZE];
	
void __iomem *xlate_regs;
	
void __iomem *cmd_regs;
	
unsigned long *stab;
	
unsigned long *ptab;
	
void *pad_page;
	
struct list_head windows;
};

/* Static array of iommus, one per node
 *   each contains a list of windows, keyed from dma_window property
 *   - on bus setup, look for a matching window, or create one
 *   - on dev setup, assign iommu_table ptr
 */

static struct cbe_iommu iommus[NR_IOMMUS];

static int cbe_nr_iommus;




static void invalidate_tce_cache(struct cbe_iommu *iommu, unsigned long *pte,
		long n_ptes)
{
	u64 __iomem *reg;
	u64 val;
	long n;

	reg = iommu->xlate_regs + IOC_IOPT_CacheInvd;

	while (n_ptes > 0) {
		/* we can invalidate up to 1 << 11 PTEs at once */
		n = min(n_ptes, 1l << 11);
		val = (((n /*- 1*/) << 53) & IOC_IOPT_CacheInvd_NE_Mask)
			| (__pa(pte) & IOC_IOPT_CacheInvd_IOPTE_Mask)
		        | IOC_IOPT_CacheInvd_Busy;

		out_be64(reg, val);
		while (in_be64(reg) & IOC_IOPT_CacheInvd_Busy)
			;

		n_ptes -= n;
		pte += n;
	}
}


Contributors
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Jeremy Kerr7366.97%120.00%


Arnd Bergmann3128.44%120.00%


Al Viro32.75%240.00%


Ingo Molnar21.83%120.00%


Total109100.00%5100.00%






static int tce_build_cell(struct iommu_table *tbl, long index, long npages,
		unsigned long uaddr, enum dma_data_direction direction,
		unsigned long attrs)
{
	int i;
	unsigned long *io_pte, base_pte;
	struct iommu_window *window =
		container_of(tbl, struct iommu_window, table);

	/* implementing proper protection causes problems with the spidernet
         * driver - check mapping directions later, but allow read & write by
         * default for now.*/
#ifdef CELL_IOMMU_STRICT_PROTECTION
	/* to avoid referencing a global, we use a trick here to setup the
         * protection bit. "prot" is setup to be 3 fields of 4 bits appended
         * together for each of the 3 supported direction values. It is then
         * shifted left so that the fields matching the desired direction
         * lands on the appropriate bits, and other bits are masked out.
         */
	const unsigned long prot = 0xc48;
	base_pte =
		((prot << (52 + 4 * direction)) &
		 (CBE_IOPTE_PP_W | CBE_IOPTE_PP_R)) |
		CBE_IOPTE_M | CBE_IOPTE_SO_RW |
		(window->ioid & CBE_IOPTE_IOID_Mask);
#else
	base_pte = CBE_IOPTE_PP_W | CBE_IOPTE_PP_R | CBE_IOPTE_M |
		CBE_IOPTE_SO_RW | (window->ioid & CBE_IOPTE_IOID_Mask);
#endif
	if (unlikely(attrs & DMA_ATTR_WEAK_ORDERING))
		base_pte &= ~CBE_IOPTE_SO_RW;

	io_pte = (unsigned long *)tbl->it_base + (index - tbl->it_offset);

	for (i = 0; i < npages; i++, uaddr += (1 << tbl->it_page_shift))
		io_pte[i] = base_pte | (__pa(uaddr) & CBE_IOPTE_RPN_Mask);

	mb();

	invalidate_tce_cache(window->iommu, io_pte, npages);

	pr_debug("tce_build_cell(index=%lx,n=%lx,dir=%d,base_pte=%lx)\n",
		 index, npages, direction, base_pte);
	return 0;
}


Contributors
PersonTokensPropCommitsCommitProp
Jeremy Kerr14966.52%19.09%


Arnd Bergmann3214.29%19.09%


Mark Nelson135.80%218.18%


Geert Uytterhoeven125.36%19.09%


Michael Ellerman73.12%327.27%


Krzysztof Kozlowski41.79%19.09%


Robert Jennings41.79%19.09%


Alistair Popple31.34%19.09%


Total224100.00%11100.00%






static void tce_free_cell(struct iommu_table *tbl, long index, long npages)
{

	int i;
	unsigned long *io_pte, pte;
	struct iommu_window *window =
		container_of(tbl, struct iommu_window, table);

	pr_debug("tce_free_cell(index=%lx,n=%lx)\n", index, npages);

#ifdef CELL_IOMMU_REAL_UNMAP
	pte = 0;
#else
	/* spider bridge does PCI reads after freeing - insert a mapping
         * to a scratch page instead of an invalid entry */
	pte = CBE_IOPTE_PP_R | CBE_IOPTE_M | CBE_IOPTE_SO_RW |
		__pa(window->iommu->pad_page) |
		(window->ioid & CBE_IOPTE_IOID_Mask);
#endif

	io_pte = (unsigned long *)tbl->it_base + (index - tbl->it_offset);

	for (i = 0; i < npages; i++)
		io_pte[i] = pte;

	mb();

	invalidate_tce_cache(window->iommu, io_pte, npages);
}


Contributors
PersonTokensPropCommitsCommitProp
Jeremy Kerr11178.72%125.00%


Arnd Bergmann2417.02%125.00%


Geert Uytterhoeven42.84%125.00%


Michael Ellerman21.42%125.00%


Total141100.00%4100.00%






static irqreturn_t ioc_interrupt(int irq, void *data)
{
	unsigned long stat, spf;
	struct cbe_iommu *iommu = data;

	stat = in_be64(iommu->xlate_regs + IOC_IO_ExcpStat);
	spf = stat & IOC_IO_ExcpStat_SPF_Mask;

	/* Might want to rate limit it */
	printk(KERN_ERR "iommu: DMA exception 0x%016lx\n", stat);
	printk(KERN_ERR "  V=%d, SPF=[%c%c], RW=%s, IOID=0x%04x\n",
	       !!(stat & IOC_IO_ExcpStat_V),
	       (spf == IOC_IO_ExcpStat_SPF_S) ? 'S' : ' ',
	       (spf == IOC_IO_ExcpStat_SPF_P) ? 'P' : ' ',
	       (stat & IOC_IO_ExcpStat_RW_Mask) ? "Read" : "Write",
	       (unsigned int)(stat & IOC_IO_ExcpStat_IOID_Mask));
	printk(KERN_ERR "  page=0x%016lx\n",
	       stat & IOC_IO_ExcpStat_ADDR_Mask);

	/* clear interrupt */
	stat &= ~IOC_IO_ExcpStat_V;
	out_be64(iommu->xlate_regs + IOC_IO_ExcpStat, stat);

	return IRQ_HANDLED;
}


Contributors
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Jeremy Kerr11181.62%266.67%


Arnd Bergmann2518.38%133.33%


Total136100.00%3100.00%






static int cell_iommu_find_ioc(int nid, unsigned long *base)
{
	struct device_node *np;
	struct resource r;

	*base = 0;

	/* First look for new style /be nodes */
	for_each_node_by_name(np, "ioc") {
		if (of_node_to_nid(np) != nid)
			continue;
		if (of_address_to_resource(np, 0, &r)) {
			printk(KERN_ERR "iommu: can't get address for %pOF\n",
			       np);
			continue;
		}
		*base = r.start;
		of_node_put(np);
		return 0;
	}

	/* Ok, let's try the old way */
	for_each_node_by_type(np, "cpu") {
		const unsigned int *nidp;
		const unsigned long *tmp;

		nidp = of_get_property(np, "node-id", NULL);
		if (nidp && *nidp == nid) {
			tmp = of_get_property(np, "ioc-translation", NULL);
			if (tmp) {
				*base = *tmp;
				of_node_put(np);
				return 0;
			}
		}
	}

	return -ENODEV;
}


Contributors
PersonTokensPropCommitsCommitProp
Jeremy Kerr11268.71%125.00%


Arnd Bergmann4829.45%125.00%


Stephen Rothwell21.23%125.00%


Rob Herring10.61%125.00%


Total163100.00%4100.00%






static void cell_iommu_setup_stab(struct cbe_iommu *iommu,
				unsigned long dbase, unsigned long dsize,
				unsigned long fbase, unsigned long fsize)
{
	struct page *page;
	unsigned long segments, stab_size;

	segments = max(dbase + dsize, fbase + fsize) >> IO_SEGMENT_SHIFT;

	pr_debug("%s: iommu[%d]: segments: %lu\n",
			__func__, iommu->nid, segments);

	/* set up the segment table */
	stab_size = segments * sizeof(unsigned long);
	page = alloc_pages_node(iommu->nid, GFP_KERNEL, get_order(stab_size));
	BUG_ON(!page);
	iommu->stab = page_address(page);
	memset(iommu->stab, 0, stab_size);
}


Contributors
PersonTokensPropCommitsCommitProp
Jeremy Kerr6352.94%114.29%


Michael Ellerman4638.66%457.14%


Arnd Bergmann97.56%114.29%


Harvey Harrison10.84%114.29%


Total119100.00%7100.00%






static unsigned long *cell_iommu_alloc_ptab(struct cbe_iommu *iommu,
		unsigned long base, unsigned long size, unsigned long gap_base,
		unsigned long gap_size, unsigned long page_shift)
{
	struct page *page;
	int i;
	unsigned long reg, segments, pages_per_segment, ptab_size,
		      n_pte_pages, start_seg, *ptab;

	start_seg = base >> IO_SEGMENT_SHIFT;
	segments  = size >> IO_SEGMENT_SHIFT;
	pages_per_segment = 1ull << IO_PAGENO_BITS(page_shift);
	/* PTEs for each segment must start on a 4K boundary */
	pages_per_segment = max(pages_per_segment,
				(1 << 12) / sizeof(unsigned long));

	ptab_size = segments * pages_per_segment * sizeof(unsigned long);
	pr_debug("%s: iommu[%d]: ptab_size: %lu, order: %d\n", __func__,
			iommu->nid, ptab_size, get_order(ptab_size));
	page = alloc_pages_node(iommu->nid, GFP_KERNEL, get_order(ptab_size));
	BUG_ON(!page);

	ptab = page_address(page);
	memset(ptab, 0, ptab_size);

	/* number of 4K pages needed for a page table */
	n_pte_pages = (pages_per_segment * sizeof(unsigned long)) >> 12;

	pr_debug("%s: iommu[%d]: stab at %p, ptab at %p, n_pte_pages: %lu\n",
			__func__, iommu->nid, iommu->stab, ptab,
			n_pte_pages);

	/* initialise the STEs */
	reg = IOSTE_V | ((n_pte_pages - 1) << 5);

	switch (page_shift) {
	case 12: reg |= IOSTE_PS_4K;  break;
	case 16: reg |= IOSTE_PS_64K; break;
	case 20: reg |= IOSTE_PS_1M;  break;
	case 24: reg |= IOSTE_PS_16M; break;
	default: BUG();
	}

	gap_base = gap_base >> IO_SEGMENT_SHIFT;
	gap_size = gap_size >> IO_SEGMENT_SHIFT;

	pr_debug("Setting up IOMMU stab:\n");
	for (i = start_seg; i < (start_seg + segments); i++) {
		if (i >= gap_base && i < (gap_base + gap_size)) {
			pr_debug("\toverlap at %d, skipping\n", i);
			continue;
		}
		iommu->stab[i] = reg | (__pa(ptab) + (n_pte_pages << 12) *
					(i - start_seg));
		pr_debug("\t[%d] 0x%016lx\n", i, iommu->stab[i]);
	}

	return ptab;
}


Contributors
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Michael Ellerman18149.86%666.67%


Jeremy Kerr16846.28%111.11%


Arnd Bergmann123.31%111.11%


Harvey Harrison20.55%111.11%


Total363100.00%9100.00%






static void cell_iommu_enable_hardware(struct cbe_iommu *iommu)
{
	int ret;
	unsigned long reg, xlate_base;
	unsigned int virq;

	if (cell_iommu_find_ioc(iommu->nid, &xlate_base))
		panic("%s: missing IOC register mappings for node %d\n",
		      __func__, iommu->nid);

	iommu->xlate_regs = ioremap(xlate_base, IOC_Reg_Size);
	iommu->cmd_regs = iommu->xlate_regs + IOC_IOCmd_Offset;

	/* ensure that the STEs have updated */
	mb();

	/* setup interrupts for the iommu. */
	reg = in_be64(iommu->xlate_regs + IOC_IO_ExcpStat);
	out_be64(iommu->xlate_regs + IOC_IO_ExcpStat,
			reg & ~IOC_IO_ExcpStat_V);
	out_be64(iommu->xlate_regs + IOC_IO_ExcpMask,
			IOC_IO_ExcpMask_PFE | IOC_IO_ExcpMask_SFE);

	virq = irq_create_mapping(NULL,
			IIC_IRQ_IOEX_ATI | (iommu->nid << IIC_IRQ_NODE_SHIFT));
	BUG_ON(!virq);

	ret = request_irq(virq, ioc_interrupt, 0, iommu->name, iommu);
	BUG_ON(ret);

	/* set the IOC segment table origin register (and turn on the iommu) */
	reg = IOC_IOST_Origin_E | __pa(iommu->stab) | IOC_IOST_Origin_HW;
	out_be64(iommu->xlate_regs + IOC_IOST_Origin, reg);
	in_be64(iommu->xlate_regs + IOC_IOST_Origin);

	/* turn on IO translation */
	reg = in_be64(iommu->cmd_regs + IOC_IOCmd_Cfg) | IOC_IOCmd_Cfg_TE;
	out_be64(iommu->cmd_regs + IOC_IOCmd_Cfg, reg);
}


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Jeremy Kerr13160.93%114.29%


Michael Ellerman6731.16%228.57%


Arnd Bergmann125.58%114.29%


Jens Osterkamp31.40%114.29%


Harvey Harrison10.47%114.29%


Yong Zhang10.47%114.29%


Total215100.00%7100.00%






static void cell_iommu_setup_hardware(struct cbe_iommu *iommu,
	unsigned long base, unsigned long size)
{
	cell_iommu_setup_stab(iommu, base, size, 0, 0);
	iommu->ptab = cell_iommu_alloc_ptab(iommu, base, size, 0, 0,
					    IOMMU_PAGE_SHIFT_4K);
	cell_iommu_enable_hardware(iommu);
}


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Michael Ellerman5598.21%480.00%


Alistair Popple11.79%120.00%


Total56100.00%5100.00%



#if 0/* Unused for now */
static struct iommu_window *find_window(struct cbe_iommu *iommu,
                unsigned long offset, unsigned long size)
{
        struct iommu_window *window;

	/* todo: check for overlapping (but not equal) windows) */

	list_for_each_entry(window, &(iommu->windows), list) {
                if (window->offset == offset && window->size == size)
                        return window;
        }

        return NULL;
}
#endif




static inline u32 cell_iommu_get_ioid(struct device_node *np)
{
	const u32 *ioid;

	ioid = of_get_property(np, "ioid", NULL);
	if (ioid == NULL) {
		printk(KERN_WARNING "iommu: missing ioid for %pOF using 0\n",
		       np);
		return 0;
	}

	return *ioid;
}


Contributors
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Michael Ellerman5098.04%150.00%


Rob Herring11.96%150.00%


Total51100.00%2100.00%




static struct iommu_table_ops cell_iommu_ops = {
	.set = tce_build_cell,
	.clear = tce_free_cell
};



static struct iommu_window * __init

cell_iommu_setup_window(struct cbe_iommu *iommu, struct device_node *np,
			unsigned long offset, unsigned long size,
			unsigned long pte_offset)
{
	struct iommu_window *window;
	struct page *page;
	u32 ioid;

	ioid = cell_iommu_get_ioid(np);

	window = kzalloc_node(sizeof(*window), GFP_KERNEL, iommu->nid);
	BUG_ON(window == NULL);

	window->offset = offset;
	window->size = size;
	window->ioid = ioid;
	window->iommu = iommu;

	window->table.it_blocksize = 16;
	window->table.it_base = (unsigned long)iommu->ptab;
	window->table.it_index = iommu->nid;
	window->table.it_page_shift = IOMMU_PAGE_SHIFT_4K;
	window->table.it_offset =
		(offset >> window->table.it_page_shift) + pte_offset;
	window->table.it_size = size >> window->table.it_page_shift;
	window->table.it_ops = &cell_iommu_ops;

	iommu_init_table(&window->table, iommu->nid);

	pr_debug("\tioid      %d\n", window->ioid);
	pr_debug("\tblocksize %ld\n", window->table.it_blocksize);
	pr_debug("\tbase      0x%016lx\n", window->table.it_base);
	pr_debug("\toffset    0x%lx\n", window->table.it_offset);
	pr_debug("\tsize      %ld\n", window->table.it_size);

	list_add(&window->list, &iommu->windows);

	if (offset != 0)
		return window;

	/* We need to map and reserve the first IOMMU page since it's used
         * by the spider workaround. In theory, we only need to do that when
         * running on spider but it doesn't really matter.
         *
         * This code also assumes that we have a window that starts at 0,
         * which is the case on all spider based blades.
         */
	page = alloc_pages_node(iommu->nid, GFP_KERNEL, 0);
	BUG_ON(!page);
	iommu->pad_page = page_address(page);
	clear_page(iommu->pad_page);

	__set_bit(0, window->table.it_map);
	tce_build_cell(&window->table, window->table.it_offset, 1,
		       (unsigned long)iommu->pad_page, DMA_TO_DEVICE, 0);

	return window;
}


Contributors
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Jeremy Kerr25172.75%110.00%


Michael Ellerman4212.17%220.00%


Alistair Popple185.22%110.00%


Jens Osterkamp174.93%110.00%


Alexey Kardashevskiy92.61%110.00%


Arnd Bergmann51.45%110.00%


Krzysztof Kozlowski10.29%110.00%


Anton Blanchard10.29%110.00%


Mark Nelson10.29%110.00%


Total345100.00%10100.00%






static struct cbe_iommu *cell_iommu_for_node(int nid)
{
	int i;

	for (i = 0; i < cbe_nr_iommus; i++)
		if (iommus[i].nid == nid)
			return &iommus[i];
	return NULL;
}


Contributors
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Jeremy Kerr4083.33%133.33%


Arnd Bergmann510.42%133.33%


Jens Osterkamp36.25%133.33%


Total48100.00%3100.00%




static unsigned long cell_dma_direct_offset;


static unsigned long dma_iommu_fixed_base;

/* iommu_fixed_is_weak is set if booted with iommu_fixed=weak */

static int iommu_fixed_is_weak;




static struct iommu_table *cell_get_iommu_table(struct device *dev)
{
	struct iommu_window *window;
	struct cbe_iommu *iommu;

	/* Current implementation uses the first window available in that
         * node's iommu. We -might- do something smarter later though it may
         * never be necessary
         */
	iommu = cell_iommu_for_node(dev_to_node(dev));
	if (iommu == NULL || list_empty(&iommu->windows)) {
		dev_err(dev, "iommu: missing iommu for %pOF (node %d)\n",
		       dev->of_node, dev_to_node(dev));
		return NULL;
	}
	window = list_entry(iommu->windows.next, struct iommu_window, list);

	return &window->table;
}


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Jeremy Kerr4751.65%112.50%


Arnd Bergmann2021.98%112.50%


Mark Nelson99.89%112.50%


Becky Bruce88.79%112.50%


Benjamin Herrenschmidt33.30%112.50%


Jens Osterkamp22.20%112.50%


Grant C. Likely11.10%112.50%


Rob Herring11.10%112.50%


Total91100.00%8100.00%



/* A coherent allocation implies strong ordering */




static void *dma_fixed_alloc_coherent(struct device *dev, size_t size,
				      dma_addr_t *dma_handle, gfp_t flag,
				      unsigned long attrs)
{
	if (iommu_fixed_is_weak)
		return iommu_alloc_coherent(dev, cell_get_iommu_table(dev),
					    size, dma_handle,
					    device_to_mask(dev), flag,
					    dev_to_node(dev));
	else
		return dma_direct_ops.alloc(dev, size, dma_handle, flag,
					    attrs);
}


Contributors
PersonTokensPropCommitsCommitProp
Mark Nelson6486.49%125.00%


Andrzej Pietrasiewicz56.76%125.00%


Becky Bruce34.05%125.00%


Krzysztof Kozlowski22.70%125.00%


Total74100.00%4100.00%






static void dma_fixed_free_coherent(struct device *dev, size_t size,
				    void *vaddr, dma_addr_t dma_handle,
				    unsigned long attrs)
{
	if (iommu_fixed_is_weak)
		iommu_free_coherent(cell_get_iommu_table(dev), size, vaddr,
				    dma_handle);
	else
		dma_direct_ops.free(dev, size, vaddr, dma_handle, attrs);
}


Contributors
PersonTokensPropCommitsCommitProp
Mark Nelson5288.14%133.33%


Andrzej Pietrasiewicz58.47%133.33%


Krzysztof Kozlowski23.39%133.33%


Total59100.00%3100.00%






static dma_addr_t dma_fixed_map_page(struct device *dev, struct page *page,
				     unsigned long offset, size_t size,
				     enum dma_data_direction direction,
				     unsigned long attrs)
{
	if (iommu_fixed_is_weak == (attrs & DMA_ATTR_WEAK_ORDERING))
		return dma_direct_ops.map_page(dev, page, offset, size,
					       direction, attrs);
	else
		return iommu_map_page(dev, cell_get_iommu_table(dev), page,
				      offset, size, device_to_mask(dev),
				      direction, attrs);
}


Contributors
PersonTokensPropCommitsCommitProp
Mark Nelson8093.02%266.67%


Krzysztof Kozlowski66.98%133.33%


Total86100.00%3100.00%






static void dma_fixed_unmap_page(struct device *dev, dma_addr_t dma_addr,
				 size_t size, enum dma_data_direction direction,
				 unsigned long attrs)
{
	if (iommu_fixed_is_weak == (attrs & DMA_ATTR_WEAK_ORDERING))
		dma_direct_ops.unmap_page(dev, dma_addr, size, direction,
					  attrs);
	else
		iommu_unmap_page(cell_get_iommu_table(dev), dma_addr, size,
				 direction, attrs);
}


Contributors
PersonTokensPropCommitsCommitProp
Mark Nelson6191.04%266.67%


Krzysztof Kozlowski68.96%133.33%


Total67100.00%3100.00%






static int dma_fixed_map_sg(struct device *dev, struct scatterlist *sg,
			   int nents, enum dma_data_direction direction,
			   unsigned long attrs)
{
	if (iommu_fixed_is_weak == (attrs & DMA_ATTR_WEAK_ORDERING))
		return dma_direct_ops.map_sg(dev, sg, nents, direction, attrs);
	else
		return ppc_iommu_map_sg(dev, cell_get_iommu_table(dev), sg,
					nents, device_to_mask(dev),
					direction, attrs);
}


Contributors
PersonTokensPropCommitsCommitProp
Mark Nelson7191.03%133.33%


Krzysztof Kozlowski67.69%133.33%


Joerg Roedel11.28%133.33%


Total78100.00%3100.00%






static void dma_fixed_unmap_sg(struct device *dev, struct scatterlist *sg,
			       int nents, enum dma_data_direction direction,
			       unsigned long attrs)
{
	if (iommu_fixed_is_weak == (attrs & DMA_ATTR_WEAK_ORDERING))
		dma_direct_ops.unmap_sg(dev, sg, nents, direction, attrs);
	else
		ppc_iommu_unmap_sg(cell_get_iommu_table(dev), sg, nents,
				   direction, attrs);
}


Contributors
PersonTokensPropCommitsCommitProp
Mark Nelson6289.86%133.33%


Krzysztof Kozlowski68.70%133.33%


Joerg Roedel11.45%133.33%


Total69100.00%3100.00%



static int dma_suported_and_switch(struct device *dev, u64 dma_mask);


static const struct dma_map_ops dma_iommu_fixed_ops = {
	.alloc          = dma_fixed_alloc_coherent,
	.free           = dma_fixed_free_coherent,
	.map_sg         = dma_fixed_map_sg,
	.unmap_sg       = dma_fixed_unmap_sg,
	.dma_supported  = dma_suported_and_switch,
	.map_page       = dma_fixed_map_page,
	.unmap_page     = dma_fixed_unmap_page,
	.mapping_error	= dma_iommu_mapping_error,
};




static void cell_dma_dev_setup(struct device *dev)
{
	if (get_pci_dma_ops() == &dma_iommu_ops)
		set_iommu_table_base(dev, cell_get_iommu_table(dev));
	else if (get_pci_dma_ops() == &dma_direct_ops)
		set_dma_offset(dev, cell_dma_direct_offset);
	else
		BUG()