Release 4.14 arch/sparc/include/asm/pgtable_32.h

Directory: arch/sparc/include/asm
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _SPARC_PGTABLE_H

#define _SPARC_PGTABLE_H

/*  asm/pgtable.h:  Defines and functions used to work
 *                        with Sparc page tables.
 *
 *  Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
 *  Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
 */

#include <linux/const.h>

#ifndef __ASSEMBLY__
#include <asm-generic/4level-fixup.h>

#include <linux/spinlock.h>
#include <linux/mm_types.h>
#include <asm/types.h>
#include <asm/pgtsrmmu.h>
#include <asm/vaddrs.h>
#include <asm/oplib.h>
#include <asm/cpu_type.h>


struct vm_area_struct;
struct page;

void load_mmu(void);
unsigned long calc_highpages(void);
unsigned long __init bootmem_init(unsigned long *pages_avail);


#define pte_ERROR(e)   __builtin_trap()

#define pmd_ERROR(e)   __builtin_trap()

#define pgd_ERROR(e)   __builtin_trap()


#define PMD_SHIFT		22

#define PMD_SIZE        	(1UL << PMD_SHIFT)

#define PMD_MASK        	(~(PMD_SIZE-1))

#define PMD_ALIGN(__addr) 	(((__addr) + ~PMD_MASK) & PMD_MASK)

#define PGDIR_SHIFT     	SRMMU_PGDIR_SHIFT

#define PGDIR_SIZE      	SRMMU_PGDIR_SIZE

#define PGDIR_MASK      	SRMMU_PGDIR_MASK

#define PTRS_PER_PTE    	1024

#define PTRS_PER_PMD    	SRMMU_PTRS_PER_PMD

#define PTRS_PER_PGD    	SRMMU_PTRS_PER_PGD

#define USER_PTRS_PER_PGD	PAGE_OFFSET / SRMMU_PGDIR_SIZE

#define FIRST_USER_ADDRESS	0UL

#define PTE_SIZE		(PTRS_PER_PTE*4)


#define PAGE_NONE	SRMMU_PAGE_NONE

#define PAGE_SHARED	SRMMU_PAGE_SHARED

#define PAGE_COPY	SRMMU_PAGE_COPY

#define PAGE_READONLY	SRMMU_PAGE_RDONLY

#define PAGE_KERNEL	SRMMU_PAGE_KERNEL

/* Top-level page directory - dummy used by init-mm.
 * srmmu.c will assign the real one (which is dynamically sized) */

#define swapper_pg_dir NULL

void paging_init(void);

extern unsigned long ptr_in_current_pgd;

/*         xwr */

#define __P000  PAGE_NONE

#define __P001  PAGE_READONLY

#define __P010  PAGE_COPY

#define __P011  PAGE_COPY

#define __P100  PAGE_READONLY

#define __P101  PAGE_READONLY

#define __P110  PAGE_COPY

#define __P111  PAGE_COPY


#define __S000	PAGE_NONE

#define __S001	PAGE_READONLY

#define __S010	PAGE_SHARED

#define __S011	PAGE_SHARED

#define __S100	PAGE_READONLY

#define __S101	PAGE_READONLY

#define __S110	PAGE_SHARED

#define __S111	PAGE_SHARED

/* First physical page can be anywhere, the following is needed so that
 * va-->pa and vice versa conversions work properly without performance
 * hit for all __pa()/__va() operations.
 */
extern unsigned long phys_base;
extern unsigned long pfn_base;

/*
 * ZERO_PAGE is a global shared page that is always zero: used
 * for zero-mapped memory areas etc..
 */
extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];


#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))

/*
 * In general all page table modifications should use the V8 atomic
 * swap instruction.  This insures the mmu and the cpu are in sync
 * with respect to ref/mod bits in the page tables.
 */


static inline unsigned long srmmu_swap(unsigned long *addr, unsigned long value)
{
	__asm__ __volatile__("swap [%2], %0" :
                        "=&r" (value) : "0" (value), "r" (addr) : "memory");
	return value;
}

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Total 23 100.00% 2 100.00%

/* Certain architectures need to do special things when pte's
 * within a page table are directly modified.  Thus, the following
 * hook is made available.
 */



static inline void set_pte(pte_t *ptep, pte_t pteval)
{
	srmmu_swap((unsigned long *)ptep, pte_val(pteval));
}

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#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)



static inline int srmmu_device_memory(unsigned long x)
{
	return ((x & 0xF0000000) != 0);
}

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static inline struct page *pmd_page(pmd_t pmd)
{
	if (srmmu_device_memory(pmd_val(pmd)))
		BUG();
	return pfn_to_page((pmd_val(pmd) & SRMMU_PTD_PMASK) >> (PAGE_SHIFT-4));
}

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Sam Ravnborg 2 4.55% 1 50.00%
Total 44 100.00% 2 100.00%



static inline unsigned long pgd_page_vaddr(pgd_t pgd)
{
	if (srmmu_device_memory(pgd_val(pgd))) {
		return ~0;
	} else {
		unsigned long v = pgd_val(pgd) & SRMMU_PTD_PMASK;
		return (unsigned long)__nocache_va(v << 4);
	}
}

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static inline int pte_present(pte_t pte)
{
	return ((pte_val(pte) & SRMMU_ET_MASK) == SRMMU_ET_PTE);
}

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Sam Ravnborg 2 8.33% 1 50.00%
Total 24 100.00% 2 100.00%



static inline int pte_none(pte_t pte)
{
	return !pte_val(pte);
}

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static inline void __pte_clear(pte_t *ptep)
{
	set_pte(ptep, __pte(0));
}

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static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
{
	__pte_clear(ptep);
}

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Sam Ravnborg 7 28.00% 1 50.00%
Total 25 100.00% 2 100.00%



static inline int pmd_bad(pmd_t pmd)
{
	return (pmd_val(pmd) & SRMMU_ET_MASK) != SRMMU_ET_PTD;
}

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David S. Miller 20 90.91% 1 50.00%
Sam Ravnborg 2 9.09% 1 50.00%
Total 22 100.00% 2 100.00%



static inline int pmd_present(pmd_t pmd)
{
	return ((pmd_val(pmd) & SRMMU_ET_MASK) == SRMMU_ET_PTD);
}

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David S. Miller 22 91.67% 1 50.00%
Sam Ravnborg 2 8.33% 1 50.00%
Total 24 100.00% 2 100.00%



static inline int pmd_none(pmd_t pmd)
{
	return !pmd_val(pmd);
}

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static inline void pmd_clear(pmd_t *pmdp)
{
	int i;
	for (i = 0; i < PTRS_PER_PTE/SRMMU_REAL_PTRS_PER_PTE; i++)
		set_pte((pte_t *)&pmdp->pmdv[i], __pte(0));
}

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David S. Miller 46 93.88% 2 66.67%
Sam Ravnborg 3 6.12% 1 33.33%
Total 49 100.00% 3 100.00%



static inline int pgd_none(pgd_t pgd)          
{
	return !(pgd_val(pgd) & 0xFFFFFFF);
}

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Sam Ravnborg 4 19.05% 1 50.00%
Total 21 100.00% 2 100.00%



static inline int pgd_bad(pgd_t pgd)
{
	return (pgd_val(pgd) & SRMMU_ET_MASK) != SRMMU_ET_PTD;
}

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David S. Miller 18 81.82% 1 50.00%
Sam Ravnborg 4 18.18% 1 50.00%
Total 22 100.00% 2 100.00%



static inline int pgd_present(pgd_t pgd)
{
	return ((pgd_val(pgd) & SRMMU_ET_MASK) == SRMMU_ET_PTD);
}

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David S. Miller 20 83.33% 1 50.00%
Sam Ravnborg 4 16.67% 1 50.00%
Total 24 100.00% 2 100.00%



static inline void pgd_clear(pgd_t *pgdp)
{
	set_pte((pte_t *)pgdp, __pte(0));
}

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David S. Miller 22 88.00% 2 66.67%
Sam Ravnborg 3 12.00% 1 33.33%
Total 25 100.00% 3 100.00%

/*
 * The following only work if pte_present() is true.
 * Undefined behaviour if not..
 */


static inline int pte_write(pte_t pte)
{
	return pte_val(pte) & SRMMU_WRITE;
}

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David S. Miller 1 5.56% 1 50.00%
Total 18 100.00% 2 100.00%



static inline int pte_dirty(pte_t pte)
{
	return pte_val(pte) & SRMMU_DIRTY;
}

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David S. Miller 1 5.56% 1 50.00%
Total 18 100.00% 2 100.00%



static inline int pte_young(pte_t pte)
{
	return pte_val(pte) & SRMMU_REF;
}

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David S. Miller 1 5.56% 1 50.00%
Total 18 100.00% 2 100.00%



static inline int pte_special(pte_t pte)
{
	return 0;
}

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static inline pte_t pte_wrprotect(pte_t pte)
{
	return __pte(pte_val(pte) & ~SRMMU_WRITE);
}

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David S. Miller 1 4.55% 1 50.00%
Total 22 100.00% 2 100.00%



static inline pte_t pte_mkclean(pte_t pte)
{
	return __pte(pte_val(pte) & ~SRMMU_DIRTY);
}

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David S. Miller 1 4.55% 1 50.00%
Total 22 100.00% 2 100.00%



static inline pte_t pte_mkold(pte_t pte)
{
	return __pte(pte_val(pte) & ~SRMMU_REF);
}

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Sam Ravnborg 21 95.45% 1 50.00%
David S. Miller 1 4.55% 1 50.00%
Total 22 100.00% 2 100.00%



static inline pte_t pte_mkwrite(pte_t pte)
{
	return __pte(pte_val(pte) | SRMMU_WRITE);
}

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David S. Miller 17 80.95% 1 50.00%
Sam Ravnborg 4 19.05% 1 50.00%
Total 21 100.00% 2 100.00%



static inline pte_t pte_mkdirty(pte_t pte)
{
	return __pte(pte_val(pte) | SRMMU_DIRTY);
}

Contributors
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David S. Miller 17 80.95% 1 50.00%
Sam Ravnborg 4 19.05% 1 50.00%
Total 21 100.00% 2 100.00%



static inline pte_t pte_mkyoung(pte_t pte)
{
	return __pte(pte_val(pte) | SRMMU_REF);
}

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Sam Ravnborg 4 19.05% 1 50.00%
Total 21 100.00% 2 100.00%


#define pte_mkspecial(pte)    (pte)


#define pfn_pte(pfn, prot)		mk_pte(pfn_to_page(pfn), prot)



static inline unsigned long pte_pfn(pte_t pte)
{
	if (srmmu_device_memory(pte_val(pte))) {
		/* Just return something that will cause
                 * pfn_valid() to return false.  This makes
                 * copy_one_pte() to just directly copy to
                 * PTE over.
                 */
		return ~0UL;
	}
	return (pte_val(pte) & SRMMU_PTE_PMASK) >> (PAGE_SHIFT-4);
}

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David S. Miller 40 90.91% 1 50.00%
Sam Ravnborg 4 9.09% 1 50.00%
Total 44 100.00% 2 100.00%


#define pte_page(pte)	pfn_to_page(pte_pfn(pte))

/*
 * Conversion functions: convert a page and protection to a page entry,
 * and a page entry and page directory to the page they refer to.
 */


static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)
{
	return __pte((page_to_pfn(page) << (PAGE_SHIFT-4)) | pgprot_val(pgprot));
}

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David S. Miller 31 83.78% 1 50.00%
Sam Ravnborg 6 16.22% 1 50.00%
Total 37 100.00% 2 100.00%



static inline pte_t mk_pte_phys(unsigned long page, pgprot_t pgprot)
{
	return __pte(((page) >> 4) | pgprot_val(pgprot));
}

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David S. Miller 25 80.65% 1 50.00%
Sam Ravnborg 6 19.35% 1 50.00%
Total 31 100.00% 2 100.00%



static inline pte_t mk_pte_io(unsigned long page, pgprot_t pgprot, int space)
{
	return __pte(((page) >> 4) | (space << 28) | pgprot_val(pgprot));
}

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Sam Ravnborg 8 20.00% 1 50.00%
Total 40 100.00% 2 100.00%


#define pgprot_noncached pgprot_noncached


static inline pgprot_t pgprot_noncached(pgprot_t prot)
{
	pgprot_val(prot) &= ~pgprot_val(__pgprot(SRMMU_CACHE));
	return prot;
}

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static pte_t pte_modify(pte_t pte, pgprot_t newprot) __attribute_const__;


static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{
	return __pte((pte_val(pte) & SRMMU_CHG_MASK) |
		pgprot_val(newprot));
}

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#define pgd_index(address) ((address) >> PGDIR_SHIFT)

/* to find an entry in a page-table-directory */

#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))

/* to find an entry in a kernel page-table-directory */

#define pgd_offset_k(address) pgd_offset(&init_mm, address)

/* Find an entry in the second-level page table.. */


static inline pmd_t *pmd_offset(pgd_t * dir, unsigned long address)
{
	return (pmd_t *) pgd_page_vaddr(*dir) +
		((address >> PMD_SHIFT) & (PTRS_PER_PMD - 1));
}

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/* Find an entry in the third-level page table.. */
pte_t *pte_offset_kernel(pmd_t * dir, unsigned long address);

/*
 * This shortcut works on sun4m (and sun4d) because the nocache area is static.
 */

#define pte_offset_map(d, a)		pte_offset_kernel(d,a)

#define pte_unmap(pte)		do{}while(0)

struct seq_file;
void mmu_info(struct seq_file *m);

/* Fault handler stuff... */

#define FAULT_CODE_PROT     0x1

#define FAULT_CODE_WRITE    0x2

#define FAULT_CODE_USER     0x4


#define update_mmu_cache(vma, address, ptep) do { } while (0)

void srmmu_mapiorange(unsigned int bus, unsigned long xpa,
                      unsigned long xva, unsigned int len);
void srmmu_unmapiorange(unsigned long virt_addr, unsigned int len);

/* Encode and de-code a swap entry */


static inline unsigned long __swp_type(swp_entry_t entry)
{
	return (entry.val >> SRMMU_SWP_TYPE_SHIFT) & SRMMU_SWP_TYPE_MASK;
}

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static inline unsigned long __swp_offset(swp_entry_t entry)
{
	return (entry.val >> SRMMU_SWP_OFF_SHIFT) & SRMMU_SWP_OFF_MASK;
}

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static inline swp_entry_t __swp_entry(unsigned long type, unsigned long offset)
{
	return (swp_entry_t) {
		(type & SRMMU_SWP_TYPE_MASK) << SRMMU_SWP_TYPE_SHIFT
		| (offset & SRMMU_SWP_OFF_MASK) << SRMMU_SWP_OFF_SHIFT };
}

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#define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val(pte) })

#define __swp_entry_to_pte(x)		((pte_t) { (x).val })


static inline unsigned long

__get_phys (unsigned long addr)
{
	switch (sparc_cpu_model){
	case sun4m:
	case sun4d:
		return ((srmmu_get_pte (addr) & 0xffffff00) << 4);
	default:
		return 0;
	}
}

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static inline int

__get_iospace (unsigned long addr)
{
	switch (sparc_cpu_model){
	case sun4m:
	case sun4d:
		return (srmmu_get_pte (addr) >> 28);
	default:
		return -1;
	}
}

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Total 38 100.00% 1 100.00%

extern unsigned long *sparc_valid_addr_bitmap;

/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */

#define kern_addr_valid(addr) \
	(test_bit(__pa((unsigned long)(addr))>>20, sparc_valid_addr_bitmap))

/*
 * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in
 * its high 4 bits.  These macros/functions put it there or get it from there.
 */

#define MK_IOSPACE_PFN(space, pfn)	(pfn | (space << (BITS_PER_LONG - 4)))

#define GET_IOSPACE(pfn)		(pfn >> (BITS_PER_LONG - 4))

#define GET_PFN(pfn)			(pfn & 0x0fffffffUL)

int remap_pfn_range(struct vm_area_struct *, unsigned long, unsigned long,
		    unsigned long, pgprot_t);



static inline int io_remap_pfn_range(struct vm_area_struct *vma,
				     unsigned long from, unsigned long pfn,
				     unsigned long size, pgprot_t prot)
{
	unsigned long long offset, space, phys_base;

	offset = ((unsigned long long) GET_PFN(pfn)) << PAGE_SHIFT;
	space = GET_IOSPACE(pfn);
	phys_base = offset | (space << 32ULL);

	return remap_pfn_range(vma, from, phys_base >> PAGE_SHIFT, size, prot);
}
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#define io_remap_pfn_range io_remap_pfn_range 


#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS

#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
({                                                                        \
        int __changed = !pte_same(*(__ptep), __entry);                    \
        if (__changed) {                                                  \
                set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \
                flush_tlb_page(__vma, __address);                         \
        }                                                                 \
        __changed;                                                        \
})

#include <asm-generic/pgtable.h>

#endif /* !(__ASSEMBLY__) */


#define VMALLOC_START           _AC(0xfe600000,UL)

#define VMALLOC_END             _AC(0xffc00000,UL)

/* We provide our own get_unmapped_area to cope with VA holes for userland */

#define HAVE_ARCH_UNMAPPED_AREA

/*
 * No page table caches to initialise
 */

#define pgtable_cache_init()	do { } while (0)

#endif /* !(_SPARC_PGTABLE_H) */
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Sam Ravnborg 1034 59.91% 10 33.33%
David S. Miller 678 39.28% 12 40.00%
Orlando Arias 4 0.23% 1 3.33%
Al Viro 4 0.23% 1 3.33%
Kirill A. Shutemov 2 0.12% 2 6.67%
Russell King 1 0.06% 1 3.33%
David Howells 1 0.06% 1 3.33%
Michal Hocko 1 0.06% 1 3.33%
Greg Kroah-Hartman 1 0.06% 1 3.33%
Total 1726 100.00% 30 100.00%
Directory: arch/sparc/include/asm

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Created with cregit.
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Kirill A. Shutemov	1	4.35%	1	50.00%
Total	23	100.00%	2	100.00%
cregit-Linux how code gets into the kernel

Release 4.14 arch/sparc/include/asm/pgtable_32.h

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