/* SPDX-License-Identifier: GPL-2.0 */ #ifndef _ASM_X86_I8259_H #define _ASM_X86_I8259_H #include <linux/delay.h> extern unsigned int cached_irq_mask; #define __byte(x, y) (((unsigned char *)&(y))[x]) #define cached_master_mask (__byte(0, cached_irq_mask)) #define cached_slave_mask (__byte(1, cached_irq_mask)) /* i8259A PIC registers */ #define PIC_MASTER_CMD 0x20 #define PIC_MASTER_IMR 0x21 #define PIC_MASTER_ISR PIC_MASTER_CMD #define PIC_MASTER_POLL PIC_MASTER_ISR #define PIC_MASTER_OCW3 PIC_MASTER_ISR #define PIC_SLAVE_CMD 0xa0 #define PIC_SLAVE_IMR 0xa1 /* i8259A PIC related value */ #define PIC_CASCADE_IR 2 #define MASTER_ICW4_DEFAULT 0x01 #define SLAVE_ICW4_DEFAULT 0x01 #define PIC_ICW4_AEOI 2 extern raw_spinlock_t i8259A_lock; /* the PIC may need a careful delay on some platforms, hence specific calls */
static inline unsigned char inb_pic(unsigned int port) { unsigned char value = inb(port); /* * delay for some accesses to PIC on motherboard or in chipset * must be at least one microsecond, so be safe here: */ udelay(2); return value; }Contributors
Person | Tokens | Prop | Commits | CommitProp |
David P. Reed | 29 | 96.67% | 1 | 50.00% |
Alan Cox | 1 | 3.33% | 1 | 50.00% |
Total | 30 | 100.00% | 2 | 100.00% |
Person | Tokens | Prop | Commits | CommitProp |
David P. Reed | 27 | 96.43% | 1 | 50.00% |
Alan Cox | 1 | 3.57% | 1 | 50.00% |
Total | 28 | 100.00% | 2 | 100.00% |
Person | Tokens | Prop | Commits | CommitProp |
Jiang Liu | 14 | 100.00% | 1 | 100.00% |
Total | 14 | 100.00% | 1 | 100.00% |
Person | Tokens | Prop | Commits | CommitProp |
Jacob jun Pan | 74 | 27.61% | 1 | 7.69% |
Thomas Gleixner | 69 | 25.75% | 3 | 23.08% |
David P. Reed | 60 | 22.39% | 1 | 7.69% |
Andrew Morton | 29 | 10.82% | 1 | 7.69% |
Jiang Liu | 14 | 5.22% | 1 | 7.69% |
Vitaly Kuznetsov | 9 | 3.36% | 1 | 7.69% |
Pavel Machek | 5 | 1.87% | 1 | 7.69% |
Alan Cox | 4 | 1.49% | 2 | 15.38% |
H. Peter Anvin | 3 | 1.12% | 1 | 7.69% |
Greg Kroah-Hartman | 1 | 0.37% | 1 | 7.69% |
Total | 268 | 100.00% | 13 | 100.00% |