Release 4.14 arch/x86/kernel/acpi/cppc_msr.c
/*
* cppc_msr.c: MSR Interface for CPPC
* Copyright (c) 2016, Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*/
#include <acpi/cppc_acpi.h>
#include <asm/msr.h>
/* Refer to drivers/acpi/cppc_acpi.c for the description of functions */
bool cpc_ffh_supported(void)
{
return true;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Srinivas Pandruvada | 10 | 100.00% | 1 | 100.00% |
| Total | 10 | 100.00% | 1 | 100.00% |
int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val)
{
int err;
err = rdmsrl_safe_on_cpu(cpunum, reg->address, val);
if (!err) {
u64 mask = GENMASK_ULL(reg->bit_offset + reg->bit_width - 1,
reg->bit_offset);
*val &= mask;
*val >>= reg->bit_offset;
}
return err;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Srinivas Pandruvada | 75 | 100.00% | 1 | 100.00% |
| Total | 75 | 100.00% | 1 | 100.00% |
int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val)
{
u64 rd_val;
int err;
err = rdmsrl_safe_on_cpu(cpunum, reg->address, &rd_val);
if (!err) {
u64 mask = GENMASK_ULL(reg->bit_offset + reg->bit_width - 1,
reg->bit_offset);
val <<= reg->bit_offset;
val &= mask;
rd_val &= ~mask;
rd_val |= val;
err = wrmsrl_safe_on_cpu(cpunum, reg->address, rd_val);
}
return err;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Srinivas Pandruvada | 98 | 100.00% | 1 | 100.00% |
| Total | 98 | 100.00% | 1 | 100.00% |
Overall Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Srinivas Pandruvada | 191 | 100.00% | 1 | 100.00% |
| Total | 191 | 100.00% | 1 | 100.00% |
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