cregit-Linux how code gets into the kernel

Release 4.14 arch/x86/kernel/smpboot.c

Directory: arch/x86/kernel
/*
 *      x86 SMP booting functions
 *
 *      (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
 *      (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
 *      Copyright 2001 Andi Kleen, SuSE Labs.
 *
 *      Much of the core SMP work is based on previous work by Thomas Radke, to
 *      whom a great many thanks are extended.
 *
 *      Thanks to Intel for making available several different Pentium,
 *      Pentium Pro and Pentium-II/Xeon MP machines.
 *      Original development of Linux SMP code supported by Caldera.
 *
 *      This code is released under the GNU General Public License version 2 or
 *      later.
 *
 *      Fixes
 *              Felix Koop      :       NR_CPUS used properly
 *              Jose Renau      :       Handle single CPU case.
 *              Alan Cox        :       By repeated request 8) - Total BogoMIPS report.
 *              Greg Wright     :       Fix for kernel stacks panic.
 *              Erich Boleyn    :       MP v1.4 and additional changes.
 *      Matthias Sattler        :       Changes for 2.1 kernel map.
 *      Michel Lespinasse       :       Changes for 2.1 kernel map.
 *      Michael Chastain        :       Change trampoline.S to gnu as.
 *              Alan Cox        :       Dumb bug: 'B' step PPro's are fine
 *              Ingo Molnar     :       Added APIC timers, based on code
 *                                      from Jose Renau
 *              Ingo Molnar     :       various cleanups and rewrites
 *              Tigran Aivazian :       fixed "0.00 in /proc/uptime on SMP" bug.
 *      Maciej W. Rozycki       :       Bits for genuine 82489DX APICs
 *      Andi Kleen              :       Changed for SMP boot into long mode.
 *              Martin J. Bligh :       Added support for multi-quad systems
 *              Dave Jones      :       Report invalid combinations of Athlon CPUs.
 *              Rusty Russell   :       Hacked into shape for new "hotplug" boot process.
 *      Andi Kleen              :       Converted to new state machine.
 *      Ashok Raj               :       CPU hotplug support
 *      Glauber Costa           :       i386 and x86_64 integration
 */


#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/init.h>
#include <linux/smp.h>
#include <linux/export.h>
#include <linux/sched.h>
#include <linux/sched/topology.h>
#include <linux/sched/hotplug.h>
#include <linux/sched/task_stack.h>
#include <linux/percpu.h>
#include <linux/bootmem.h>
#include <linux/err.h>
#include <linux/nmi.h>
#include <linux/tboot.h>
#include <linux/stackprotector.h>
#include <linux/gfp.h>
#include <linux/cpuidle.h>

#include <asm/acpi.h>
#include <asm/desc.h>
#include <asm/nmi.h>
#include <asm/irq.h>
#include <asm/realmode.h>
#include <asm/cpu.h>
#include <asm/numa.h>
#include <asm/pgtable.h>
#include <asm/tlbflush.h>
#include <asm/mtrr.h>
#include <asm/mwait.h>
#include <asm/apic.h>
#include <asm/io_apic.h>
#include <asm/fpu/internal.h>
#include <asm/setup.h>
#include <asm/uv/uv.h>
#include <linux/mc146818rtc.h>
#include <asm/i8259.h>
#include <asm/realmode.h>
#include <asm/misc.h>

/* Number of siblings per CPU package */

int smp_num_siblings = 1;

EXPORT_SYMBOL(smp_num_siblings);

/* Last level cache ID of each logical CPU */
DEFINE_PER_CPU_READ_MOSTLY(u16, cpu_llc_id) = BAD_APICID;

/* representing HT siblings of each logical CPU */
DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_sibling_map);

EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);

/* representing HT and core siblings of each logical CPU */
DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_core_map);

EXPORT_PER_CPU_SYMBOL(cpu_core_map);

DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_llc_shared_map);

/* Per CPU bogomips and other parameters */
DEFINE_PER_CPU_READ_MOSTLY(struct cpuinfo_x86, cpu_info);

EXPORT_PER_CPU_SYMBOL(cpu_info);

/* Logical package management. We might want to allocate that dynamically */

static int *physical_to_logical_pkg __read_mostly;

static unsigned long *physical_package_map __read_mostly;
;

static unsigned int max_physical_pkg_id __read_mostly;

unsigned int __max_logical_packages __read_mostly;

EXPORT_SYMBOL(__max_logical_packages);

static unsigned int logical_packages __read_mostly;

/* Maximum number of SMT threads on any online core */

int __max_smt_threads __read_mostly;

/* Flag to indicate if a complete sched domain rebuild is required */

bool x86_topology_update;


int arch_update_cpu_topology(void) { int retval = x86_topology_update; x86_topology_update = false; return retval; }

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static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip) { unsigned long flags; spin_lock_irqsave(&rtc_lock, flags); CMOS_WRITE(0xa, 0xf); spin_unlock_irqrestore(&rtc_lock, flags); local_flush_tlb(); pr_debug("1.\n"); *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)) = start_eip >> 4; pr_debug("2.\n"); *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = start_eip & 0xf; pr_debug("3.\n"); }

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static inline void smpboot_restore_warm_reset_vector(void) { unsigned long flags; /* * Install writable page 0 entry to set BIOS data area. */ local_flush_tlb(); /* * Paranoid: Set warm reset code and vector here back * to default values. */ spin_lock_irqsave(&rtc_lock, flags); CMOS_WRITE(0, 0xf); spin_unlock_irqrestore(&rtc_lock, flags); *((volatile u32 *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = 0; }

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Thomas Gleixner56100.00%1100.00%
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/* * Report back to the Boot Processor during boot time or to the caller processor * during CPU online. */
static void smp_callin(void) { int cpuid, phys_id; /* * If waken up by an INIT in an 82489DX configuration * cpu_callout_mask guarantees we don't get here before * an INIT_deassert IPI reaches our local APIC, so it is * now safe to touch our local APIC. */ cpuid = smp_processor_id(); /* * (This works even if the APIC is not enabled.) */ phys_id = read_apic_id(); /* * the boot CPU has finished the init stage and is spinning * on callin_map until we finish. We are free to set up this * CPU, first the APIC. (this is probably redundant on most * boards) */ apic_ap_setup(); /* * Save our processor parameters. Note: this information * is needed for clock calibration. */ smp_store_cpu_info(cpuid); /* * The topology information must be up to date before * calibrate_delay() and notify_cpu_starting(). */ set_cpu_sibling_map(raw_smp_processor_id()); /* * Get our bogomips. * Update loops_per_jiffy in cpu_data. Previous call to * smp_store_cpu_info() stored a value that is close but not as * accurate as the value just calculated. */ calibrate_delay(); cpu_data(cpuid).loops_per_jiffy = loops_per_jiffy; pr_debug("Stack at about %p\n", &cpuid); wmb(); notify_cpu_starting(cpuid); /* * Allow the master to continue. */ cpumask_set_cpu(cpuid, cpu_callin_mask); }

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Glauber de Oliveira Costa3544.30%17.69%
Jack Steiner1721.52%215.38%
Pavel Tatashin78.86%17.69%
Peter Zijlstra67.59%215.38%
Fenghua Yu56.33%17.69%
Andi Kleen33.80%17.69%
Mike Travis22.53%17.69%
Thomas Gleixner22.53%215.38%
Ingo Molnar11.27%17.69%
Len Brown11.27%17.69%
Total79100.00%13100.00%

static int cpu0_logical_apicid; static int enable_start_cpu0; /* * Activate a secondary processor. */
static void notrace start_secondary(void *unused) { /* * Don't put *anything* except direct CPU state initialization * before cpu_init(), SMP booting is too fragile that we want to * limit the things done here to the most necessary things. */ if (boot_cpu_has(X86_FEATURE_PCID)) __write_cr4(__read_cr4() | X86_CR4_PCIDE); #ifdef CONFIG_X86_32 /* switch away from the initial page table */ load_cr3(swapper_pg_dir); __flush_tlb_all(); #endif cpu_init(); x86_cpuinit.early_percpu_clock_init(); preempt_disable(); smp_callin(); enable_start_cpu0 = 0; /* otherwise gcc will move up smp_processor_id before the cpu_init */ barrier(); /* * Check TSC synchronization with the BP: */ check_tsc_sync_target(); /* * Lock vector_lock and initialize the vectors on this cpu * before setting the cpu online. We must set it online with * vector_lock held to prevent a concurrent setup/teardown * from seeing a half valid vector space. */ lock_vector_lock(); setup_vector_irq(smp_processor_id()); set_cpu_online(smp_processor_id(), true); unlock_vector_lock(); cpu_set_state_online(smp_processor_id()); x86_platform.nmi_init(); /* enable local interrupts */ local_irq_enable(); /* to prevent fake stack check failure in clock setup */ boot_init_stack_canary(); x86_cpuinit.setup_percpu_clockev(); wmb(); cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); }

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Glauber de Oliveira Costa3428.33%15.56%
Andrew Lutomirski3025.00%211.11%
Thomas Gleixner1411.67%422.22%
Borislav Petkov97.50%15.56%
Eric W. Biedermann65.00%15.56%
Igor Mammedov54.17%15.56%
Russ Anderson54.17%15.56%
Fenghua Yu43.33%15.56%
Jacob jun Pan43.33%15.56%
Manfred Spraul43.33%15.56%
Mike Travis21.67%15.56%
Paul Gortmaker10.83%15.56%
Adrian Bunk10.83%15.56%
Paul E. McKenney10.83%15.56%
Total120100.00%18100.00%

/** * topology_update_package_map - Update the physical to logical package map * @pkg: The physical package id as retrieved via CPUID * @cpu: The cpu for which this is updated */
int topology_update_package_map(unsigned int pkg, unsigned int cpu) { unsigned int new; /* Called from early boot ? */ if (!physical_package_map) return 0; if (pkg >= max_physical_pkg_id) return -EINVAL; /* Set the logical package id */ if (test_and_set_bit(pkg, physical_package_map)) goto found; if (logical_packages >= __max_logical_packages) { pr_warn("Package %u of CPU %u exceeds BIOS package data %u.\n", logical_packages, cpu, __max_logical_packages); return -ENOSPC; } new = logical_packages++; if (new != pkg) { pr_info("CPU %u Converting physical %u to logical package %u\n", cpu, pkg, new); } physical_to_logical_pkg[pkg] = new; found: cpu_data(cpu).logical_proc_id = physical_to_logical_pkg[pkg]; return 0; }

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Thomas Gleixner11797.50%266.67%
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/** * topology_phys_to_logical_pkg - Map a physical package id to a logical * * Returns logical package id or -1 if not found */
int topology_phys_to_logical_pkg(unsigned int phys_pkg) { if (phys_pkg >= max_physical_pkg_id) return -1; return physical_to_logical_pkg[phys_pkg]; }

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EXPORT_SYMBOL(topology_phys_to_logical_pkg);
static void __init smp_init_package_map(struct cpuinfo_x86 *c, unsigned int cpu) { unsigned int ncpus; size_t size; /* * Today neither Intel nor AMD support heterogenous systems. That * might change in the future.... * * While ideally we'd want '* smp_num_siblings' in the below @ncpus * computation, this won't actually work since some Intel BIOSes * report inconsistent HT data when they disable HT. * * In particular, they reduce the APIC-IDs to only include the cores, * but leave the CPUID topology to say there are (2) siblings. * This means we don't know how many threads there will be until * after the APIC enumeration. * * By not including this we'll sometimes over-estimate the number of * logical packages by the amount of !present siblings, but this is * still better than MAX_LOCAL_APIC. * * We use total_cpus not nr_cpu_ids because nr_cpu_ids can be limited * on the command line leading to a similar issue as the HT disable * problem because the hyperthreads are usually enumerated after the * primary cores. */ ncpus = boot_cpu_data.x86_max_cores; if (!ncpus) { pr_warn("x86_max_cores == zero !?!?"); ncpus = 1; } __max_logical_packages = DIV_ROUND_UP(total_cpus, ncpus); logical_packages = 0; /* * Possibly larger than what we need as the number of apic ids per * package can be smaller than the actual used apic ids. */ max_physical_pkg_id = DIV_ROUND_UP(MAX_LOCAL_APIC, ncpus); size = max_physical_pkg_id * sizeof(unsigned int); physical_to_logical_pkg = kmalloc(size, GFP_KERNEL); memset(physical_to_logical_pkg, 0xff, size); size = BITS_TO_LONGS(max_physical_pkg_id) * sizeof(unsigned long); physical_package_map = kzalloc(size, GFP_KERNEL); pr_info("Max logical packages: %u\n", __max_logical_packages); topology_update_package_map(c->phys_proc_id, cpu); }

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Thomas Gleixner12290.37%480.00%
Jiri Olsa139.63%120.00%
Total135100.00%5100.00%


void __init smp_store_boot_cpu_info(void) { int id = 0; /* CPU 0 */ struct cpuinfo_x86 *c = &cpu_data(id); *c = boot_cpu_data; c->cpu_index = id; smp_init_package_map(c, id); }

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Fenghua Yu3683.72%133.33%
Thomas Gleixner716.28%266.67%
Total43100.00%3100.00%

/* * The bootstrap kernel entry code has set these up. Save them for * a given CPU */
void smp_store_cpu_info(int id) { struct cpuinfo_x86 *c = &cpu_data(id); *c = boot_cpu_data; c->cpu_index = id; /* * During boot time, CPU0 has this setup already. Save the info when * bringing up AP or offlined CPU0. */ identify_secondary_cpu(c); }

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Glauber de Oliveira Costa3391.67%133.33%
Yinghai Lu25.56%133.33%
Fenghua Yu12.78%133.33%
Total36100.00%3100.00%


static bool topology_same_node(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o) { int cpu1 = c->cpu_index, cpu2 = o->cpu_index; return (cpu_to_node(cpu1) == cpu_to_node(cpu2)); }

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Dave Hansen4095.24%133.33%
Peter Zijlstra12.38%133.33%
Andreas Herrmann12.38%133.33%
Total42100.00%3100.00%


static bool topology_sane(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o, const char *name) { int cpu1 = c->cpu_index, cpu2 = o->cpu_index; return !WARN_ONCE(!topology_same_node(c, o), "sched: CPU #%d's %s-sibling CPU #%d is not on the same node! " "[node: %d != %d]. Ignoring dependency.\n", cpu1, name, cpu2, cpu_to_node(cpu1), cpu_to_node(cpu2)); }

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Peter Zijlstra3959.09%125.00%
Andreas Herrmann1928.79%125.00%
Dave Hansen710.61%125.00%
Yinghai Lu11.52%125.00%
Total66100.00%4100.00%

#define link_mask(mfunc, c1, c2) \ do { \ cpumask_set_cpu((c1), mfunc(c2)); \ cpumask_set_cpu((c2), mfunc(c1)); \ } while (0)
static bool match_smt(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o) { if (boot_cpu_has(X86_FEATURE_TOPOEXT)) { int cpu1 = c->cpu_index, cpu2 = o->cpu_index; if (c->phys_proc_id == o->phys_proc_id && per_cpu(cpu_llc_id, cpu1) == per_cpu(cpu_llc_id, cpu2)) { if (c->cpu_core_id == o->cpu_core_id) return topology_sane(c, o, "smt"); if ((c->cu_id != 0xff) && (o->cu_id != 0xff) && (c->cu_id == o->cu_id)) return topology_sane(c, o, "smt"); } } else if (c->phys_proc_id == o->phys_proc_id && c->cpu_core_id == o->cpu_core_id) { return topology_sane(c, o, "smt"); } return false; }

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Borislav Petkov4931.41%333.33%
Peter Zijlstra3723.72%111.11%
Andreas Herrmann3421.79%222.22%
Glauber de Oliveira Costa2717.31%111.11%
Mike Travis85.13%111.11%
Ingo Molnar10.64%111.11%
Total156100.00%9100.00%


static bool match_llc(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o) { int cpu1 = c->cpu_index, cpu2 = o->cpu_index; if (per_cpu(cpu_llc_id, cpu1) != BAD_APICID && per_cpu(cpu_llc_id, cpu1) == per_cpu(cpu_llc_id, cpu2)) return topology_sane(c, o, "llc"); return false; }

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Peter Zijlstra6698.51%150.00%
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Total67100.00%2100.00%

/* * Unlike the other levels, we do not enforce keeping a * multicore group inside a NUMA node. If this happens, we will * discard the MC level of the topology later. */
static bool match_die(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o) { if (c->phys_proc_id == o->phys_proc_id) return true; return false; }

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#if defined(CONFIG_SCHED_SMT) || defined(CONFIG_SCHED_MC)
static inline int x86_sched_itmt_flags(void) { return sysctl_sched_itmt_enabled ? SD_ASYM_PACKING : 0; }

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#ifdef CONFIG_SCHED_MC
static int x86_core_flags(void) { return cpu_core_flags() | x86_sched_itmt_flags(); }

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#endif #ifdef CONFIG_SCHED_SMT
static int x86_smt_flags(void) { return cpu_smt_flags() | x86_sched_itmt_flags(); }

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#endif #endif static struct sched_domain_topology_level x86_numa_in_package_topology[] = { #ifdef CONFIG_SCHED_SMT { cpu_smt_mask, x86_smt_flags, SD_INIT_NAME(SMT) }, #endif #ifdef CONFIG_SCHED_MC { cpu_coregroup_mask, x86_core_flags, SD_INIT_NAME(MC) }, #endif { NULL, }, }; static struct sched_domain_topology_level x86_topology[] = { #ifdef CONFIG_SCHED_SMT { cpu_smt_mask, x86_smt_flags, SD_INIT_NAME(SMT) }, #endif #ifdef CONFIG_SCHED_MC { cpu_coregroup_mask, x86_core_flags, SD_INIT_NAME(MC) }, #endif { cpu_cpu_mask, SD_INIT_NAME(DIE) }, { NULL, }, }; /* * Set if a package/die has multiple NUMA nodes inside. * AMD Magny-Cours and Intel Cluster-on-Die have this. */ static bool x86_has_numa_in_package;
void set_cpu_sibling_map(int cpu) { bool has_smt = smp_num_siblings > 1; bool has_mp = has_smt || boot_cpu_data.x86_max_cores > 1; struct cpuinfo_x86 *c = &cpu_data(cpu); struct cpuinfo_x86 *o; int i, threads; cpumask_set_cpu(cpu, cpu_sibling_setup_mask); if (!has_mp) { cpumask_set_cpu(cpu, topology_sibling_cpumask(cpu)); cpumask_set_cpu(cpu, cpu_llc_shared_mask(cpu)); cpumask_set_cpu(cpu, topology_core_cpumask(cpu)); c->booted_cores = 1; return; } for_each_cpu(i, cpu_sibling_setup_mask) { o = &cpu_data(i); if ((i == cpu) || (has_smt && match_smt(c, o))) link_mask(topology_sibling_cpumask, cpu, i); if ((i == cpu) || (has_mp && match_llc(c, o))) link_mask(cpu_llc_shared_mask, cpu, i); } /* * This needs a separate iteration over the cpus because we rely on all * topology_sibling_cpumask links to be set-up. */ for_each_cpu(i, cpu_sibling_setup_mask) { o = &cpu_data(i); if ((i == cpu) || (has_mp && match_die(c, o))) { link_mask(topology_core_cpumask, cpu, i); /* * Does this new cpu bringup a new core? */ if (cpumask_weight( topology_sibling_cpumask(cpu)) == 1) { /* * for each core in package, increment * the booted_cores for this new cpu */ if (cpumask_first( topology_sibling_cpumask(i)) == i) c->booted_cores++; /* * increment the core count for all * the other cpus in this package */ if (i != cpu) cpu_data(i).booted_cores++; } else if (i != cpu && !c->booted_cores) c->booted_cores = cpu_data(i).booted_cores; } if (match_die(c, o) && !topology_same_node(c, o)) x86_has_numa_in_package = true; } threads = cpumask_weight(topology_sibling_cpumask(cpu)); if (threads > __max_smt_threads) __max_smt_threads = threads; }

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Glauber de Oliveira Costa14243.16%17.69%
Peter Zijlstra9328.27%215.38%
Andi Kleen226.69%17.69%
Dave Hansen195.78%215.38%
Kamalesh Babulal164.86%17.69%
Andrew Jones113.34%17.69%
Bartosz Golaszewski82.43%17.69%
Mike Travis82.43%17.69%
Yinghai Lu41.22%17.69%
Ingo Molnar30.91%17.69%
Tim Chen30.91%17.69%
Total329100.00%13100.00%

/* maps the cpu to the sched domain representing multi-core */
const struct cpumask *cpu_coregroup_mask(int cpu) { return cpu_llc_shared_mask(cpu); }

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Glauber de Oliveira Costa847.06%133.33%
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Yinghai Lu423.53%133.33%
Total17100.00%3100.00%


static void impress_friends(void) { int cpu; unsigned long bogosum = 0; /* * Allow the user to impress friends. */ pr_debug("Before bogomips\n"); for_each_possible_cpu(cpu) if (cpumask_test_cpu(cpu, cpu_callout_mask)) bogosum += cpu_data(cpu).loops_per_jiffy; pr_info("Total of %d processors activated (%lu.%02lu BogoMIPS)\n", num_online_cpus(), bogosum/(500000/HZ), (bogosum/(5000/HZ))%100); pr_debug("Before bogocount - setting activated=1\n"); }

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Glauber de Oliveira Costa6988.46%233.33%
Joe Perches45.13%116.67%
Mike Travis22.56%116.67%
Thomas Gleixner22.56%116.67%
Ingo Molnar11.28%116.67%
Total78100.00%6100.00%


void __inquire_remote_apic(int apicid) { unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 }; const char * const names[] = { "ID", "VERSION", "SPIV" }; int timeout; u32 status; pr_info("Inquiring remote APIC 0x%x...\n", apicid); for (i = 0; i < ARRAY_SIZE(regs); i++) { pr_info("... APIC 0x%x %s: ", apicid, names[i]); /* * Wait for idle. */ status = safe_apic_wait_icr_idle(); if (status) pr_cont("a previous APIC delivery may have failed\n"); apic_icr_write(APIC_DM_REMRD | regs[i], apicid); timeout = 0; do { udelay(100); status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK; } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000); switch (status) { case APIC_ICR_RR_VALID: status = apic_read(APIC_RRR); pr_cont("%08x\n", status); break; default: pr_cont("failed\n"); } } }

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Glauber de Oliveira Costa16493.18%120.00%
Joe Perches52.84%120.00%
Suresh B. Siddha31.70%120.00%
Yinghai Lu21.14%120.00%
Greg Dietsche21.14%120.00%
Total176100.00%5100.00%

/* * The Multiprocessor Specification 1.4 (1997) example code suggests * that there should be a 10ms delay between the BSP asserting INIT * and de-asserting INIT, when starting a remote processor. * But that slows boot and resume on modern processors, which include * many cores and don't require that delay. * * Cmdline "init_cpu_udelay=" is available to over-ride this delay. * Modern processor families are quirked to remove the delay entirely. */ #define UDELAY_10MS_DEFAULT 10000 static unsigned int init_udelay = UINT_MAX;
static int __init cpu_init_udelay(char *str) { get_option(&str, &init_udelay); return 0; }

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Total23100.00%1100.00%

early_param("cpu_init_udelay", cpu_init_udelay);
static void __init smp_quirk_init_udelay(void) { /* if cmdline changed it from default, leave it alone */ if (init_udelay != UINT_MAX) return; /* if modern processor, use no delay */ if (((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && (boot_cpu_data.x86 == 6)) || ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) && (boot_cpu_data.x86 >= 0xF))) { init_udelay = 0; return; } /* else, use legacy delay */ init_udelay = UDELAY_10MS_DEFAULT; }

Contributors

PersonTokensPropCommitsCommitProp
Len Brown68100.00%3100.00%
Total68100.00%3100.00%

/* * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this * won't ... remember to clear down the APIC, etc later. */
int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip) { unsigned long send_status, accept_status = 0; int maxlvt; /* Target chip */ /* Boot on the stack */ /* Kick the second */ apic_icr_write(APIC_DM_NMI | apic->dest_logical, apicid); pr_debug("Waiting for send to finish...\n"); send_status = safe_apic_wait_icr_idle(); /* * Give the other CPU some time to accept the IPI. */ udelay(200); if (APIC_INTEGRATED(boot_cpu_apic_version)) { maxlvt = lapic_get_maxlvt(); if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ apic_write(APIC_ESR, 0); accept_status = (apic_read(APIC_ESR) & 0xEF); } pr_debug("NMI sent\n"); if (send_status) pr_err("APIC never delivered???\n"); if (accept_status) pr_err("APIC delivery error (%lx)\n", accept_status); return (send_status | accept_status); }

Contributors

PersonTokensPropCommitsCommitProp
Glauber de Oliveira Costa10080.65%19.09%
Cyrill V. Gorcunov86.45%19.09%
Joe Perches43.23%19.09%
Ingo Molnar32.42%218.18%
Suresh B. Siddha21.61%19.09%
Fenghua Yu21.61%19.09%
Thomas Gleixner21.61%19.09%
Maciej W. Rozycki10.81%19.09%
Yinghai Lu10.81%19.09%
Denys Vlasenko10.81%19.09%
Total124100.00%11100.00%


static int wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip) { unsigned long send_status = 0, accept_status = 0; int maxlvt, num_starts, j; maxlvt = lapic_get_maxlvt(); /* * Be paranoid about clearing APIC errors. */ if (APIC_INTEGRATED(boot_cpu_apic_version)) { if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ apic_write(APIC_ESR, 0); apic_read(APIC_ESR); } pr_debug("Asserting INIT\n"); /* * Turn INIT on target chip */ /* * Send IPI */ apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT, phys_apicid); pr_debug("Waiting for send to finish...\n"); send_status = safe_apic_wait_icr_idle(); udelay(init_udelay); pr_debug("Deasserting INIT\n"); /* Target chip */ /* Send IPI */ apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid); pr_debug("Waiting for send to finish...\n"); send_status = safe_apic_wait_icr_idle(); mb(); /* * Should we send STARTUP IPIs ? * * Determine this based on the APIC version. * If we don't have an integrated APIC, don't send the STARTUP IPIs. */ if (APIC_INTEGRATED(boot_cpu_apic_version)) num_starts = 2; else num_starts = 0; /* * Run STARTUP IPI loop. */ pr_debug("#startup loops: %d\n", num_starts); for (j = 1; j <= num_starts; j++) { pr_debug("Sending STARTUP #%d\n", j); if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ apic_write(APIC_ESR, 0); apic_read(APIC_ESR); pr_debug("After apic_write\n"); /* * STARTUP IPI */ /* Target chip */ /* Boot on the stack */ /* Kick the second */ apic_icr_write(APIC_DM_STARTUP | (start_eip >> 12), phys_apicid); /* * Give the other CPU some time to accept the IPI. */ if (init_udelay == 0) udelay(10); else udelay(300); pr_debug("Startup point 1\n"); pr_debug("Waiting for send to finish...\n"); send_status = safe_apic_wait_icr_idle(); /* * Give the other CPU some time to accept the IPI. */ if (init_udelay == 0) udelay(10); else udelay(200); if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ apic_write(APIC_ESR, 0); accept_status = (apic_read(APIC_ESR) & 0xEF); if (send_status || accept_status) break; } pr_debug("After Startup\n"); if (send_status) pr_err("APIC never delivered???\n"); if (accept_status) pr_err("APIC delivery error (%lx)\n", accept_status); return (send_status | accept_status); }

Contributors

PersonTokensPropCommitsCommitProp
Glauber de Oliveira Costa24875.38%214.29%
Len Brown257.60%321.43%
Maciej W. Rozycki206.08%17.14%
Joe Perches103.04%17.14%
Thomas Gleixner103.04%17.14%
Suresh B. Siddha92.74%17.14%
Jan H. Schönherr20.61%17.14%
Denys Vlasenko20.61%17.14%
Yinghai Lu20.61%214.29%
Ingo Molnar10.30%17.14%
Total329100.00%14100.00%

/* reduce the number of lines printed when booting a large cpu count system */
static void announce_cpu(int cpu, int apicid) { static int current_node = -1; int node = early_cpu_to_node(cpu); static int width, node_width; if (!width) width = num_digits(num_possible_cpus()) + 1; /* + '#' sign */ if (!node_width) node_width = num_digits(num_possible_nodes()) + 1; /* + '#' */ if (cpu == 1) printk(KERN_INFO "x86: Booting SMP configuration:\n"); if (system_state < SYSTEM_RUNNING) { if (node != current_node) { if (current_node > (-1)) pr_cont("\n"); current_node = node; printk(KERN_INFO ".... node %*s#%d, CPUs: ", node_width - num_digits(node), " ", node); } /* Add padding for the BSP */ if (cpu == 1) pr_cont("%*s", width + 1, " "); pr_cont("%*s#%d", width - num_digits(cpu), " ", cpu); } else pr_info("Booting Node %d Processor %d APIC 0x%x\n", node, cpu, apicid); }

Contributors

PersonTokensPropCommitsCommitProp
Borislav Petkov8951.15%350.00%
Mike Travis8045.98%116.67%
Li Bin31.72%116.67%
Thomas Gleixner21.15%116.67%
Total174100.00%6100.00%


static int wakeup_cpu0_nmi(unsigned int cmd, struct pt_regs *regs) { int cpu; cpu = smp_processor_id(); if (cpu == 0 && !cpu_online(cpu) && enable_start_cpu0) return NMI_HANDLED; return NMI_DONE; }

Contributors

PersonTokensPropCommitsCommitProp
Fenghua Yu43100.00%1100.00%
Total43100.00%1100.00%

/* * Wake up AP by INIT, INIT, STARTUP sequence. * * Instead of waiting for STARTUP after INITs, BSP will execute the BIOS * boot-strap code which is not a desired behavior for waking up BSP. To * void the boot-strap code, wake up CPU0 by NMI instead. * * This works to wake up soft offlined CPU0 only. If CPU0 is hard offlined * (i.e. physically hot removed and then hot added), NMI won't wake it up. * We'll change this code in the future to wake up hard offlined CPU0 if * real platform and request are available. */
static int wakeup_cpu_via_init_nmi(int cpu, unsigned long start_ip, int apicid, int *cpu0_nmi_registered) { int id; int boot_error; preempt_disable(); /* * Wake up AP by INIT, INIT, STARTUP sequence. */ if (cpu) { boot_error = wakeup_secondary_cpu_via_init(apicid, start_ip); goto out; } /* * Wake up BSP by nmi. * * Register a NMI handler to help wake up CPU0. */ boot_error = register_nmi_handler(NMI_LOCAL, wakeup_cpu0_nmi, 0, "wake_cpu0"); if (!boot_error) { enable_start_cpu0 = 1; *cpu0_nmi_registered = 1; if (apic->dest_logical == APIC_DEST_LOGICAL) id = cpu0_logical_apicid; else id = apicid; boot_error = wakeup_secondary_cpu_via_nmi(id, start_ip); } out: preempt_enable(); return boot_error; }

Contributors

PersonTokensPropCommitsCommitProp
Fenghua Yu9685.71%150.00%
Jan Kiszka1614.29%150.00%
Total112100.00%2100.00%


void common_cpu_up(unsigned int cpu, struct task_struct *idle) { /* Just in case we booted with a single CPU. */ alternatives_enable_smp(); per_cpu(current_task, cpu) = idle; #ifdef CONFIG_X86_32 /* Stack for startup_32 can be just as for start_secondary onwards */ irq_ctx_init(cpu); per_cpu(cpu_current_top_of_stack, cpu) = (unsigned long)task_stack_page(idle) + THREAD_SIZE; #else initial_gs = per_cpu_offset(cpu); #endif }

Contributors

PersonTokensPropCommitsCommitProp
Boris Ostrovsky65100.00%1100.00%
Total65100.00%1100.00%

/* * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad * (ie clustered apic addressing mode), this is a LOGICAL apic ID. * Returns zero if CPU booted OK, else error code from * ->wakeup_secondary_cpu. */
static int do_boot_cpu(int apicid, int cpu, struct task_struct *idle, int *cpu0_nmi_registered) { volatile u32 *trampoline_status = (volatile u32 *) __va(real_mode_header->trampoline_status); /* start_ip had better be page-aligned! */ unsigned long start_ip = real_mode_header->trampoline_start; unsigned long boot_error = 0; unsigned long timeout; idle->thread.sp = (unsigned long)task_pt_regs(idle); early_gdt_descr.address = (unsigned long)get_cpu_gdt_rw(cpu); initial_code = (unsigned long)start_secondary; initial_stack = idle->thread.sp; /* * Enable the espfix hack for this CPU */ #ifdef CONFIG_X86_ESPFIX64 init_espfix_ap(cpu); #endif /* So we see what's up */ announce_cpu(cpu, apicid); /* * This grunge runs the startup process for * the targeted processor. */ if (get_uv_system_type() != UV_NON_UNIQUE_APIC) { pr_debug("Setting warm reset code and vector.\n"); smpboot_setup_warm_reset_vector(start_ip); /* * Be paranoid about clearing APIC errors. */ if (APIC_INTEGRATED(boot_cpu_apic_version)) { apic_write(APIC_ESR, 0); apic_read(APIC_ESR); } } /* * AP might wait on cpu_callout_mask in cpu_init() with * cpu_initialized_mask set if previous attempt to online * it timed-out. Clear cpu_initialized_mask so that after * INIT/SIPI it could start with a clean state. */ cpumask_clear_cpu(cpu, cpu_initialized_mask); smp_mb(); /* * Wake up a CPU in difference cases: * - Use the method in the APIC driver if it's defined * Otherwise, * - Use an INIT boot APIC message for APs or NMI for BSP. */ if (apic->wakeup_secondary_cpu) boot_error = apic->wakeup_secondary_cpu(apicid, start_ip); else boot_error = wakeup_cpu_via_init_nmi(cpu, start_ip, apicid, cpu0_nmi_registered); if (!boot_error) { /* * Wait 10s total for first sign of life from AP */ boot_error = -1; timeout = jiffies + 10*HZ; while (time_before(jiffies, timeout)) { if (cpumask_test_cpu(cpu, cpu_initialized_mask)) { /* * Tell AP to proceed with initialization */ cpumask_set_cpu(cpu, cpu_callout_mask); boot_error = 0; break; } schedule(); } } if (!boot_error) { /* * Wait till AP completes initial initialization */ while (!cpumask_test_cpu(cpu, cpu_callin_mask)) { /* * Allow other tasks to run while we wait for the * AP to come online. This also gives a chance * for the MTRR work(triggered by the AP coming online) * to be completed in the stop machine context. */ schedule(); } } /* mark "stuck" area as not stuck */ *trampoline_status = 0; if (get_uv_system_type() != UV_NON_UNIQUE_APIC) { /* * Cleanup possible dangling ends... */ smpboot_restore_warm_reset_vector(); } return boot_error; }

Contributors

PersonTokensPropCommitsCommitProp
Glauber de Oliveira Costa13944.84%413.33%
Igor Mammedov5417.42%26.67%
Jarkko Sakkinen258.06%310.00%
Ingo Molnar185.81%26.67%
Yinghai Lu134.19%26.67%
Zhu Guihua113.55%13.33%
Jack Steiner92.90%13.33%
Cyrill V. Gorcunov92.90%13.33%
Fenghua Yu72.26%13.33%
Thomas Gleixner61.94%26.67%
Vitaly Kuznetsov41.29%13.33%
Alok N Kataria30.97%13.33%
Mike Travis30.97%26.67%
Josh Poimboeuf30.97%26.67%
Linus Torvalds20.65%13.33%
H. Peter Anvin10.32%13.33%
Denys Vlasenko10.32%13.33%
Len Brown10.32%13.33%
Thomas Garnier10.32%13.33%
Total310100.00%30100.00%


int native_cpu_up(unsigned int cpu, struct task_struct *tidle) { int apicid = apic->cpu_present_to_apicid(cpu); int cpu0_nmi_registered = 0; unsigned long flags; int err, ret = 0; WARN_ON(irqs_disabled()); pr_debug("++++++++++++++++++++=_---CPU UP %u\n", cpu); if (apicid == BAD_APICID || !physid_isset(apicid, phys_cpu_present_map) || !apic->apic_id_valid(apicid)) { pr_err("%s: bad cpu %d\n", __func__, cpu); return -EINVAL; } /* * Already booted CPU? */ if (cpumask_test_cpu(cpu, cpu_callin_mask)) { pr_debug("do_boot_cpu %d Already started\n", cpu); return -ENOSYS; } /* * Save current MTRR state in case it was changed since early boot * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync: */ mtrr_save_state(); /* x86 CPUs take themselves offline, so delayed offline is OK. */ err = cpu_check_up_prepare(cpu); if (err && err != -EBUSY) return err; /* the FPU context is blank, nobody can own it */ per_cpu(fpu_fpregs_owner_ctx, cpu) = NULL; common_cpu_up(cpu, tidle); err = do_boot_cpu(apicid, cpu, tidle, &cpu0_nmi_registered); if (err) { pr_err("do_boot_cpu failed(%d) to wakeup CPU#%u\n", err, cpu); ret = -EIO; goto unreg_nmi; } /* * Check TSC synchronization with the AP (keep irqs disabled * while doing so): */ local_irq_save(flags); check_tsc_sync_source(cpu); local_irq_restore(flags); while (!cpu_online(cpu)) { cpu_relax(); touch_nmi_watchdog(); } unreg_nmi: /* * Clean up the nmi handler. Do this after the callin and callout sync * to avoid impact of possible long unregister time. */ if (cpu0_nmi_registered) unregister_nmi_handler(NMI_LOCAL, "wake_cpu0"); return ret; }

Contributors

PersonTokensPropCommitsCommitProp
Glauber de Oliveira Costa13656.67%15.88%
Vitaly Kuznetsov3313.75%15.88%
Paul E. McKenney166.67%15.88%
Hugh Dickins114.58%15.88%
Thomas Gleixner93.75%317.65%
Boris Ostrovsky72.92%15.88%
Rik Van Riel52.08%15.88%
Daniel J Blueman52.08%15.88%
Vincent Palatin52.08%15.88%
Igor Mammedov41.67%15.88%
Suresh B. Siddha31.25%15.88%
Mike Travis20.83%15.88%
Ingo Molnar20.83%15.88%
Akinobu Mita10.42%15.88%
Joe Perches10.42%15.88%
Total240100.00%17100.00%

/** * arch_disable_smp_support() - disables SMP support for x86 at runtime */
void arch_disable_smp_support(void) { disable_ioapic_support(); }

Contributors

PersonTokensPropCommitsCommitProp
Henrik Kretzschmar10100.00%1100.00%
Total10100.00%1100.00%

/* * Fall back to non SMP mode after errors. * * RED-PEN audit/test this more. I bet there is more state messed up here. */
static __init void disable_smp(void) { pr_info("SMP disabled\n"); disable_ioapic_support(); init_cpu_present(cpumask_of(0)); init_cpu_possible(cpumask_of(0)); if (smp_found_config) physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map); else physid_set_mask_of_physid(0, &phys_cpu_present_map); cpumask_set_cpu(0, topology_sibling_cpumask(0)); cpumask_set_cpu(0, topology_core_cpumask(0)); }

Contributors

PersonTokensPropCommitsCommitProp
Glauber de Oliveira Costa4662.16%114.29%
Thomas Gleixner810.81%228.57%
Mike Travis810.81%114.29%
Jack Steiner810.81%114.29%
Rusty Russell22.70%114.29%
Bartosz Golaszewski22.70%114.29%
Total74100.00%7100.00%

enum { SMP_OK, SMP_NO_CONFIG, SMP_NO_APIC, SMP_FORCE_UP, }; /* * Various sanity checks. */
static int __init smp_sanity_check(unsigned max_cpus) { preempt_disable(); #if !defined(CONFIG_X86_BIGSMP) && defined(CONFIG_X86_32) if (def_to_bigsmp && nr_cpu_ids > 8) { unsigned int cpu; unsigned nr; pr_warn("More than 8 CPUs detected - skipping them\n" "Use CONFIG_X86_BIGSMP\n"); nr = 0; for_each_present_cpu(cpu) { if (nr >= 8) set_cpu_present(cpu, false); nr++; } nr = 0; for_each_possible_cpu(cpu) { if (nr >= 8) set_cpu_possible(cpu, false); nr++; } nr_cpu_ids = 8; } #endif if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) { pr_warn("weird, boot CPU (#%d) not listed by the BIOS\n", hard_smp_processor_id()); physid_set(hard_smp_processor_id(), phys_cpu_present_map); } /* * If we couldn't find an SMP configuration at boot time, * get out of here now! */ if (!smp_found_config && !acpi_lapic) { preempt_enable(); pr_notice("SMP motherboard not detected\n"); return SMP_NO_CONFIG; } /* * Should not be necessary because the MP table should list the boot * CPU too, but we do it for the sake of robustness anyway. */ if (!apic->check_phys_apicid_present(boot_cpu_physical_apicid)) { pr_notice("weird, boot CPU (#%d) not listed by the BIOS\n", boot_cpu_physical_apicid); physid_set(hard_smp_processor_id(), phys_cpu_present_map); } preempt_enable(); /* * If we couldn't find a local APIC, then get out of here now! */ if (APIC_INTEGRATED(boot_cpu_apic_version) && !boot_cpu_has(X86_FEATURE_APIC)) { if (!disable_apic) { pr_err("BIOS bug, local APIC #%d not detected!...\n", boot_cpu_physical_apicid); pr_err("... forcing use of dummy APIC emulation (tell your hw vendor)\n"); } return SMP_NO_APIC; } /* * If SMP should be disabled, then really disable it! */ if (!max_cpus) { pr_info("SMP mode deactivated\n"); return SMP_FORCE_UP; } return SMP_OK; }

Contributors

PersonTokensPropCommitsCommitProp
Glauber de Oliveira Costa11446.53%18.33%
Yinghai Lu8635.10%325.00%
Joe Perches124.90%18.33%
Cyrill V. Gorcunov93.67%18.33%
Jack Steiner93.67%18.33%
Thomas Gleixner41.63%18.33%
Mike Travis41.63%18.33%
Borislav Petkov41.63%18.33%
Ingo Molnar20.82%18.33%
Denys Vlasenko10.41%18.33%
Total245100.00%12100.00%


static void __init smp_cpu_index_default(void) { int i; struct cpuinfo_x86 *c; for_each_possible_cpu(i) { c = &cpu_data(i); /* mark all to hotplug */ c->cpu_index = nr_cpu_ids; } }

Contributors

PersonTokensPropCommitsCommitProp
Glauber de Oliveira Costa3694.74%133.33%
Akinobu Mita12.63%133.33%
Mike Travis12.63%133.33%
Total38100.00%3100.00%

/* * Prepare for SMP bootup. The MP table or ACPI has been read * earlier. Just do some sanity checking here and enable APIC mode. */
void __init native_smp_prepare_cpus(unsigned int max_cpus) { unsigned int i; smp_cpu_index_default(); /* * Setup boot CPU information */ smp_store_boot_cpu_info(); /* Final full version of the data */ cpumask_copy(cpu_callin_mask, cpumask_of(0)); mb(); for_each_possible_cpu(i) { zalloc_cpumask_var(&per_cpu(cpu_sibling_map, i), GFP_KERNEL); zalloc_cpumask_var(&per_cpu(cpu_core_map, i), GFP_KERNEL); zalloc_cpumask_var(&per_cpu(cpu_llc_shared_map, i), GFP_KERNEL); } /* * Set 'default' x86 topology, this matches default_topology() in that * it has NUMA nodes as a topology level. See also * native_smp_cpus_done(). * * Must be done before set_cpus_sibling_map() is ran. */ set_sched_topology(x86_topology); set_cpu_sibling_map(0); switch (smp_sanity_check(max_cpus)) { case SMP_NO_CONFIG: disable_smp(); if (APIC_init_uniprocessor()) pr_notice("Local APIC not detected. Using dummy APIC emulation.\n"); return; case SMP_NO_APIC: disable_smp(); return; case SMP_FORCE_UP: disable_smp(); apic_bsp_setup(false); return; case SMP_OK: break; } if (read_apic_id() != boot_cpu_physical_apicid) { panic("Boot APIC ID in local APIC unexpected (%d vs %d)", read_apic_id(), boot_cpu_physical_apicid); /* Or can we switch back to PIC here? */ } default_setup_apic_routing(); cpu0_logical_apicid = apic_bsp_setup(false); pr_info("CPU0: "); print_cpu_info(&cpu_data(0)); uv_system_init(); set_mtrr_aps_delayed_init(); smp_quirk_init_udelay(); }

Contributors

PersonTokensPropCommitsCommitProp
Glauber de Oliveira Costa6935.75%14.76%
Rusty Russell4322.28%29.52%
Thomas Gleixner3920.21%419.05%
Tim Chen63.11%14.76%
Mike Travis63.11%14.76%
Yinghai Lu52.59%29.52%
Jack Steiner42.07%14.76%
Fenghua Yu42.07%29.52%
Li Zefan31.55%14.76%
Suresh B. Siddha31.55%14.76%
Wei Jiangang31.55%14.76%
Marcin Ślusarz31.55%14.76%
Len Brown31.55%14.76%
Borislav Petkov10.52%14.76%
Joe Perches10.52%14.76%
Total193100.00%21100.00%


void arch_enable_nonboot_cpus_begin(void) { set_mtrr_aps_delayed_init(); }

Contributors

PersonTokensPropCommitsCommitProp
Suresh B. Siddha10100.00%1100.00%
Total10100.00%1100.00%


void arch_enable_nonboot_cpus_end(void) { mtrr_aps_init(); }

Contributors

PersonTokensPropCommitsCommitProp
Suresh B. Siddha10100.00%1100.00%
Total10100.00%1100.00%

/* * Early setup to make printk work. */
void __init native_smp_prepare_boot_cpu(void) { int me = smp_processor_id(); switch_to_new_gdt(me); /* already set me in cpu_online_mask in boot_cpu_init() */ cpumask_set_cpu(me, cpu_callout_mask); cpu_set_state_online(me); }

Contributors

PersonTokensPropCommitsCommitProp
Glauber de Oliveira Costa2578.12%125.00%
Mike Travis39.38%125.00%
Brian Gerst39.38%125.00%
Paul E. McKenney13.12%125.00%
Total32100.00%4100.00%


void __init native_smp_cpus_done(unsigned int max_cpus) { pr_debug("Boot done\n"); if (x86_has_numa_in_package) set_sched_topology(x86_numa_in_package_topology); nmi_selftest(); impress_friends(); setup_ioapic_dest(); mtrr_aps_init(); }

Contributors

PersonTokensPropCommitsCommitProp
Glauber de Oliveira Costa1952.78%116.67%
Tim Chen925.00%116.67%
Suresh B. Siddha38.33%116.67%
Don Zickus38.33%116.67%
Thomas Gleixner12.78%116.67%
Joe Perches12.78%116.67%
Total36100.00%6100.00%

static int __initdata setup_possible_cpus = -1;
static int __init _setup_possible_cpus(char *str) { get_option(&str, &setup_possible_cpus); return 0; }

Contributors

PersonTokensPropCommitsCommitProp
Mike Travis23100.00%1100.00%
Total23100.00%1100.00%

early_param("possible_cpus", _setup_possible_cpus); /* * cpu_possible_mask should be static, it cannot change as cpu's * are onlined, or offlined. The reason is per-cpu data-structures * are allocated by some modules at init time, and dont expect to * do this dynamically on cpu arrival/departure. * cpu_present_mask on the other hand can change dynamically. * In case when cpu_hotplug is not compiled, then we resort to current * behaviour, which is cpu_possible == cpu_present. * - Ashok Raj * * Three ways to find out the number of additional hotplug CPUs: * - If the BIOS specified disabled CPUs in ACPI/mptables use that. * - The user can overwrite it with possible_cpus=NUM * - Otherwise don't reserve additional CPUs. * We do this because additional CPUs waste a lot of memory. * -AK */
__init void prefill_possible_map(void) { int i, possible; /* No boot processor was found in mptable or ACPI MADT */ if (!num_processors) { if (boot_cpu_has(X86_FEATURE_APIC)) { int apicid = boot_cpu_physical_apicid; int cpu = hard_smp_processor_id(); pr_warn("Boot CPU (id %d) not listed by BIOS\n", cpu); /* Make sure boot cpu is enumerated */ if (apic->cpu_present_to_apicid(0) == BAD_APICID && apic->apic_id_valid(apicid)) generic_processor_info(apicid, boot_cpu_apic_version); } if (!num_processors) num_processors = 1; } i = setup_max_cpus ?: 1; if (setup_possible_cpus == -1) { possible = num_processors; #ifdef CONFIG_HOTPLUG_CPU if (setup_max_cpus) possible += disabled_cpus; #else if (possible > i) possible = i; #endif } else possible = setup_possible_cpus; total_cpus = max_t(int, possible, num_processors + disabled_cpus); /* nr_cpu_ids could be reduced via nr_cpus= */ if (possible > nr_cpu_ids) { pr_warn("%d Processors exceeds NR_CPUS limit of %u\n", possible, nr_cpu_ids); possible = nr_cpu_ids; } #ifdef CONFIG_HOTPLUG_CPU if (!setup_max_cpus) #endif if (possible > i) { pr_warn("%d Processors exceeds max_cpus limit of %u\n", possible, setup_max_cpus); possible = i; } nr_cpu_ids = possible; pr_info("Allowing %d CPUs, %d hotplug CPUs\n", possible, max_t(int, possible - num_processors, 0)); reset_cpu_possible_mask(); for (i = 0; i < possible; i++) set_cpu_possible(i, true); }

Contributors

PersonTokensPropCommitsCommitProp
Chuck Ebbert6727.46%18.33%
Jan Beulich6325.82%18.33%
Prarit Bhargava5221.31%18.33%
Mike Travis3514.34%325.00%
Ville Syrjälä93.69%18.33%
Thomas Gleixner93.69%216.67%
Joe Perches41.64%18.33%
Yinghai Lu41.64%18.33%
Alexey Dobriyan10.41%18.33%
Total244100.00%12100.00%

#ifdef CONFIG_HOTPLUG_CPU /* Recompute SMT state for all CPUs on offline */
static void recompute_smt_state(void) { int max_threads, cpu; max_threads = 0; for_each_online_cpu (cpu) { int threads = cpumask_weight(topology_sibling_cpumask(cpu)); if (threads > max_threads) max_threads = threads; } __max_smt_threads = max_threads; }

Contributors

PersonTokensPropCommitsCommitProp
Andi Kleen48100.00%1100.00%
Total48100.00%1100.00%


static void remove_siblinginfo(int cpu) { int sibling; struct cpuinfo_x86 *c = &cpu_data(cpu); for_each_cpu(sibling, topology_core_cpumask(cpu)) { cpumask_clear_cpu(cpu, topology_core_cpumask(sibling)); /*/ * last thread sibling in this cpu core going down */ if (cpumask_weight(topology_sibling_cpumask(cpu)) == 1) cpu_data(sibling).booted_cores--; } for_each_cpu(sibling, topology_sibling_cpumask(cpu)) cpumask_clear_cpu(cpu, topology_sibling_cpumask(sibling)); for_each_cpu(sibling, cpu_llc_shared_mask(cpu)) cpumask_clear_cpu(cpu, cpu_llc_shared_mask(sibling)); cpumask_clear(cpu_llc_shared_mask(cpu)); cpumask_clear(topology_sibling_cpumask(cpu)); cpumask_clear(topology_core_cpumask(cpu)); c->phys_proc_id = 0; c->cpu_core_id = 0; cpumask_clear_cpu(cpu, cpu_sibling_setup_mask); recompute_smt_state(); }

Contributors

PersonTokensPropCommitsCommitProp
Glauber de Oliveira Costa9668.57%116.67%
Wanpeng Li2417.14%116.67%
Mike Travis96.43%116.67%
Bartosz Golaszewski75.00%116.67%
Andi Kleen32.14%116.67%
Ingo Molnar10.71%116.67%
Total140100.00%6100.00%


static void remove_cpu_from_maps(int cpu) { set_cpu_online(cpu, false); cpumask_clear_cpu(cpu, cpu_callout_mask); cpumask_clear_cpu(cpu, cpu_callin_mask); /* was set by cpu_init() */ cpumask_clear_cpu(cpu, cpu_initialized_mask); numa_remove_cpu(cpu); }

Contributors

PersonTokensPropCommitsCommitProp
Glauber de Oliveira Costa3479.07%133.33%
Mike Travis920.93%266.67%
Total43100.00%3100.00%


void cpu_disable_common(void) { int cpu = smp_processor_id(); remove_siblinginfo(cpu); /* It's now safe to remove this processor from the online map */ lock_vector_lock(); remove_cpu_from_maps(cpu); unlock_vector_lock(); fixup_irqs(); }

Contributors

PersonTokensPropCommitsCommitProp
Glauber de Oliveira Costa2369.70%125.00%
Eric W. Biedermann618.18%125.00%
Alex Nixon39.09%125.00%
Mike Travis13.03%125.00%
Total33100.00%4100.00%


int native_cpu_disable(void) { int ret; ret = check_irq_vectors_for_cpu_disable(); if (ret) return ret; clear_local_APIC(); cpu_disable_common(); return 0; }

Contributors

PersonTokensPropCommitsCommitProp
Prarit Bhargava1548.39%133.33%
Alex Nixon1238.71%133.33%
Glauber de Oliveira Costa412.90%133.33%
Total31100.00%3100.00%


int common_cpu_die(unsigned int cpu) { int ret = 0; /* We don't do anything here: idle task is faking death itself. */ /* They ack this in play_dead() by setting CPU_DEAD */ if (cpu_wait_death(cpu, 5)) { if (system_state == SYSTEM_RUNNING) pr_info("CPU %u is now offline\n", cpu); } else { pr_err("CPU %u didn't die...\n", cpu); ret = -1; } return ret; }

Contributors

PersonTokensPropCommitsCommitProp
Glauber de Oliveira Costa2136.21%120.00%
Paul E. McKenney1831.03%120.00%
Mike Travis915.52%120.00%
Boris Ostrovsky712.07%120.00%
Lan Tianyu35.17%120.00%
Total58100.00%5100.00%


void native_cpu_die(unsigned int cpu) { common_cpu_die(cpu); }

Contributors

PersonTokensPropCommitsCommitProp
Paul E. McKenney1392.86%150.00%
Lan Tianyu17.14%150.00%
Total14100.00%2100.00%


void play_dead_common(void) { idle_task_exit(); /* Ack it */ (void)cpu_report_death(); /* * With physical CPU hotplug, we should halt the cpu */ local_irq_disable(); }

Contributors

PersonTokensPropCommitsCommitProp
Alex Nixon1571.43%133.33%
Paul E. McKenney419.05%133.33%
Lan Tianyu29.52%133.33%
Total21100.00%3100.00%


static bool wakeup_cpu0(void) { if (smp_processor_id() == 0 && enable_start_cpu0) return true; return false; }

Contributors

PersonTokensPropCommitsCommitProp
Fenghua Yu23100.00%1100.00%
Total23100.00%1100.00%

/* * We need to flush the caches before going to sleep, lest we have * dirty data in our caches when we come back up. */
static inline void mwait_play_dead(void) { unsigned int eax, ebx, ecx, edx; unsigned int highest_cstate = 0; unsigned int highest_subcstate = 0; void *mwait_ptr; int i; if (!this_cpu_has(X86_FEATURE_MWAIT)) return; if (!this_cpu_has(X86_FEATURE_CLFLUSH)) return; if (__this_cpu_read(cpu_info.cpuid_level) < CPUID_MWAIT_LEAF) return; eax = CPUID_MWAIT_LEAF; ecx = 0; native_cpuid(&eax, &ebx, &ecx, &edx); /* * eax will be 0 if EDX enumeration is not valid. * Initialized below to cstate, sub_cstate value when EDX is valid. */ if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED)) { eax = 0; } else { edx >>= MWAIT_SUBSTATE_SIZE; for (i = 0; i < 7 && edx; i++, edx >>= MWAIT_SUBSTATE_SIZE) { if (edx & MWAIT_SUBSTATE_MASK) { highest_cstate = i; highest_subcstate = edx & MWAIT_SUBSTATE_MASK; } } eax = (highest_cstate << MWAIT_SUBSTATE_SIZE) | (highest_subcstate - 1); } /* * This should be a memory location in a cache line which is * unlikely to be touched by other processors. The actual * content is immaterial as it is not actually modified in any way. */ mwait_ptr = &current_thread_info()->flags; wbinvd(); while (1) { /* * The CLFLUSH is a workaround for erratum AAI65 for * the Xeon 7400 series. It's not clear it is actually * needed, but it should be harmless in either case. * The WBINVD is insufficient due to the spurious-wakeup * case where we return around the loop. */ mb(); clflush(mwait_ptr); mb(); __monitor(mwait_ptr, 0, 0); mb(); __mwait(eax, 0); /* * If NMI wants to wake up CPU0, start CPU0. */ if (wakeup_cpu0()) start_cpu0(); } }

Contributors

PersonTokensPropCommitsCommitProp
H. Peter Anvin20390.22%550.00%
Fenghua Yu94.00%110.00%
Borislav Petkov73.11%220.00%
Tejun Heo41.78%110.00%
Christoph Lameter20.89%110.00%
Total225100.00%10100.00%


void hlt_play_dead(void) { if (__this_cpu_read(cpu_info.x86) >= 4) wbinvd(); while (1) { native_halt(); /* * If NMI wants to wake up CPU0, start CPU0. */ if (wakeup_cpu0()) start_cpu0(); } }

Contributors

PersonTokensPropCommitsCommitProp
H. Peter Anvin2666.67%250.00%
Fenghua Yu923.08%125.00%
Tejun Heo410.26%125.00%
Total39100.00%4100.00%


void native_play_dead(void) { play_dead_common(); tboot_shutdown(TB_SHUTDOWN_WFS); mwait_play_dead(); /* Only returns on failure */ if (cpuidle_play_dead()) hlt_play_dead(); }

Contributors

PersonTokensPropCommitsCommitProp
Alex Nixon1244.44%125.00%
Joseph Cihula518.52%125.00%
Boris Ostrovsky518.52%125.00%
H. Peter Anvin518.52%125.00%
Total27100.00%4100.00%

#else /* ... !CONFIG_HOTPLUG_CPU */
int native_cpu_disable(void) { return -ENOSYS; }

Contributors

PersonTokensPropCommitsCommitProp
Glauber de Oliveira Costa1090.91%150.00%
Alex Nixon19.09%150.00%
Total11100.00%2100.00%


void native_cpu_die(unsigned int cpu) { /* We said "no" in __cpu_disable */ BUG(); }

Contributors

PersonTokensPropCommitsCommitProp
Glauber de Oliveira Costa1292.31%150.00%
Alex Nixon17.69%150.00%
Total13100.00%2100.00%


void native_play_dead(void) { BUG(); }

Contributors

PersonTokensPropCommitsCommitProp
Alex Nixon10100.00%1100.00%
Total10100.00%1100.00%

#endif

Overall Contributors

PersonTokensPropCommitsCommitProp
Glauber de Oliveira Costa177233.30%189.09%
Thomas Gleixner57610.82%2010.10%
Peter Zijlstra2795.24%42.02%
Fenghua Yu2494.68%21.01%
H. Peter Anvin2394.49%63.03%
Mike Travis2314.34%73.54%
Borislav Petkov1663.12%126.06%
Tim Chen1663.12%31.52%
Len Brown1402.63%84.04%
Yinghai Lu1332.50%115.56%
Dave Hansen1132.12%21.01%
Boris Ostrovsky871.63%31.52%
Andi Kleen821.54%21.01%
Prarit Bhargava671.26%21.01%
Chuck Ebbert671.26%10.51%
Jan Beulich641.20%21.01%
Igor Mammedov631.18%42.02%
Alex Nixon541.01%31.52%
Andreas Herrmann541.01%21.01%
Paul E. McKenney531.00%10.51%
Rusty Russell531.00%42.02%
Joe Perches490.92%10.51%
Jack Steiner490.92%52.53%
Ingo Molnar460.86%157.58%
Suresh B. Siddha430.81%31.52%
Vitaly Kuznetsov370.70%10.51%
Andrew Lutomirski300.56%21.01%
Jarkko Sakkinen290.54%31.52%
Cyrill V. Gorcunov260.49%31.52%
Wanpeng Li240.45%10.51%
Jiri Olsa220.41%10.51%
Maciej W. Rozycki210.39%10.51%
Bartosz Golaszewski190.36%10.51%
Jan Kiszka160.30%10.51%
Kamalesh Babulal160.30%10.51%
Henrik Kretzschmar140.26%10.51%
Tejun Heo140.26%31.52%
Eric W. Biedermann120.23%10.51%
Hugh Dickins110.21%10.51%
Andrew Jones110.21%10.51%
Zhu Guihua110.21%10.51%
Ville Syrjälä90.17%10.51%
Jacob jun Pan80.15%21.01%
Pavel Tatashin70.13%10.51%
Vincent Palatin70.13%10.51%
Lan Tianyu60.11%10.51%
Joseph Cihula50.09%10.51%
Rik Van Riel50.09%10.51%
Daniel J Blueman50.09%10.51%
Denys Vlasenko50.09%10.51%
Russ Anderson50.09%10.51%
Vlad Zolotarov40.08%10.51%
Manfred Spraul40.08%10.51%
Josh Poimboeuf30.06%21.01%
Brian Gerst30.06%10.51%
Li Bin30.06%10.51%
Don Zickus30.06%10.51%
Marcin Ślusarz30.06%10.51%
Alok N Kataria30.06%10.51%
Li Zefan30.06%10.51%
Shane Wang30.06%10.51%
Wei Jiangang30.06%10.51%
Paul Gortmaker20.04%21.01%
Greg Dietsche20.04%10.51%
Linus Torvalds20.04%10.51%
Pavel Machek20.04%10.51%
Akinobu Mita20.04%10.51%
Christoph Lameter20.04%10.51%
Jan H. Schönherr20.04%10.51%
Adrian Bunk10.02%10.51%
Thomas Garnier10.02%10.51%
Alexey Dobriyan10.02%10.51%
Total5322100.00%198100.00%
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