cregit-Linux how code gets into the kernel

Release 4.14 drivers/gpio/gpio-omap.c

Directory: drivers/gpio
/*
 * Support functions for OMAP GPIO
 *
 * Copyright (C) 2003-2005 Nokia Corporation
 * Written by Juha Yrjölä <juha.yrjola@nokia.com>
 *
 * Copyright (C) 2009 Texas Instruments
 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/init.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/syscore_ops.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/device.h>
#include <linux/pm_runtime.h>
#include <linux/pm.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/gpio.h>
#include <linux/bitops.h>
#include <linux/platform_data/gpio-omap.h>


#define OFF_MODE	1

#define OMAP4_GPIO_DEBOUNCINGTIME_MASK 0xFF

static LIST_HEAD(omap_gpio_list);


struct gpio_regs {
	
u32 irqenable1;
	
u32 irqenable2;
	
u32 wake_en;
	
u32 ctrl;
	
u32 oe;
	
u32 leveldetect0;
	
u32 leveldetect1;
	
u32 risingdetect;
	
u32 fallingdetect;
	
u32 dataout;
	
u32 debounce;
	
u32 debounce_en;
};


struct gpio_bank {
	
struct list_head node;
	
void __iomem *base;
	
int irq;
	
u32 non_wakeup_gpios;
	
u32 enabled_non_wakeup_gpios;
	
struct gpio_regs context;
	
u32 saved_datain;
	
u32 level_mask;
	
u32 toggle_mask;
	
raw_spinlock_t lock;
	
raw_spinlock_t wa_lock;
	
struct gpio_chip chip;
	
struct clk *dbck;
	
u32 mod_usage;
	
u32 irq_usage;
	
u32 dbck_enable_mask;
	
bool dbck_enabled;
	
bool is_mpuio;
	
bool dbck_flag;
	
bool loses_context;
	
bool context_valid;
	
int stride;
	
u32 width;
	
int context_loss_count;
	
int power_mode;
	
bool workaround_enabled;

	
void (*set_dataout)(struct gpio_bank *bank, unsigned gpio, int enable);
	
int (*get_context_loss_count)(struct device *dev);

	
struct omap_gpio_reg_offs *regs;
};


#define GPIO_MOD_CTRL_BIT	BIT(0)


#define BANK_USED(bank) (bank->mod_usage || bank->irq_usage)

#define LINE_USED(line, offset) (line & (BIT(offset)))

static void omap_gpio_unmask_irq(struct irq_data *d);


static inline struct gpio_bank *omap_irq_data_get_bank(struct irq_data *d) { struct gpio_chip *chip = irq_data_get_irq_chip_data(d); return gpiochip_get_data(chip); }

Contributors

PersonTokensPropCommitsCommitProp
Javier Martinez Canillas1550.00%240.00%
Jon Hunter1240.00%120.00%
Benoît Cousson26.67%120.00%
Linus Walleij13.33%120.00%
Total30100.00%5100.00%


static void omap_set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input) { void __iomem *reg = bank->base; u32 l; reg += bank->regs->direction; l = readl_relaxed(reg); if (is_input) l |= BIT(gpio); else l &= ~(BIT(gpio)); writel_relaxed(l, reg); bank->context.oe = l; }

Contributors

PersonTokensPropCommitsCommitProp
Cory Maccarrone2935.80%19.09%
Varadarajan, Charulatha2125.93%19.09%
Tarun Kanti DebBarma89.88%19.09%
Javier Martinez Canillas78.64%218.18%
Tony Lindgren67.41%218.18%
Kevin Hilman33.70%19.09%
Syed Rafiuddin33.70%19.09%
Felipe Balbi22.47%19.09%
Victor Kamensky22.47%19.09%
Total81100.00%11100.00%

/* set data out value using dedicate set/clear register */
static void omap_set_gpio_dataout_reg(struct gpio_bank *bank, unsigned offset, int enable) { void __iomem *reg = bank->base; u32 l = BIT(offset); if (enable) { reg += bank->regs->set_dataout; bank->context.dataout |= l; } else { reg += bank->regs->clr_dataout; bank->context.dataout &= ~l; } writel_relaxed(l, reg); }

Contributors

PersonTokensPropCommitsCommitProp
Tony Lindgren3036.14%327.27%
Tarun Kanti DebBarma2125.30%19.09%
Kevin Hilman1315.66%19.09%
Varadarajan, Charulatha1113.25%19.09%
Grygorii Strashko44.82%19.09%
Javier Martinez Canillas11.20%19.09%
Syed Rafiuddin11.20%19.09%
Victor Kamensky11.20%19.09%
Juha Yrjölä11.20%19.09%
Total83100.00%11100.00%

/* set data out value using mask register */
static void omap_set_gpio_dataout_mask(struct gpio_bank *bank, unsigned offset, int enable) { void __iomem *reg = bank->base + bank->regs->dataout; u32 gpio_bit = BIT(offset); u32 l; l = readl_relaxed(reg); if (enable) l |= gpio_bit; else l &= ~gpio_bit; writel_relaxed(l, reg); bank->context.dataout = l; }

Contributors

PersonTokensPropCommitsCommitProp
Kevin Hilman3544.30%222.22%
Varadarajan, Charulatha1620.25%111.11%
Tony Lindgren911.39%111.11%
Tarun Kanti DebBarma810.13%111.11%
Syed Rafiuddin45.06%111.11%
Grygorii Strashko45.06%111.11%
Victor Kamensky22.53%111.11%
Javier Martinez Canillas11.27%111.11%
Total79100.00%9100.00%


static int omap_get_gpio_datain(struct gpio_bank *bank, int offset) { void __iomem *reg = bank->base + bank->regs->datain; return (readl_relaxed(reg) & (BIT(offset))) != 0; }

Contributors

PersonTokensPropCommitsCommitProp
Cory Maccarrone1839.13%110.00%
Varadarajan, Charulatha919.57%110.00%
Kevin Hilman715.22%110.00%
Tarun Kanti DebBarma48.70%110.00%
Javier Martinez Canillas48.70%220.00%
Victor Kamensky12.17%110.00%
Janusz Krzysztofik12.17%110.00%
Tony Lindgren12.17%110.00%
Zebediah C. McClure12.17%110.00%
Total46100.00%10100.00%


static int omap_get_gpio_dataout(struct gpio_bank *bank, int offset) { void __iomem *reg = bank->base + bank->regs->dataout; return (readl_relaxed(reg) & (BIT(offset))) != 0; }

Contributors

PersonTokensPropCommitsCommitProp
Varadarajan, Charulatha2145.65%112.50%
Kevin Hilman1021.74%112.50%
Tony Lindgren613.04%225.00%
Tarun Kanti DebBarma48.70%112.50%
Javier Martinez Canillas48.70%225.00%
Victor Kamensky12.17%112.50%
Total46100.00%8100.00%


static inline void omap_gpio_rmw(void __iomem *base, u32 reg, u32 mask, bool set) { int l = readl_relaxed(base + reg); if (set) l |= mask; else l &= ~mask; writel_relaxed(l, base + reg); }

Contributors

PersonTokensPropCommitsCommitProp
Kevin Hilman4583.33%125.00%
Varadarajan, Charulatha611.11%125.00%
Victor Kamensky23.70%125.00%
Javier Martinez Canillas11.85%125.00%
Total54100.00%4100.00%


static inline void omap_gpio_dbck_enable(struct gpio_bank *bank) { if (bank->dbck_enable_mask && !bank->dbck_enabled) { clk_enable(bank->dbck); bank->dbck_enabled = true; writel_relaxed(bank->dbck_enable_mask, bank->base + bank->regs->debounce_en); } }

Contributors

PersonTokensPropCommitsCommitProp
Tarun Kanti DebBarma3665.45%120.00%
Grazvydas Ignotas1629.09%120.00%
Victor Kamensky11.82%120.00%
Grygorii Strashko11.82%120.00%
Javier Martinez Canillas11.82%120.00%
Total55100.00%5100.00%


static inline void omap_gpio_dbck_disable(struct gpio_bank *bank) { if (bank->dbck_enable_mask && bank->dbck_enabled) { /* * Disable debounce before cutting it's clock. If debounce is * enabled but the clock is not, GPIO module seems to be unable * to detect events and generate interrupts at least on OMAP3. */ writel_relaxed(0, bank->base + bank->regs->debounce_en); clk_disable(bank->dbck); bank->dbck_enabled = false; } }

Contributors

PersonTokensPropCommitsCommitProp
Tarun Kanti DebBarma3566.04%120.00%
Grazvydas Ignotas1528.30%120.00%
Victor Kamensky11.89%120.00%
Javier Martinez Canillas11.89%120.00%
Grygorii Strashko11.89%120.00%
Total53100.00%5100.00%

/** * omap2_set_gpio_debounce - low level gpio debounce time * @bank: the gpio bank we're acting upon * @offset: the gpio number on this @bank * @debounce: debounce time to use * * OMAP's debounce time is in 31us steps * <debounce time> = (GPIO_DEBOUNCINGTIME[7:0].DEBOUNCETIME + 1) x 31 * so we need to convert and round up to the closest unit. * * Return: 0 on success, negative error otherwise. */
static int omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned offset, unsigned debounce) { void __iomem *reg; u32 val; u32 l; bool enable = !!debounce; if (!bank->dbck_flag) return -ENOTSUPP; if (enable) { debounce = DIV_ROUND_UP(debounce, 31) - 1; if ((debounce & OMAP4_GPIO_DEBOUNCINGTIME_MASK) != debounce) return -EINVAL; } l = BIT(offset); clk_enable(bank->dbck); reg = bank->base + bank->regs->debounce; writel_relaxed(debounce, reg); reg = bank->base + bank->regs->debounce_en; val = readl_relaxed(reg); if (enable) val |= l; else val &= ~l; bank->dbck_enable_mask = val; writel_relaxed(val, reg); clk_disable(bank->dbck); /* * Enable debounce clock per module. * This call is mandatory because in omap_gpio_request() when * *_runtime_get_sync() is called, _gpio_dbck_enable() within * runtime callbck fails to turn on dbck because dbck_enable_mask * used within _gpio_dbck_enable() is still not initialized at * that point. Therefore we have to enable dbck here. */ omap_gpio_dbck_enable(bank); if (bank->dbck_enable_mask) { bank->context.debounce = debounce; bank->context.debounce_en = val; } return 0; }

Contributors

PersonTokensPropCommitsCommitProp
Varadarajan, Charulatha5427.55%16.25%
Tony Lindgren2914.80%212.50%
Nishanth Menon2412.24%16.25%
Grygorii Strashko2311.73%318.75%
David Rivshin2010.20%16.25%
Kevin Hilman178.67%212.50%
Tarun Kanti DebBarma178.67%16.25%
David Brownell73.57%318.75%
Victor Kamensky31.53%16.25%
Javier Martinez Canillas21.02%16.25%
Total196100.00%16100.00%

/** * omap_clear_gpio_debounce - clear debounce settings for a gpio * @bank: the gpio bank we're acting upon * @offset: the gpio number on this @bank * * If a gpio is using debounce, then clear the debounce enable bit and if * this is the only gpio in this bank using debounce, then clear the debounce * time too. The debounce clock will also be disabled when calling this function * if this is the only gpio in the bank using debounce. */
static void omap_clear_gpio_debounce(struct gpio_bank *bank, unsigned offset) { u32 gpio_bit = BIT(offset); if (!bank->dbck_flag) return; if (!(bank->dbck_enable_mask & gpio_bit)) return; bank->dbck_enable_mask &= ~gpio_bit; bank->context.debounce_en &= ~gpio_bit; writel_relaxed(bank->context.debounce_en, bank->base + bank->regs->debounce_en); if (!bank->dbck_enable_mask) { bank->context.debounce = 0; writel_relaxed(bank->context.debounce, bank->base + bank->regs->debounce); clk_disable(bank->dbck); bank->dbck_enabled = false; } }

Contributors

PersonTokensPropCommitsCommitProp
Jon Hunter11994.44%120.00%
Grygorii Strashko43.17%240.00%
Victor Kamensky21.59%120.00%
Javier Martinez Canillas10.79%120.00%
Total126100.00%5100.00%


static inline void omap_set_gpio_trigger(struct gpio_bank *bank, int gpio, unsigned trigger) { void __iomem *base = bank->base; u32 gpio_bit = BIT(gpio); omap_gpio_rmw(base, bank->regs->leveldetect0, gpio_bit, trigger & IRQ_TYPE_LEVEL_LOW); omap_gpio_rmw(base, bank->regs->leveldetect1, gpio_bit, trigger & IRQ_TYPE_LEVEL_HIGH); omap_gpio_rmw(base, bank->regs->risingdetect, gpio_bit, trigger & IRQ_TYPE_EDGE_RISING); omap_gpio_rmw(base, bank->regs->fallingdetect, gpio_bit, trigger & IRQ_TYPE_EDGE_FALLING); bank->context.leveldetect0 = readl_relaxed(bank->base + bank->regs->leveldetect0); bank->context.leveldetect1 = readl_relaxed(bank->base + bank->regs->leveldetect1); bank->context.risingdetect = readl_relaxed(bank->base + bank->regs->risingdetect); bank->context.fallingdetect = readl_relaxed(bank->base + bank->regs->fallingdetect); if (likely(!(bank->non_wakeup_gpios & gpio_bit))) { omap_gpio_rmw(base, bank->regs->wkup_en, gpio_bit, trigger != 0); bank->context.wake_en = readl_relaxed(bank->base + bank->regs->wkup_en); } /* This part needs to be executed always for OMAP{34xx, 44xx} */ if (!bank->regs->irqctrl) { /* On omap24xx proceed only when valid GPIO bit is set */ if (bank->non_wakeup_gpios) { if (!(bank->non_wakeup_gpios & gpio_bit)) goto exit; } /* * Log the edge gpio and manually trigger the IRQ * after resume if the input level changes * to avoid irq lost during PER RET/OFF mode * Applies for omap2 non-wakeup gpio and all omap3 gpios */ if (trigger & IRQ_TYPE_EDGE_BOTH) bank->enabled_non_wakeup_gpios |= gpio_bit; else bank->enabled_non_wakeup_gpios &= ~gpio_bit; } exit: bank->level_mask = readl_relaxed(bank->base + bank->regs->leveldetect0) | readl_relaxed(bank->base + bank->regs->leveldetect1); }

Contributors

PersonTokensPropCommitsCommitProp
Tarun Kanti DebBarma14545.45%420.00%
Varadarajan, Charulatha10131.66%15.00%
Tony Lindgren278.46%315.00%
Kevin Hilman103.13%15.00%
Javier Martinez Canillas92.82%210.00%
Victor Kamensky72.19%15.00%
Colin Cross51.57%15.00%
Alistair Buxton41.25%15.00%
Syed Mohammed Khasim30.94%15.00%
Syed Rafiuddin30.94%15.00%
Roger Quadros20.63%15.00%
David Brownell10.31%15.00%
Hiroshi Doyu10.31%15.00%
Zebediah C. McClure10.31%15.00%
Total319100.00%20100.00%

#ifdef CONFIG_ARCH_OMAP1 /* * This only applies to chips that can't do both rising and falling edge * detection at once. For all other chips, this function is a noop. */
static void omap_toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) { void __iomem *reg = bank->base; u32 l = 0; if (!bank->regs->irqctrl) return; reg += bank->regs->irqctrl; l = readl_relaxed(reg); if ((l >> gpio) & 1) l &= ~(BIT(gpio)); else l |= BIT(gpio); writel_relaxed(l, reg); }

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PersonTokensPropCommitsCommitProp
Imre Deak4348.86%225.00%
Varadarajan, Charulatha2528.41%112.50%
Tarun Kanti DebBarma910.23%112.50%
Javier Martinez Canillas77.95%225.00%
Tony Lindgren22.27%112.50%
Victor Kamensky22.27%112.50%
Total88100.00%8100.00%

#else
static void omap_toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) {}

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PersonTokensPropCommitsCommitProp
Tarun Kanti DebBarma1292.31%150.00%
Javier Martinez Canillas17.69%150.00%
Total13100.00%2100.00%

#endif
static int omap_set_gpio_triggering(struct gpio_bank *bank, int gpio, unsigned trigger) { void __iomem *reg = bank->base; void __iomem *base = bank->base; u32 l = 0; if (bank->regs->leveldetect0 && bank->regs->wkup_en) { omap_set_gpio_trigger(bank, gpio, trigger); } else if (bank->regs->irqctrl) { reg += bank->regs->irqctrl; l = readl_relaxed(reg); if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) bank->toggle_mask |= BIT(gpio); if (trigger & IRQ_TYPE_EDGE_RISING) l |= BIT(gpio); else if (trigger & IRQ_TYPE_EDGE_FALLING) l &= ~(BIT(gpio)); else return -EINVAL; writel_relaxed(l, reg); } else if (bank->regs->edgectrl1) { if (gpio & 0x08) reg += bank->regs->edgectrl2; else reg += bank->regs->edgectrl1; gpio &= 0x07; l = readl_relaxed(reg); l &= ~(3 << (gpio << 1)); if (trigger & IRQ_TYPE_EDGE_RISING) l |= 2 << (gpio << 1); if (trigger & IRQ_TYPE_EDGE_FALLING) l |= BIT(gpio << 1); /* Enable wake-up during idle for dynamic tick */ omap_gpio_rmw(base, bank->regs->wkup_en, BIT(gpio), trigger); bank->context.wake_en = readl_relaxed(bank->base + bank->regs->wkup_en); writel_relaxed(l, reg); } return 0; }

Contributors

PersonTokensPropCommitsCommitProp
Varadarajan, Charulatha10435.99%19.09%
Tarun Kanti DebBarma8629.76%327.27%
Tony Lindgren7525.95%327.27%
Javier Martinez Canillas186.23%218.18%
Victor Kamensky51.73%19.09%
Syed Rafiuddin10.35%19.09%
Total289100.00%11100.00%


static void omap_enable_gpio_module(struct gpio_bank *bank, unsigned offset) { if (bank->regs->pinctrl) { void __iomem *reg = bank->base + bank->regs->pinctrl; /* Claim the pin for MPU */ writel_relaxed(readl_relaxed(reg) | (BIT(offset)), reg); } if (bank->regs->ctrl && !BANK_USED(bank)) { void __iomem *reg = bank->base + bank->regs->ctrl; u32 ctrl; ctrl = readl_relaxed(reg); /* Module is enabled, clocks are not gated */ ctrl &= ~GPIO_MOD_CTRL_BIT; writel_relaxed(ctrl, reg); bank->context.ctrl = ctrl; } }

Contributors

PersonTokensPropCommitsCommitProp
Javier Martinez Canillas11596.64%375.00%
Victor Kamensky43.36%125.00%
Total119100.00%4100.00%


static void omap_disable_gpio_module(struct gpio_bank *bank, unsigned offset) { void __iomem *base = bank->base; if (bank->regs->wkup_en && !LINE_USED(bank->mod_usage, offset) && !LINE_USED(bank->irq_usage, offset)) { /* Disable wake-up during idle for dynamic tick */ omap_gpio_rmw(base, bank->regs->wkup_en, BIT(offset), 0); bank->context.wake_en = readl_relaxed(bank->base + bank->regs->wkup_en); } if (bank->regs->ctrl && !BANK_USED(bank)) { void __iomem *reg = bank->base + bank->regs->ctrl; u32 ctrl; ctrl = readl_relaxed(reg); /* Module is disabled, clocks are gated */ ctrl |= GPIO_MOD_CTRL_BIT; writel_relaxed(ctrl, reg); bank->context.ctrl = ctrl; } }

Contributors

PersonTokensPropCommitsCommitProp
Javier Martinez Canillas14998.03%375.00%
Victor Kamensky31.97%125.00%
Total152100.00%4100.00%


static int omap_gpio_is_input(struct gpio_bank *bank, unsigned offset) { void __iomem *reg = bank->base + bank->regs->direction; return readl_relaxed(reg) & BIT(offset); }

Contributors

PersonTokensPropCommitsCommitProp
Javier Martinez Canillas3382.50%250.00%
Grygorii Strashko615.00%125.00%
Victor Kamensky12.50%125.00%
Total40100.00%4100.00%


static void omap_gpio_init_irq(struct gpio_bank *bank, unsigned offset) { if (!LINE_USED(bank->mod_usage, offset)) { omap_enable_gpio_module(bank, offset); omap_set_gpio_direction(bank, offset, 1); } bank->irq_usage |= BIT(offset); }

Contributors

PersonTokensPropCommitsCommitProp
Tony Lindgren5298.11%150.00%
Grygorii Strashko11.89%150.00%
Total53100.00%2100.00%


static int omap_gpio_irq_type(struct irq_data *d, unsigned type) { struct gpio_bank *bank = omap_irq_data_get_bank(d); int retval; unsigned long flags; unsigned offset = d->hwirq; if (type & ~IRQ_TYPE_SENSE_MASK) return -EINVAL; if (!bank->regs->leveldetect0 && (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH))) return -EINVAL; raw_spin_lock_irqsave(&bank->lock, flags); retval = omap_set_gpio_triggering(bank, offset, type); if (retval) { raw_spin_unlock_irqrestore(&bank->lock, flags); goto error; } omap_gpio_init_irq(bank, offset); if (!omap_gpio_is_input(bank, offset)) { raw_spin_unlock_irqrestore(&bank->lock, flags); retval = -EINVAL; goto error; } raw_spin_unlock_irqrestore(&bank->lock, flags); if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) irq_set_handler_locked(d, handle_level_irq); else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) /* * Edge IRQs are already cleared/acked in irq_handler and * not need to be masked, as result handle_edge_irq() * logic is excessed here and may cause lose of interrupts. * So just use handle_simple_irq. */ irq_set_handler_locked(d, handle_simple_irq); return 0; error: return retval; }

Contributors

PersonTokensPropCommitsCommitProp
Varadarajan, Charulatha5527.09%14.55%
Javier Martinez Canillas3517.24%29.09%
Grygorii Strashko3517.24%418.18%
Tony Lindgren2612.81%418.18%
Juha Yrjölä167.88%14.55%
David Brownell115.42%29.09%
Lennert Buytenhek62.96%14.55%
Tarun Kanti DebBarma52.46%14.55%
Benoît Cousson41.97%14.55%
Sebastian Andrzej Siewior31.48%14.55%
Jon Hunter20.99%14.55%
Kevin Hilman20.99%14.55%
Thomas Gleixner20.99%14.55%
Axel Lin10.49%14.55%
Total203100.00%22100.00%


static void omap_clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) { void __iomem *reg = bank->base; reg += bank->regs->irqstatus; writel_relaxed(gpio_mask, reg); /* Workaround for clearing DSP GPIO interrupts to allow retention */ if (bank->regs->irqstatus2) { reg = bank->base + bank->regs->irqstatus2; writel_relaxed(gpio_mask, reg); } /* Flush posted write for the irq status to avoid spurious interrupts */ readl_relaxed(reg); }

Contributors

PersonTokensPropCommitsCommitProp
Varadarajan, Charulatha3648.65%116.67%
Kevin Hilman1520.27%116.67%
Juha Yrjölä1216.22%116.67%
Tony Lindgren79.46%116.67%
Victor Kamensky34.05%116.67%
Javier Martinez Canillas11.35%116.67%
Total74100.00%6100.00%


static inline void omap_clear_gpio_irqstatus(struct gpio_bank *bank, unsigned offset) { omap_clear_gpio_irqbank(bank, BIT(offset)); }

Contributors

PersonTokensPropCommitsCommitProp
Tony Lindgren1456.00%240.00%
Varadarajan, Charulatha520.00%120.00%
Grygorii Strashko416.00%120.00%
Javier Martinez Canillas28.00%120.00%
Total25100.00%5100.00%


static u32 omap_get_gpio_irqbank_mask(struct gpio_bank *bank) { void __iomem *reg = bank->base; u32 l; u32 mask = (BIT(bank->width)) - 1; reg += bank->regs->irqenable; l = readl_relaxed(reg); if (bank->regs->irqenable_inv) l = ~l; l &= mask; return l; }

Contributors

PersonTokensPropCommitsCommitProp
Varadarajan, Charulatha3650.00%216.67%
Kevin Hilman1419.44%216.67%
Tony Lindgren1318.06%325.00%
Javier Martinez Canillas45.56%216.67%
Jarkko Nikula34.17%18.33%
David Brownell11.39%18.33%
Victor Kamensky11.39%18.33%
Total72100.00%12100.00%


static void omap_enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) { void __iomem *reg = bank->base; u32 l; if (bank->regs->set_irqenable) { reg += bank->regs->set_irqenable; l = gpio_mask; bank->context.irqenable1 |= gpio_mask; } else { reg += bank->regs->irqenable; l = readl_relaxed(reg); if (bank->regs->irqenable_inv) l &= ~gpio_mask; else l |= gpio_mask; bank->context.irqenable1 = l; } writel_relaxed(l, reg); }

Contributors

PersonTokensPropCommitsCommitProp
Varadarajan, Charulatha5349.53%327.27%
Tarun Kanti DebBarma2321.50%218.18%
Kevin Hilman1917.76%19.09%
Tony Lindgren98.41%327.27%
Victor Kamensky21.87%19.09%
Javier Martinez Canillas10.93%19.09%
Total107100.00%11100.00%


static void omap_disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) { void __iomem *reg = bank->base; u32 l; if (bank->regs->clr_irqenable) { reg += bank->regs->clr_irqenable; l = gpio_mask; bank->context.irqenable1 &= ~gpio_mask; } else { reg += bank->regs->irqenable; l = readl_relaxed(reg); if (bank->regs->irqenable_inv) l |= gpio_mask; else l &= ~gpio_mask; bank->context.irqenable1 = l; } writel_relaxed(l, reg); }

Contributors

PersonTokensPropCommitsCommitProp
Kevin Hilman4945.37%110.00%
Varadarajan, Charulatha2825.93%330.00%
Tarun Kanti DebBarma2422.22%220.00%
Tony Lindgren43.70%220.00%
Victor Kamensky21.85%110.00%
Javier Martinez Canillas10.93%110.00%
Total108100.00%10100.00%


static inline void omap_set_gpio_irqenable(struct gpio_bank *bank, unsigned offset, int enable) { if (enable) omap_enable_gpio_irqbank(bank, BIT(offset)); else omap_disable_gpio_irqbank(bank, BIT(offset)); }

Contributors

PersonTokensPropCommitsCommitProp
Varadarajan, Charulatha1637.21%116.67%
Tarun Kanti DebBarma1227.91%116.67%
Tony Lindgren613.95%233.33%
Grygorii Strashko613.95%116.67%
Javier Martinez Canillas36.98%116.67%
Total43100.00%6100.00%

/* Use disable_irq_wake() and enable_irq_wake() functions from drivers */
static int omap_gpio_wake_enable(struct irq_data *d, unsigned int enable) { struct gpio_bank *bank = omap_irq_data_get_bank(d); return irq_set_irq_wake(bank->irq, enable); }

Contributors

PersonTokensPropCommitsCommitProp
Varadarajan, Charulatha1645.71%116.67%
Grygorii Strashko925.71%233.33%
Lennert Buytenhek411.43%116.67%
Benoît Cousson411.43%116.67%
Javier Martinez Canillas25.71%116.67%
Total35100.00%6100.00%


static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) { struct gpio_bank *bank = gpiochip_get_data(chip); unsigned long flags; /* * If this is the first gpio_request for the bank, * enable the bank module. */ if (!BANK_USED(bank)) pm_runtime_get_sync(chip->parent); raw_spin_lock_irqsave(&bank->lock, flags); omap_enable_gpio_module(bank, offset); bank->mod_usage |= BIT(offset); raw_spin_unlock_irqrestore(&bank->lock, flags); return 0; }

Contributors

PersonTokensPropCommitsCommitProp
Varadarajan, Charulatha3339.76%214.29%
Javier Martinez Canillas3036.14%428.57%
Tony Lindgren910.84%321.43%
Imre Deak44.82%17.14%
Grygorii Strashko22.41%17.14%
Tarun Kanti DebBarma22.41%17.14%
Sebastian Andrzej Siewior22.41%17.14%
Linus Walleij11.20%17.14%
Total83100.00%14100.00%


static void omap_gpio_free(struct gpio_chip *chip, unsigned offset) { struct gpio_bank *bank = gpiochip_get_data(chip); unsigned long flags; raw_spin_lock_irqsave(&bank->lock, flags); bank->mod_usage &= ~(BIT(offset)); if (!LINE_USED(bank->irq_usage, offset)) { omap_set_gpio_direction(bank, offset, 1); omap_clear_gpio_debounce(bank, offset); } omap_disable_gpio_module(bank, offset); raw_spin_unlock_irqrestore(&bank->lock, flags); /* * If this is the last gpio to be freed in the bank, * disable the bank module. */ if (!BANK_USED(bank)) pm_runtime_put(chip->parent); }

Contributors

PersonTokensPropCommitsCommitProp
Varadarajan, Charulatha4338.05%17.69%
Grygorii Strashko2723.89%215.38%
Tarun Kanti DebBarma1311.50%215.38%
Tony Lindgren108.85%17.69%
Javier Martinez Canillas87.08%323.08%
Kevin Hilman54.42%17.69%
Cory Maccarrone43.54%17.69%
Sebastian Andrzej Siewior21.77%17.69%
Linus Walleij10.88%17.69%
Total113100.00%13100.00%

/* * We need to unmask the GPIO bank interrupt as soon as possible to * avoid missing GPIO interrupts for other lines in the bank. * Then we need to mask-read-clear-unmask the triggered GPIO lines * in the bank to avoid missing nested interrupts for a GPIO line. * If we wait to unmask individual GPIO lines in the bank after the * line's interrupt handler has been run, we may miss some nested * interrupts. */
static irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank) { void __iomem *isr_reg = NULL; u32 enabled, isr, level_mask; unsigned int bit; struct gpio_bank *bank = gpiobank; unsigned long wa_lock_flags; unsigned long lock_flags; isr_reg = bank->base + bank->regs->irqstatus; if (WARN_ON(!isr_reg)) goto exit; pm_runtime_get_sync(bank->chip.parent); while (1) { raw_spin_lock_irqsave(&bank->lock, lock_flags); enabled = omap_get_gpio_irqbank_mask(bank); isr = readl_relaxed(isr_reg) & enabled; if (bank->level_mask) level_mask = bank->level_mask & enabled; else level_mask = 0; /* clear edge sensitive interrupts before handler(s) are called so that we don't miss any interrupt occurred while executing them */ if (isr & ~level_mask) omap_clear_gpio_irqbank(bank, isr & ~level_mask); raw_spin_unlock_irqrestore(&bank->lock, lock_flags); if (!isr) break; while (isr) { bit = __ffs(isr); isr &= ~(BIT(bit)); raw_spin_lock_irqsave(&bank->lock, lock_flags); /* * Some chips can't respond to both rising and falling * at the same time. If this irq was requested with * both flags, we need to flip the ICR data for the IRQ * to respond to the IRQ for the opposite direction. * This will be indicated in the bank toggle_mask. */ if (bank->toggle_mask & (BIT(bit))) omap_toggle_gpio_edge_triggering(bank, bit); raw_spin_unlock_irqrestore(&bank->lock, lock_flags); raw_spin_lock_irqsave(&bank->wa_lock, wa_lock_flags); generic_handle_irq(irq_find_mapping(bank->chip.irqdomain, bit)); raw_spin_unlock_irqrestore(&bank->wa_lock, wa_lock_flags); } } exit: pm_runtime_put(bank->chip.parent); return IRQ_HANDLED; }

Contributors

PersonTokensPropCommitsCommitProp
Grygorii Strashko10337.45%420.00%
Varadarajan, Charulatha8530.91%15.00%
David Brownell279.82%315.00%
Jon Hunter207.27%210.00%
Javier Martinez Canillas134.73%315.00%
Tony Lindgren114.00%15.00%
Tarun Kanti DebBarma93.27%210.00%
Will Deacon31.09%15.00%
Kevin Hilman20.73%15.00%
Victor Kamensky10.36%15.00%
Benoît Cousson10.36%15.00%
Total275100.00%20100.00%


static unsigned int omap_gpio_irq_startup(struct irq_data *d) { struct gpio_bank *bank = omap_irq_data_get_bank(d); unsigned long flags; unsigned offset = d->hwirq; raw_spin_lock_irqsave(&bank->lock, flags); if (!LINE_USED(bank->mod_usage, offset)) omap_set_gpio_direction(bank, offset, 1); else if (!omap_gpio_is_input(bank, offset)) goto err; omap_enable_gpio_module(bank, offset); bank->irq_usage |= BIT(offset); raw_spin_unlock_irqrestore(&bank->lock, flags); omap_gpio_unmask_irq(d); return 0; err: raw_spin_unlock_irqrestore(&bank->lock, flags); return -EINVAL; }

Contributors

PersonTokensPropCommitsCommitProp
Grygorii Strashko6349.22%250.00%
Tony Lindgren6248.44%125.00%
Sebastian Andrzej Siewior32.34%125.00%
Total128100.00%4100.00%


static void omap_gpio_irq_shutdown(struct irq_data *d) { struct gpio_bank *bank = omap_irq_data_get_bank(d); unsigned long flags; unsigned offset = d->hwirq; raw_spin_lock_irqsave(&bank->lock, flags); bank->irq_usage &= ~(BIT(offset)); omap_set_gpio_irqenable(bank, offset, 0); omap_clear_gpio_irqstatus(bank, offset); omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); if (!LINE_USED(bank->mod_usage, offset)) omap_clear_gpio_debounce(bank, offset); omap_disable_gpio_module(bank, offset); raw_spin_unlock_irqrestore(&bank->lock, flags); }

Contributors

PersonTokensPropCommitsCommitProp
Grygorii Strashko4438.26%321.43%
Javier Martinez Canillas2420.87%428.57%
Colin Cross2219.13%17.14%
Varadarajan, Charulatha119.57%17.14%
Lennert Buytenhek54.35%17.14%
David Brownell54.35%214.29%
Tony Lindgren21.74%17.14%
Sebastian Andrzej Siewior21.74%17.14%
Total115100.00%14100.00%


static void omap_gpio_irq_bus_lock(struct irq_data *data) { struct gpio_bank *bank = omap_irq_data_get_bank(data); if (!BANK_USED(bank)) pm_runtime_get_sync(bank->chip.parent); }

Contributors

PersonTokensPropCommitsCommitProp
Grygorii Strashko38100.00%2100.00%
Total38100.00%2100.00%


static void gpio_irq_bus_sync_unlock(struct irq_data *data) { struct gpio_bank *bank = omap_irq_data_get_bank(data); /* * If this is the last IRQ to be freed in the bank, * disable the bank module. */ if (!BANK_USED(bank)) pm_runtime_put(bank->chip.parent); }

Contributors

PersonTokensPropCommitsCommitProp
Grygorii Strashko2358.97%250.00%
Javier Martinez Canillas1538.46%125.00%
Varadarajan, Charulatha12.56%125.00%
Total39100.00%4100.00%


static void omap_gpio_ack_irq(struct irq_data *d) { struct gpio_bank *bank = omap_irq_data_get_bank(d); unsigned offset = d->hwirq; omap_clear_gpio_irqstatus(bank, offset); }

Contributors

PersonTokensPropCommitsCommitProp
Varadarajan, Charulatha1542.86%114.29%
Benoît Cousson514.29%114.29%
Lennert Buytenhek514.29%114.29%
David Brownell411.43%114.29%
Javier Martinez Canillas38.57%114.29%
Grygorii Strashko25.71%114.29%
Jon Hunter12.86%114.29%
Total35100.00%7100.00%


static void omap_gpio_mask_irq(struct irq_data *d) { struct gpio_bank *bank = omap_irq_data_get_bank(d); unsigned offset = d->hwirq; unsigned long flags; raw_spin_lock_irqsave(&bank->lock, flags); omap_set_gpio_irqenable(bank, offset, 0); omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); raw_spin_unlock_irqrestore(&bank->lock, flags); }

Contributors

PersonTokensPropCommitsCommitProp
Colin Cross2231.43%110.00%
David Brownell1825.71%110.00%
Varadarajan, Charulatha811.43%110.00%
Benoît Cousson57.14%110.00%
Lennert Buytenhek57.14%110.00%
Javier Martinez Canillas45.71%110.00%
Grygorii Strashko34.29%110.00%
Sebastian Andrzej Siewior22.86%110.00%
Roger Quadros22.86%110.00%
Jon Hunter11.43%110.00%
Total70100.00%10100.00%


static void omap_gpio_unmask_irq(struct irq_data *d) { struct gpio_bank *bank = omap_irq_data_get_bank(d); unsigned offset = d->hwirq; u32 trigger = irqd_get_trigger_type(d); unsigned long flags; raw_spin_lock_irqsave(&bank->lock, flags); if (trigger) omap_set_gpio_triggering(bank, offset, trigger); /* For level-triggered GPIOs, the clearing must be done after * the HW source is cleared, thus after the handler has run */ if (bank->level_mask & BIT(offset)) { omap_set_gpio_irqenable(bank, offset, 0); omap_clear_gpio_irqstatus(bank, offset); } omap_set_gpio_irqenable(bank, offset, 1); raw_spin_unlock_irqrestore(&bank->lock, flags); }

Contributors

PersonTokensPropCommitsCommitProp
Varadarajan, Charulatha4035.71%216.67%
Colin Cross2118.75%18.33%
Roger Quadros1513.39%18.33%
Grygorii Strashko98.04%18.33%
Javier Martinez Canillas65.36%18.33%
Lennert Buytenhek65.36%18.33%
David Brownell65.36%18.33%
Thomas Gleixner32.68%18.33%
Benoît Cousson32.68%18.33%
Sebastian Andrzej Siewior21.79%18.33%
Jon Hunter10.89%18.33%
Total112100.00%12100.00%

/*---------------------------------------------------------------------*/
static int omap_mpuio_suspend_noirq(struct device *dev) { struct platform_device *pdev = to_platform_device(dev); struct gpio_bank *bank = platform_get_drvdata(pdev); void __iomem *mask_reg = bank->base + OMAP_MPUIO_GPIO_MASKIT / bank->stride; unsigned long flags; raw_spin_lock_irqsave(&bank->lock, flags); writel_relaxed(0xffff & ~bank->context.wake_en, mask_reg); raw_spin_unlock_irqrestore(&bank->lock, flags); return 0; }

Contributors

PersonTokensPropCommitsCommitProp
David Brownell3944.83%116.67%
Varadarajan, Charulatha3843.68%116.67%
Tony Lindgren44.60%116.67%
Tarun Kanti DebBarma33.45%116.67%
Sebastian Andrzej Siewior22.30%116.67%
Victor Kamensky11.15%116.67%
Total87100.00%6100.00%


static int omap_mpuio_resume_noirq(struct device *dev) { struct platform_device *pdev = to_platform_device(dev); struct gpio_bank *bank = platform_get_drvdata(pdev); void __iomem *mask_reg = bank->base + OMAP_MPUIO_GPIO_MASKIT / bank->stride; unsigned long flags; raw_spin_lock_irqsave(&bank->lock, flags); writel_relaxed(bank->context.wake_en, mask_reg); raw_spin_unlock_irqrestore(&bank->lock, flags); return 0; }

Contributors

PersonTokensPropCommitsCommitProp
Felipe Balbi4351.19%116.67%
Varadarajan, Charulatha3136.90%116.67%
Tony Lindgren44.76%116.67%
Tarun Kanti DebBarma33.57%116.67%
Sebastian Andrzej Siewior22.38%116.67%
Victor Kamensky11.19%116.67%
Total84100.00%6100.00%

static const struct dev_pm_ops omap_mpuio_dev_pm_ops = { .suspend_noirq = omap_mpuio_suspend_noirq, .resume_noirq = omap_mpuio_resume_noirq, }; /* use platform_driver for this. */ static struct platform_driver omap_mpuio_driver = { .driver = { .name = "mpuio", .pm = &omap_mpuio_dev_pm_ops, }, }; static struct platform_device omap_mpuio_device = { .name = "mpuio", .id = -1, .dev = { .driver = &omap_mpuio_driver.driver, } /* could list the /proc/iomem resources */ };
static inline void omap_mpuio_init(struct gpio_bank *bank) { platform_set_drvdata(&omap_mpuio_device, bank); if (platform_driver_register(&omap_mpuio_driver) == 0) (void) platform_device_register(&omap_mpuio_device); }

Contributors

PersonTokensPropCommitsCommitProp
Varadarajan, Charulatha2461.54%233.33%
David Brownell1025.64%116.67%
Santosh Shilimkar25.13%116.67%
Syed Mohammed Khasim25.13%116.67%
Javier Martinez Canillas12.56%116.67%
Total39100.00%6100.00%

/*---------------------------------------------------------------------*/
static int omap_gpio_get_direction(struct gpio_chip *chip, unsigned offset) { struct gpio_bank *bank; unsigned long flags; void __iomem *reg; int dir; bank = gpiochip_get_data(chip); reg = bank->base + bank->regs->direction; raw_spin_lock_irqsave(&bank->lock, flags); dir = !!(readl_relaxed(reg) & BIT(offset)); raw_spin_unlock_irqrestore(&bank->lock, flags); return dir; }

Contributors

PersonTokensPropCommitsCommitProp
Yegor Yefremov8595.51%125.00%
Sebastian Andrzej Siewior22.25%125.00%
Linus Walleij11.12%125.00%
Javier Martinez Canillas11.12%125.00%
Total89100.00%4100.00%


static int omap_gpio_input(struct gpio_chip *chip, unsigned offset) { struct gpio_bank *bank; unsigned long flags; bank = gpiochip_get_data(chip); raw_spin_lock_irqsave(&bank->lock, flags); omap_set_gpio_direction(bank, offset, 1); raw_spin_unlock_irqrestore(&bank->lock, flags); return 0; }

Contributors

PersonTokensPropCommitsCommitProp
Varadarajan, Charulatha3556.45%225.00%
Tony Lindgren2032.26%225.00%
Javier Martinez Canillas23.23%112.50%
Sebastian Andrzej Siewior23.23%112.50%
Syed Mohammed Khasim23.23%112.50%
Linus Walleij11.61%112.50%
Total62100.00%8100.00%


static int omap_gpio_get(struct gpio_chip *chip, unsigned offset) { struct gpio_bank *bank; bank = gpiochip_get_data(chip); if (omap_gpio_is_input(bank, offset)) return omap_get_gpio_datain(bank, offset); else return omap_get_gpio_dataout(bank, offset); }

Contributors

PersonTokensPropCommitsCommitProp
Varadarajan, Charulatha3261.54%333.33%
Syed Mohammed Khasim1019.23%111.11%
Javier Martinez Canillas47.69%111.11%
Tarun Kanti DebBarma23.85%111.11%
Tony Lindgren23.85%111.11%
Linus Walleij11.92%111.11%
Grygorii Strashko11.92%111.11%
Total52100.00%9100.00%


static int omap_gpio_output(struct gpio_chip *chip, unsigned offset, int value) { struct gpio_bank *bank; unsigned long flags; bank = gpiochip_get_data(chip); raw_spin_lock_irqsave(&bank->lock, flags); bank->set_dataout(bank, offset, value); omap_set_gpio_direction(bank, offset, 0); raw_spin_unlock_irqrestore(&bank->lock, flags); return 0; }

Contributors

PersonTokensPropCommitsCommitProp
Varadarajan, Charulatha5471.05%225.00%
Syed Mohammed Khasim1317.11%112.50%
Javier Martinez Canillas33.95%225.00%
Kevin Hilman33.95%112.50%
Sebastian Andrzej Siewior22.63%112.50%
Linus Walleij11.32%112.50%
Total76100.00%8100.00%


static int omap_gpio_debounce(struct gpio_chip *chip, unsigned offset, unsigned debounce) { struct gpio_bank *bank; unsigned long flags; int ret; bank = gpiochip_get_data(chip); raw_spin_lock_irqsave(&bank->lock, flags); ret = omap2_set_gpio_debounce(bank, offset, debounce); raw_spin_unlock_irqrestore(&bank->lock, flags); if (ret) dev_info(chip->parent, "Could not set line %u debounce to %u microseconds (%d)", offset, debounce, ret); return ret; }

Contributors

PersonTokensPropCommitsCommitProp
Varadarajan, Charulatha5460.67%220.00%
David Rivshin2528.09%110.00%
Tony Lindgren33.37%220.00%
Sebastian Andrzej Siewior22.25%110.00%
Javier Martinez Canillas22.25%110.00%
Syed Mohammed Khasim11.12%110.00%
Zebediah C. McClure11.12%110.00%
Linus Walleij11.12%110.00%
Total89100.00%10100.00%


static int omap_gpio_set_config(struct gpio_chip *chip, unsigned offset, unsigned long config) { u32 debounce; if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE) return -ENOTSUPP; debounce = pinconf_to_config_argument(config); return omap_gpio_debounce(chip, offset, debounce); }

Contributors

PersonTokensPropCommitsCommitProp
Mika Westerberg51100.00%1100.00%
Total51100.00%1100.00%


static void omap_gpio_set(struct gpio_chip *chip, unsigned offset, int value) { struct gpio_bank *bank; unsigned long flags; bank = gpiochip_get_data(chip); raw_spin_lock_irqsave(&bank->lock, flags); bank->set_dataout(bank, offset, value); raw_spin_unlock_irqrestore(&bank->lock, flags); }

Contributors

PersonTokensPropCommitsCommitProp
Varadarajan, Charulatha5382.81%222.22%
Kevin Hilman34.69%111.11%
Syed Mohammed Khasim34.69%222.22%
Sebastian Andrzej Siewior23.12%111.11%
Linus Walleij11.56%111.11%
Javier Martinez Canillas11.56%111.11%
Tony Lindgren11.56%111.11%
Total64100.00%9100.00%

/*---------------------------------------------------------------------*/
static void omap_gpio_show_rev(struct gpio_bank *bank) { static bool called; u32 rev; if (called || bank->regs->revision == USHRT_MAX) return; rev = readw_relaxed(bank->base + bank->regs->revision); pr_info("OMAP GPIO hardware version %d.%d\n", (rev >> 4) & 0x0f, rev & 0x0f); called = true; }

Contributors

PersonTokensPropCommitsCommitProp
Varadarajan, Charulatha4465.67%233.33%
Kevin Hilman1928.36%116.67%
Santosh Shilimkar22.99%116.67%
Victor Kamensky11.49%116.67%
Tony Lindgren11.49%116.67%
Total67100.00%6100.00%


static void omap_gpio_mod_init(struct gpio_bank *bank) { void __iomem *base = bank->base; u32 l = 0xffffffff; if (bank->width == 16) l = 0xffff; if (bank->is_mpuio) { writel_relaxed(l, bank->base + bank->regs->irqenable); return; } omap_gpio_rmw(base, bank->regs->irqenable, l, bank->regs->irqenable_inv); omap_gpio_rmw(base, bank->regs->irqstatus, l, !bank->regs->irqenable_inv); if (bank->regs->debounce_en) writel_relaxed(0, base + bank->regs->debounce_en); /* Save OE default value (0xffffffff) in the context */ bank->context.oe = readl_relaxed(bank->base + bank->regs->direction); /* Initialize interface clk ungated, module enabled */ if (bank->regs->ctrl) writel_relaxed(0, base + bank->regs->ctrl); }

Contributors

PersonTokensPropCommitsCommitProp
Tarun Kanti DebBarma8652.76%325.00%
Varadarajan, Charulatha5634.36%325.00%
Tony Lindgren137.98%325.00%
Victor Kamensky42.45%18.33%
Syed Rafiuddin21.23%18.33%
Javier Martinez Canillas21.23%18.33%
Total163100.00%12100.00%


static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc) { static int gpio; int irq_base = 0; int ret; /* * REVISIT eventually switch from OMAP-specific gpio structs * over to the generic ones */ bank->chip.request = omap_gpio_request; bank->chip.free = omap_gpio_free; bank->chip.get_direction = omap_gpio_get_direction; bank->chip.direction_input = omap_gpio_input; bank->chip.get = omap_gpio_get; bank->chip.direction_output = omap_gpio_output; bank->chip.set_config = omap_gpio_set_config; bank->chip.set = omap_gpio_set; if (bank->is_mpuio) { bank->chip.label = "mpuio"; if (bank->regs->wkup_en) bank->chip.parent = &omap_mpuio_device.dev; bank->chip.base = OMAP_MPUIO(0); } else { bank->chip.label = "gpio"; bank->chip.base = gpio; } bank->chip.ngpio = bank->width; ret = gpiochip_add_data(&bank->chip, bank); if (ret) { dev_err(bank->chip.parent, "Could not register gpio chip %d\n", ret); return ret; } if (!bank->is_mpuio) gpio += bank->width; #ifdef CONFIG_ARCH_OMAP1 /* * REVISIT: Once we have OMAP1 supporting SPARSE_IRQ, we can drop * irq_alloc_descs() since a base IRQ offset will no longer be needed. */ irq_base = devm_irq_alloc_descs(bank->chip.parent, -1, 0, bank->width, 0); if (irq_base < 0) { dev_err(bank->chip.parent, "Couldn't allocate IRQ numbers\n"); return -ENODEV; } #endif /* MPUIO is a bit different, reading IRQ status clears it */ if (bank->is_mpuio) { irqc->irq_ack = dummy_irq_chip.irq_ack; if (!bank->regs->wkup_en) irqc->irq_set_wake = NULL; } ret = gpiochip_irqchip_add(&bank->chip, irqc, irq_base, handle_bad_irq, IRQ_TYPE_NONE); if (ret) { dev_err(bank->chip.parent, "Couldn't add irqchip to gpiochip %d\n", ret); gpiochip_remove(&bank->chip); return -ENODEV; } gpiochip_set_chained_irqchip(&bank->chip, irqc, bank->irq, NULL); ret = devm_request_irq(bank->chip.parent, bank->irq, omap_gpio_irq_handler, 0, dev_name(bank->chip.parent), bank); if (ret) gpiochip_remove(&bank->chip); return ret; }

Contributors

PersonTokensPropCommitsCommitProp
Javier Martinez Canillas13733.58%315.79%
Varadarajan, Charulatha13232.35%315.79%
Grygorii Strashko5312.99%210.53%
Tony Lindgren4511.03%210.53%
Tarun Kanti DebBarma81.96%15.26%
Bartosz Golaszewski71.72%15.26%
Nishanth Menon71.72%15.26%
Yegor Yefremov71.72%15.26%
Linus Walleij40.98%210.53%
Syed Rafiuddin30.74%15.26%
Kevin Hilman30.74%15.26%
Mika Westerberg20.49%15.26%
Total408100.00%19100.00%

static const struct of_device_id omap_gpio_match[];
static int omap_gpio_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct device_node *node = dev->of_node; const struct of_device_id *match; const struct omap_gpio_platform_data *pdata; struct resource *res; struct gpio_bank *bank; struct irq_chip *irqc; int ret; match = of_match_device(of_match_ptr(omap_gpio_match), dev); pdata = match ? match->data : dev_get_platdata(dev); if (!pdata) return -EINVAL; bank = devm_kzalloc(dev, sizeof(struct gpio_bank), GFP_KERNEL); if (!bank) { dev_err(dev, "Memory alloc failed\n"); return -ENOMEM; } irqc = devm_kzalloc(dev, sizeof(*irqc), GFP_KERNEL); if (!irqc) return -ENOMEM; irqc->irq_startup = omap_gpio_irq_startup, irqc->irq_shutdown = omap_gpio_irq_shutdown, irqc->irq_ack = omap_gpio_ack_irq, irqc->irq_mask = omap_gpio_mask_irq, irqc->irq_unmask = omap_gpio_unmask_irq, irqc->irq_set_type = omap_gpio_irq_type, irqc->irq_set_wake = omap_gpio_wake_enable, irqc->irq_bus_lock = omap_gpio_irq_bus_lock, irqc->irq_bus_sync_unlock = gpio_irq_bus_sync_unlock, irqc->name = dev_name(&pdev->dev); irqc->flags = IRQCHIP_MASK_ON_SUSPEND; bank->irq = platform_get_irq(pdev, 0); if (bank->irq <= 0) { if (!bank->irq) bank->irq = -ENXIO; if (bank->irq != -EPROBE_DEFER) dev_err(dev, "can't get irq resource ret=%d\n", bank->irq); return bank->irq; } bank->chip.parent = dev; bank->chip.owner = THIS_MODULE; bank->dbck_flag = pdata->dbck_flag; bank->stride = pdata->bank_stride; bank->width = pdata->bank_width; bank->is_mpuio = pdata->is_mpuio; bank->non_wakeup_gpios = pdata->non_wakeup_gpios; bank->regs = pdata->regs; #ifdef CONFIG_OF_GPIO bank->chip.of_node = of_node_get(node); #endif if (node) { if (!of_property_read_bool(node, "ti,gpio-always-on")) bank->loses_context = true; } else { bank->loses_context = pdata->loses_context; if (bank->loses_context) bank->get_context_loss_count = pdata->get_context_loss_count; } if (bank->regs->set_dataout && bank->regs->clr_dataout) bank->set_dataout = omap_set_gpio_dataout_reg; else bank->set_dataout = omap_set_gpio_dataout_mask; raw_spin_lock_init(&bank->lock); raw_spin_lock_init(&bank->wa_lock); /* Static mapping, never released */ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); bank->base = devm_ioremap_resource(dev, res); if (IS_ERR(bank->base)) { return PTR_ERR(bank->base); } if (bank->dbck_flag) { bank->dbck = devm_clk_get(dev, "dbclk"); if (IS_ERR(bank->dbck)) { dev_err(dev, "Could not get gpio dbck. Disable debounce\n"); bank->dbck_flag = false; } else { clk_prepare(bank->dbck); } } platform_set_drvdata(pdev, bank); pm_runtime_enable(dev); pm_runtime_irq_safe(dev); pm_runtime_get_sync(dev); if (bank->is_mpuio) omap_mpuio_init(bank); omap_gpio_mod_init(bank); ret = omap_gpio_chip_init(bank, irqc); if (ret) { pm_runtime_put_sync(dev); pm_runtime_disable(dev); if (bank->dbck_flag) clk_unprepare(bank->dbck); return ret; } omap_gpio_show_rev(bank); pm_runtime_put(dev); list_add_tail(&bank->node, &omap_gpio_list); return 0; }

Contributors

PersonTokensPropCommitsCommitProp
Varadarajan, Charulatha14622.43%511.11%
Grygorii Strashko12619.35%613.33%
Benoît Cousson8813.52%36.67%
Nishanth Menon7912.14%12.22%
Jon Hunter395.99%36.67%
Tony Lindgren365.53%613.33%
Kevin Hilman365.53%24.44%
Tarun Kanti DebBarma253.84%36.67%
Javier Martinez Canillas223.38%48.89%
David Brownell142.15%511.11%
Arvind Yadav132.00%12.22%
Jingoo Han132.00%24.44%
Jouni Högander111.69%12.22%
Linus Walleij10.15%12.22%
Uwe Kleine-König10.15%12.22%
Sebastian Andrzej Siewior10.15%12.22%
Total651100.00%45100.00%


static int omap_gpio_remove(struct platform_device *pdev) { struct gpio_bank *bank = platform_get_drvdata(pdev); list_del(&bank->node); gpiochip_remove(&bank->chip); pm_runtime_disable(&pdev->dev); if (bank->dbck_flag) clk_unprepare(bank->dbck); return 0; }

Contributors

PersonTokensPropCommitsCommitProp
Tony Lindgren4675.41%133.33%
Grygorii Strashko1524.59%266.67%
Total61100.00%3100.00%

#ifdef CONFIG_ARCH_OMAP2PLUS #if defined(CONFIG_PM) static void omap_gpio_restore_context(struct gpio_bank *bank);
static int omap_gpio_runtime_suspend(struct device *dev) { struct platform_device *pdev = to_platform_device(dev); struct gpio_bank *bank = platform_get_drvdata(pdev); u32 l1 = 0, l2 = 0; unsigned long flags; u32 wake_low, wake_hi; raw_spin_lock_irqsave(&bank->lock, flags); /* * Only edges can generate a wakeup event to the PRCM. * * Therefore, ensure any wake-up capable GPIOs have * edge-detection enabled before going idle to ensure a wakeup * to the PRCM is generated on a GPIO transition. (c.f. 34xx * NDA TRM 25.5.3.1) * * The normal values will be restored upon ->runtime_resume() * by writing back the values saved in bank->context. */ wake_low = bank->context.leveldetect0 & bank->context.wake_en; if (wake_low) writel_relaxed(wake_low | bank->context.fallingdetect, bank->base + bank->regs->fallingdetect); wake_hi = bank->context.leveldetect1 & bank->context.wake_en; if (wake_hi) writel_relaxed(wake_hi | bank->context.risingdetect, bank->base + bank->regs->risingdetect); if (!bank->enabled_non_wakeup_gpios) goto update_gpio_context_count; if (bank->power_mode != OFF_MODE) { bank->power_mode = 0; goto update_gpio_context_count; } /* * If going to OFF, remove triggering for all * non-wakeup GPIOs. Otherwise spurious IRQs will be * generated. See OMAP2420 Errata item 1.101. */ bank->saved_datain = readl_relaxed(bank->base + bank->regs->datain); l1 = bank->context.fallingdetect; l2 = bank->context.risingdetect; l1 &= ~bank->enabled_non_wakeup_gpios; l2 &= ~bank->enabled_non_wakeup_gpios; writel_relaxed(l1, bank->base + bank->regs->fallingdetect); writel_relaxed(l2, bank->base + bank->regs->risingdetect); bank->workaround_enabled = true; update_gpio_context_count: if (bank->get_context_loss_count) bank->context_loss_count = bank->get_context_loss_count(dev); omap_gpio_dbck_disable(bank); raw_spin_unlock_irqrestore(&bank->lock, flags); return 0; }

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PersonTokensPropCommitsCommitProp
Kevin Hilman10235.42%526.32%
Tarun Kanti DebBarma10034.72%736.84%
Juha Yrjölä5418.75%15.26%
Syed Rafiuddin186.25%15.26%
Victor Kamensky51.74%15.26%
Sanjeev Premi41.39%15.26%
Sebastian Andrzej Siewior20.69%15.26%
Varadarajan, Charulatha20.69%15.26%
Javier Martinez Canillas10.35%15.26%
Total288100.00%19100.00%

static void omap_gpio_init_context(struct gpio_bank *p);
static int omap_gpio_runtime_resume(struct device *dev) { struct platform_device *pdev = to_platform_device(dev); struct gpio_bank *bank = platform_get_drvdata(pdev); u32 l = 0, gen, gen0, gen1; unsigned long flags; int c; raw_spin_lock_irqsave(&bank->lock, flags); /* * On the first resume during the probe, the context has not * been initialised and so initialise it now. Also initialise * the context loss count. */ if (bank->loses_context && !bank->context_valid) { omap_gpio_init_context(bank); if (bank->get_context_loss_count) bank->context_loss_count = bank->get_context_loss_count(dev); } omap_gpio_dbck_enable(bank); /* * In ->runtime_suspend(), level-triggered, wakeup-enabled * GPIOs were set to edge trigger also in order to be able to * generate a PRCM wakeup. Here we restore the * pre-runtime_suspend() values for edge triggering. */ writel_relaxed(bank->context.fallingdetect, bank->base + bank->regs->fallingdetect); writel_relaxed(bank->context.risingdetect, bank->base + bank->regs->risingdetect); if (bank->loses_context) { if (!bank->get_context_loss_count) { omap_gpio_restore_context(bank); } else { c = bank->get_context_loss_count(dev); if (c != bank->context_loss_count) { omap_gpio_restore_context(bank); } else { raw_spin_unlock_irqrestore(&bank->lock, flags); return 0; } } } if (!bank->workaround_enabled) { raw_spin_unlock_irqrestore(&bank->lock, flags); return 0; } l = readl_relaxed(bank->base + bank->regs->datain); /* * Check if any of the non-wakeup interrupt GPIOs have changed * state. If so, generate an IRQ by software. This is * horribly racy, but it's the best we can do to work around * this silicon bug. */ l ^= bank->saved_datain; l &= bank->enabled_non_wakeup_gpios; /* * No need to generate IRQs for the rising edge for gpio IRQs * configured with falling edge only; and vice versa. */ gen0 = l & bank->context.fallingdetect; gen0 &= bank->saved_datain; gen1 = l & bank->context.risingdetect; gen1 &= ~(bank->saved_datain); /* FIXME: Consider GPIO IRQs with level detections properly! */ gen = l & (~(bank->context.fallingdetect) & ~(bank->context.risingdetect)); /* Consider all GPIO IRQs needed to be updated */ gen |= gen0 | gen1; if (gen) { u32 old0, old1; old0 = readl_relaxed(bank->base + bank->regs->leveldetect0); old1 = readl_relaxed(bank->base + bank->regs->leveldetect1); if (!bank->regs->irqstatus_raw0) { writel_relaxed(old0 | gen, bank->base + bank->regs->leveldetect0); writel_relaxed(old1 | gen, bank->base + bank->regs->leveldetect1); } if (bank->regs->irqstatus_raw0) { writel_relaxed(old0 | l, bank->base + bank->regs->leveldetect0); writel_relaxed(old1 | l, bank->base + bank->regs->leveldetect1); } writel_relaxed(old0, bank->base + bank->regs->leveldetect0); writel_relaxed(old1, bank->base + bank->regs->leveldetect1); } bank->workaround_enabled = false; raw_spin_unlock_irqrestore(&bank->lock, flags); return 0; }

Contributors

PersonTokensPropCommitsCommitProp
Tarun Kanti DebBarma21542.91%730.43%
Juha Yrjölä6813.57%14.35%
Eero Nurkkala6212.38%14.35%
Jon Hunter5811.58%28.70%
Kevin Hilman469.18%417.39%
Syed Rafiuddin254.99%14.35%
Victor Kamensky112.20%14.35%
Tony Lindgren61.20%14.35%
Sebastian Andrzej Siewior40.80%14.35%
Varadarajan, Charulatha20.40%14.35%
Sanjeev Premi20.40%14.35%
Javier Martinez Canillas10.20%14.35%
Tero Kristo10.20%14.35%
Total501100.00%23100.00%

#endif /* CONFIG_PM */ #if IS_BUILTIN(CONFIG_GPIO_OMAP)
void omap2_gpio_prepare_for_idle(int pwr_mode) { struct gpio_bank *bank; list_for_each_entry(bank, &omap_gpio_list, node) { if (!BANK_USED(bank) || !bank->loses_context) continue; bank->power_mode = pwr_mode; pm_runtime_put_sync_suspend(bank->chip.parent); } }

Contributors

PersonTokensPropCommitsCommitProp
Tarun Kanti DebBarma4484.62%125.00%
Javier Martinez Canillas35.77%125.00%
Grygorii Strashko35.77%125.00%
Juha Yrjölä23.85%125.00%
Total52100.00%4100.00%


void omap2_gpio_resume_after_idle(void) { struct gpio_bank *bank; list_for_each_entry(bank, &omap_gpio_list, node) { if (!BANK_USED(bank) || !bank->loses_context) continue; pm_runtime_get_sync(bank->chip.parent); } }

Contributors

PersonTokensPropCommitsCommitProp
Tarun Kanti DebBarma3986.67%133.33%
Grygorii Strashko36.67%133.33%
Javier Martinez Canillas36.67%133.33%
Total45100.00%3100.00%

#endif #if defined(CONFIG_PM)
static void omap_gpio_init_context(struct gpio_bank *p) { struct omap_gpio_reg_offs *regs = p->regs; void __iomem *base = p->base; p->context.ctrl = readl_relaxed(base + regs->ctrl); p->context.oe = readl_relaxed(base + regs->direction); p->context.wake_en = readl_relaxed(base + regs->wkup_en); p->context.leveldetect0 = readl_relaxed(base + regs->leveldetect0); p->context.leveldetect1 = readl_relaxed(base + regs->leveldetect1); p->context.risingdetect = readl_relaxed(base + regs->risingdetect); p->context.fallingdetect = readl_relaxed(base + regs->fallingdetect); p->context.irqenable1 = readl_relaxed(base + regs->irqenable); p->context.irqenable2 = readl_relaxed(base + regs->irqenable2); if (regs->set_dataout && p->regs->clr_dataout) p->context.dataout = readl_relaxed(base + regs->set_dataout); else p->context.dataout = readl_relaxed(base + regs->dataout); p->context_valid = true; }

Contributors

PersonTokensPropCommitsCommitProp
Jon Hunter20294.84%150.00%
Victor Kamensky115.16%150.00%
Total213100.00%2100.00%


static void omap_gpio_restore_context(struct gpio_bank *bank) { writel_relaxed(bank->context.wake_en, bank->base + bank->regs->wkup_en); writel_relaxed(bank->context.ctrl, bank->base + bank->regs->ctrl); writel_relaxed(bank->context.leveldetect0, bank->base + bank->regs->leveldetect0); writel_relaxed(bank->context.leveldetect1, bank->base + bank->regs->leveldetect1); writel_relaxed(bank->context.risingdetect, bank->base + bank->regs->risingdetect); writel_relaxed(bank->context.fallingdetect, bank->base + bank->regs->fallingdetect); if (bank->regs->set_dataout && bank->regs->clr_dataout) writel_relaxed(bank->context.dataout, bank->base + bank->regs->set_dataout); else writel_relaxed(bank->context.dataout, bank->base + bank->regs->dataout); writel_relaxed(bank->context.oe, bank->base + bank->regs->direction); if (bank->dbck_enable_mask) { writel_relaxed(bank->context.debounce, bank->base + bank->regs->debounce); writel_relaxed(bank->context.debounce_en, bank->base + bank->regs->debounce_en); } writel_relaxed(bank->context.irqenable1, bank->base + bank->regs->irqenable); writel_relaxed(bank->context.irqenable2, bank->base + bank->regs->irqenable2); }

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PersonTokensPropCommitsCommitProp
Nishanth Menon9834.88%440.00%
Rajendra Nayak9734.52%110.00%
Tarun Kanti DebBarma4214.95%220.00%
Varadarajan, Charulatha3111.03%220.00%
Victor Kamensky134.63%110.00%
Total281100.00%10100.00%

#endif /* CONFIG_PM */ #else #define omap_gpio_runtime_suspend NULL #define omap_gpio_runtime_resume NULL
static inline void omap_gpio_init_context(struct gpio_bank *p) {}

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PersonTokensPropCommitsCommitProp
Jon Hunter1090.91%150.00%
Arnd Bergmann19.09%150.00%
Total11100.00%2100.00%

#endif static const struct dev_pm_ops gpio_pm_ops = { SET_RUNTIME_PM_OPS(omap_gpio_runtime_suspend, omap_gpio_runtime_resume, NULL) }; #if defined(CONFIG_OF) static struct omap_gpio_reg_offs omap2_gpio_regs = { .revision = OMAP24XX_GPIO_REVISION, .direction = OMAP24XX_GPIO_OE, .datain = OMAP24XX_GPIO_DATAIN, .dataout = OMAP24XX_GPIO_DATAOUT, .set_dataout = OMAP24XX_GPIO_SETDATAOUT, .clr_dataout = OMAP24XX_GPIO_CLEARDATAOUT, .irqstatus = OMAP24XX_GPIO_IRQSTATUS1, .irqstatus2 = OMAP24XX_GPIO_IRQSTATUS2, .irqenable = OMAP24XX_GPIO_IRQENABLE1, .irqenable2 = OMAP24XX_GPIO_IRQENABLE2, .set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1, .clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1, .debounce = OMAP24XX_GPIO_DEBOUNCE_VAL, .debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN, .ctrl = OMAP24XX_GPIO_CTRL, .wkup_en = OMAP24XX_GPIO_WAKE_EN, .leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0, .leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1, .risingdetect = OMAP24XX_GPIO_RISINGDETECT, .fallingdetect = OMAP24XX_GPIO_FALLINGDETECT, }; static struct omap_gpio_reg_offs omap4_gpio_regs = { .revision = OMAP4_GPIO_REVISION, .direction = OMAP4_GPIO_OE, .datain = OMAP4_GPIO_DATAIN, .dataout = OMAP4_GPIO_DATAOUT, .set_dataout = OMAP4_GPIO_SETDATAOUT, .clr_dataout = OMAP4_GPIO_CLEARDATAOUT, .irqstatus = OMAP4_GPIO_IRQSTATUS0, .irqstatus2 = OMAP4_GPIO_IRQSTATUS1, .irqenable = OMAP4_GPIO_IRQSTATUSSET0, .irqenable2 = OMAP4_GPIO_IRQSTATUSSET1, .set_irqenable = OMAP4_GPIO_IRQSTATUSSET0, .clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0, .debounce = OMAP4_GPIO_DEBOUNCINGTIME, .debounce_en = OMAP4_GPIO_DEBOUNCENABLE, .ctrl = OMAP4_GPIO_CTRL, .wkup_en = OMAP4_GPIO_IRQWAKEN0, .leveldetect0 = OMAP4_GPIO_LEVELDETECT0, .leveldetect1 = OMAP4_GPIO_LEVELDETECT1, .risingdetect = OMAP4_GPIO_RISINGDETECT, .fallingdetect = OMAP4_GPIO_FALLINGDETECT, }; static const struct omap_gpio_platform_data omap2_pdata = { .regs = &omap2_gpio_regs, .bank_width = 32, .dbck_flag = false, }; static const struct omap_gpio_platform_data omap3_pdata = { .regs = &omap2_gpio_regs, .bank_width = 32, .dbck_flag = true, }; static const struct omap_gpio_platform_data omap4_pdata = { .regs = &omap4_gpio_regs, .bank_width = 32, .dbck_flag = true, }; static const struct of_device_id omap_gpio_match[] = { { .compatible = "ti,omap4-gpio", .data = &omap4_pdata, }, { .compatible = "ti,omap3-gpio", .data = &omap3_pdata, }, { .compatible = "ti,omap2-gpio", .data = &omap2_pdata, }, { }, }; MODULE_DEVICE_TABLE(of, omap_gpio_match); #endif static struct platform_driver omap_gpio_driver = { .probe = omap_gpio_probe, .remove = omap_gpio_remove, .driver = { .name = "omap_gpio", .pm = &gpio_pm_ops, .of_match_table = of_match_ptr(omap_gpio_match), }, }; /* * gpio driver register needs to be done before * machine_init functions access gpio APIs. * Hence omap_gpio_drv_reg() is a postcore_initcall. */
static int __init omap_gpio_drv_reg(void) { return platform_driver_register(&omap_gpio_driver); }

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PersonTokensPropCommitsCommitProp
Tony Lindgren850.00%133.33%
Varadarajan, Charulatha743.75%133.33%
David Brownell16.25%133.33%
Total16100.00%3100.00%

postcore_initcall(omap_gpio_drv_reg);
static void __exit omap_gpio_exit(void) { platform_driver_unregister(&omap_gpio_driver); }

Contributors

PersonTokensPropCommitsCommitProp
Tony Lindgren15100.00%1100.00%
Total15100.00%1100.00%

module_exit(omap_gpio_exit); MODULE_DESCRIPTION("omap gpio driver"); MODULE_ALIAS("platform:gpio-omap"); MODULE_LICENSE("GPL v2");

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Varadarajan, Charulatha176422.30%116.43%
Tarun Kanti DebBarma113214.31%2313.45%
Javier Martinez Canillas7249.15%84.68%
Tony Lindgren6968.80%148.19%
Grygorii Strashko6237.87%2212.87%
Kevin Hilman4926.22%1810.53%
Benoît Cousson4826.09%42.34%
Jon Hunter4786.04%74.09%
Nishanth Menon2142.70%52.92%
Juha Yrjölä1632.06%10.58%
David Brownell1561.97%116.43%
Rajendra Nayak991.25%10.58%
Yegor Yefremov951.20%10.58%
Victor Kamensky941.19%10.58%
Colin Cross700.88%21.17%
Eero Nurkkala620.78%10.58%
Syed Rafiuddin600.76%10.58%
Cory Maccarrone540.68%10.58%
Mika Westerberg530.67%10.58%
Imre Deak470.59%21.17%
David Rivshin460.58%10.58%
Felipe Balbi450.57%10.58%
Sebastian Andrzej Siewior380.48%10.58%
Syed Mohammed Khasim340.43%21.17%
Grazvydas Ignotas310.39%10.58%
Lennert Buytenhek310.39%10.58%
Roger Quadros190.24%21.17%
Jouni Högander160.20%10.58%
Linus Walleij140.18%21.17%
Jingoo Han130.16%21.17%
Arvind Yadav130.16%10.58%
Bartosz Golaszewski70.09%10.58%
Rafael J. Wysocki60.08%21.17%
Sanjeev Premi60.08%10.58%
Thomas Gleixner50.06%21.17%
Alistair Buxton40.05%10.58%
Santosh Shilimkar40.05%10.58%
Jarkko Nikula30.04%10.58%
Zebediah C. McClure30.04%10.58%
Will Deacon30.04%10.58%
Chen Gang S30.04%10.58%
Catalin Marinas20.03%10.58%
Russell King20.03%21.17%
Arnd Bergmann10.01%10.58%
Axel Lin10.01%10.58%
Tero Kristo10.01%10.58%
Uwe Kleine-König10.01%10.58%
Hiroshi Doyu10.01%10.58%
Janusz Krzysztofik10.01%10.58%
Total7912100.00%171100.00%
Directory: drivers/gpio
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