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Release 4.14 drivers/perf/arm_pmu.c

Directory: drivers/perf

#undef DEBUG

/*
 * ARM performance counter support.
 *
 * Copyright (C) 2009 picoChip Designs, Ltd., Jamie Iles
 * Copyright (C) 2010 ARM Ltd., Will Deacon <will.deacon@arm.com>
 *
 * This code is based on the sparc64 perf event code, which is in turn based
 * on the x86 code.
 */

#define pr_fmt(fmt) "hw perfevents: " fmt

#include <linux/bitmap.h>
#include <linux/cpumask.h>
#include <linux/cpu_pm.h>
#include <linux/export.h>
#include <linux/kernel.h>
#include <linux/perf/arm_pmu.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/sched/clock.h>
#include <linux/spinlock.h>
#include <linux/irq.h>
#include <linux/irqdesc.h>

#include <asm/irq_regs.h>

static int

armpmu_map_cache_event(const unsigned (*cache_map)
				      [PERF_COUNT_HW_CACHE_MAX]
				      [PERF_COUNT_HW_CACHE_OP_MAX]
				      [PERF_COUNT_HW_CACHE_RESULT_MAX],
		       u64 config)
{
	unsigned int cache_type, cache_op, cache_result, ret;

	cache_type = (config >>  0) & 0xff;
	if (cache_type >= PERF_COUNT_HW_CACHE_MAX)
		return -EINVAL;

	cache_op = (config >>  8) & 0xff;
	if (cache_op >= PERF_COUNT_HW_CACHE_OP_MAX)
		return -EINVAL;

	cache_result = (config >> 16) & 0xff;
	if (cache_result >= PERF_COUNT_HW_CACHE_RESULT_MAX)
		return -EINVAL;

	if (!cache_map)
		return -ENOENT;

	ret = (int)(*cache_map)[cache_type][cache_op][cache_result];

	if (ret == CACHE_OP_UNSUPPORTED)
		return -ENOENT;

	return ret;
}

static int

armpmu_map_hw_event(const unsigned (*event_map)[PERF_COUNT_HW_MAX], u64 config)
{
	int mapping;

	if (config >= PERF_COUNT_HW_MAX)
		return -EINVAL;

	if (!event_map)
		return -ENOENT;

	mapping = (*event_map)[config];
	return mapping == HW_OP_UNSUPPORTED ? -ENOENT : mapping;
}



static int

armpmu_map_raw_event(u32 raw_event_mask, u64 config)
{
	return (int)(config & raw_event_mask);
}


Contributors
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Will Deacon1986.36%150.00%


Mark Rutland313.64%150.00%


Total22100.00%2100.00%



int

armpmu_map_event(struct perf_event *event,
		 const unsigned (*event_map)[PERF_COUNT_HW_MAX],
		 const unsigned (*cache_map)
				[PERF_COUNT_HW_CACHE_MAX]
				[PERF_COUNT_HW_CACHE_OP_MAX]
				[PERF_COUNT_HW_CACHE_RESULT_MAX],
		 u32 raw_event_mask)
{
	u64 config = event->attr.config;
	int type = event->attr.type;

	if (type == event->pmu->type)
		return armpmu_map_raw_event(raw_event_mask, config);

	switch (type) {
	case PERF_TYPE_HARDWARE:
		return armpmu_map_hw_event(event_map, config);
	case PERF_TYPE_HW_CACHE:
		return armpmu_map_cache_event(cache_map, config);
	case PERF_TYPE_RAW:
		return armpmu_map_raw_event(raw_event_mask, config);
	}

	return -ENOENT;
}




int armpmu_event_set_period(struct perf_event *event)
{
	struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
	struct hw_perf_event *hwc = &event->hw;
	s64 left = local64_read(&hwc->period_left);
	s64 period = hwc->sample_period;
	int ret = 0;

	if (unlikely(left <= -period)) {
		left = period;
		local64_set(&hwc->period_left, left);
		hwc->last_period = period;
		ret = 1;
	}

	if (unlikely(left <= 0)) {
		left += period;
		local64_set(&hwc->period_left, left);
		hwc->last_period = period;
		ret = 1;
	}

	/*
         * Limit the maximum period to prevent the counter value
         * from overtaking the one we are about to program. In
         * effect we are reducing max_period to account for
         * interrupt latency (and we are being very conservative).
         */
	if (left > (armpmu->max_period >> 1))
		left = armpmu->max_period >> 1;

	local64_set(&hwc->prev_count, (u64)-left);

	armpmu->write_counter(event, (u64)(-left) & 0xffffffff);

	perf_event_update_userpage(event);

	return ret;
}


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Jamie Iles15281.72%120.00%


Mark Rutland126.45%120.00%


Sudeep KarkadaNagesha126.45%120.00%


Daniel R Thompson63.23%120.00%


Peter Zijlstra42.15%120.00%


Total186100.00%5100.00%






u64 armpmu_event_update(struct perf_event *event)
{
	struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
	struct hw_perf_event *hwc = &event->hw;
	u64 delta, prev_raw_count, new_raw_count;

again:
	prev_raw_count = local64_read(&hwc->prev_count);
	new_raw_count = armpmu->read_counter(event);

	if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,
			     new_raw_count) != prev_raw_count)
		goto again;

	delta = (new_raw_count - prev_raw_count) & armpmu->max_period;

	local64_add(delta, &event->count);
	local64_sub(delta, &hwc->period_left);

	return new_raw_count;
}


Contributors
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Jamie Iles7364.04%116.67%


Will Deacon1311.40%233.33%


Sudeep KarkadaNagesha1210.53%116.67%


Mark Rutland1210.53%116.67%


Peter Zijlstra43.51%116.67%


Total114100.00%6100.00%





static void

armpmu_read(struct perf_event *event)
{
	armpmu_event_update(event);
}


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Jamie Iles1275.00%150.00%


Peter Zijlstra425.00%150.00%


Total16100.00%2100.00%





static void

armpmu_stop(struct perf_event *event, int flags)
{
	struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
	struct hw_perf_event *hwc = &event->hw;

	/*
         * ARM pmu always has to update the counter, so ignore
         * PERF_EF_UPDATE, see comments in armpmu_start().
         */
	if (!(hwc->state & PERF_HES_STOPPED)) {
		armpmu->disable(event);
		armpmu_event_update(event);
		hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;
	}
}


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Peter Zijlstra4462.86%125.00%


Jamie Iles1318.57%125.00%


Mark Rutland1217.14%125.00%


Sudeep KarkadaNagesha11.43%125.00%


Total70100.00%4100.00%






static void armpmu_start(struct perf_event *event, int flags)
{
	struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
	struct hw_perf_event *hwc = &event->hw;

	/*
         * ARM pmu always has to reprogram the period, so ignore
         * PERF_EF_RELOAD, see the comment below.
         */
	if (flags & PERF_EF_RELOAD)
		WARN_ON_ONCE(!(hwc->state & PERF_HES_UPTODATE));

	hwc->state = 0;
	/*
         * Set the period again. Some counters can't be stopped, so when we
         * were stopped we simply disabled the IRQ source and the counter
         * may have been left counting. If we don't do this step then we may
         * get an interrupt too soon or *way* too late if the overflow has
         * happened since disabling.
         */
	armpmu_event_set_period(event);
	armpmu->enable(event);
}


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Peter Zijlstra3445.95%125.00%


Jamie Iles2736.49%125.00%


Mark Rutland1216.22%125.00%


Sudeep KarkadaNagesha11.35%125.00%


Total74100.00%4100.00%





static void

armpmu_del(struct perf_event *event, int flags)
{
	struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
	struct pmu_hw_events *hw_events = this_cpu_ptr(armpmu->hw_events);
	struct hw_perf_event *hwc = &event->hw;
	int idx = hwc->idx;

	armpmu_stop(event, PERF_EF_UPDATE);
	hw_events->events[idx] = NULL;
	clear_bit(idx, hw_events->used_mask);
	if (armpmu->clear_event_idx)
		armpmu->clear_event_idx(hw_events, event);

	perf_event_update_userpage(event);
}


Contributors
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Peter Zijlstra3333.00%114.29%


Jamie Iles3030.00%114.29%


Mark Rutland2222.00%457.14%


Stephen Boyd1515.00%114.29%


Total100100.00%7100.00%





static int

armpmu_add(struct perf_event *event, int flags)
{
	struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
	struct pmu_hw_events *hw_events = this_cpu_ptr(armpmu->hw_events);
	struct hw_perf_event *hwc = &event->hw;
	int idx;

	/* An event following a process won't be stopped earlier */
	if (!cpumask_test_cpu(smp_processor_id(), &armpmu->supported_cpus))
		return -ENOENT;

	/* If we don't have a space for the counter then finish early. */
	idx = armpmu->get_event_idx(hw_events, event);
	if (idx < 0)
		return idx;

	/*
         * If there is an event in the counter we are going to use then make
         * sure it is disabled.
         */
	event->hw.idx = idx;
	armpmu->disable(event);
	hw_events->events[idx] = event;

	hwc->state = PERF_HES_STOPPED | PERF_HES_UPTODATE;
	if (flags & PERF_EF_START)
		armpmu_start(event, PERF_EF_RELOAD);

	/* Propagate our changes to the userspace mapping. */
	perf_event_update_userpage(event);

	return 0;
}


Contributors
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Jamie Iles8155.48%111.11%


Mark Rutland4430.14%666.67%


Peter Zijlstra1913.01%111.11%


Sudeep KarkadaNagesha21.37%111.11%


Total146100.00%9100.00%





static int

validate_event(struct pmu *pmu, struct pmu_hw_events *hw_events,
			       struct perf_event *event)
{
	struct arm_pmu *armpmu;

	if (is_software_event(event))
		return 1;

	/*
         * Reject groups spanning multiple HW PMUs (e.g. CPU + CCI). The
         * core perf code won't check that the pmu->ctx == leader->ctx
         * until after pmu->event_init(event).
         */
	if (event->pmu != pmu)
		return 0;

	if (event->state < PERF_EVENT_STATE_OFF)
		return 1;

	if (event->state == PERF_EVENT_STATE_OFF && !event->attr.enable_on_exec)
		return 1;

	armpmu = to_arm_pmu(event->pmu);
	return armpmu->get_event_idx(hw_events, event) >= 0;
}


Contributors
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Will Deacon3232.65%337.50%


Jamie Iles3232.65%112.50%


Suzuki K. Poulose2626.53%112.50%


Mark Rutland77.14%225.00%


Sudeep KarkadaNagesha11.02%112.50%


Total98100.00%8100.00%





static int

validate_group(struct perf_event *event)
{
	struct perf_event *sibling, *leader = event->group_leader;
	struct pmu_hw_events fake_pmu;

	/*
         * Initialise the fake PMU. We only need to populate the
         * used_mask for the purposes of validation.
         */
	memset(&fake_pmu.used_mask, 0, sizeof(fake_pmu.used_mask));

	if (!validate_event(event->pmu, &fake_pmu, leader))
		return -EINVAL;

	list_for_each_entry(sibling, &leader->sibling_list, group_entry) {
		if (!validate_event(event->pmu, &fake_pmu, sibling))
			return -EINVAL;
	}

	if (!validate_event(event->pmu, &fake_pmu, event))
		return -EINVAL;

	return 0;
}


Contributors
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Jamie Iles8876.52%116.67%


Suzuki K. Poulose1210.43%116.67%


Mark Rutland76.09%233.33%


Will Deacon54.35%116.67%


Peter Zijlstra32.61%116.67%


Total115100.00%6100.00%






static struct arm_pmu_platdata *armpmu_get_platdata(struct arm_pmu *armpmu)
{
	struct platform_device *pdev = armpmu->plat_device;

	return pdev ? dev_get_platdata(&pdev->dev) : NULL;
}


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Total35100.00%1100.00%






static irqreturn_t armpmu_dispatch_irq(int irq, void *dev)
{
	struct arm_pmu *armpmu;
	struct arm_pmu_platdata *plat;
	int ret;
	u64 start_clock, finish_clock;

	/*
         * we request the IRQ with a (possibly percpu) struct arm_pmu**, but
         * the handlers expect a struct arm_pmu*. The percpu_irq framework will
         * do any necessary shifting, we just need to perform the first
         * dereference.
         */
	armpmu = *(void **)dev;

	plat = armpmu_get_platdata(armpmu);

	start_clock = sched_clock();
	if (plat && plat->handle_irq)
		ret = plat->handle_irq(irq, armpmu, armpmu->handle_irq);
	else
		ret = armpmu->handle_irq(irq, armpmu);
	finish_clock = sched_clock();

	perf_sample_event_took(finish_clock - start_clock);
	return ret;
}


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Will Deacon3331.73%114.29%


Rabin Vincent2927.88%114.29%


Sudeep KarkadaNagesha1817.31%114.29%


Stephen Boyd1312.50%114.29%


Mark Rutland1110.58%342.86%


Total104100.00%7100.00%





static int

event_requires_mode_exclusion(struct perf_event_attr *attr)
{
	return attr->exclude_idle || attr->exclude_user ||
	       attr->exclude_kernel || attr->exclude_hv;
}


Contributors
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Jamie Iles27.14%150.00%


Total28100.00%2100.00%





static int

__hw_perf_event_init(struct perf_event *event)
{
	struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
	struct hw_perf_event *hwc = &event->hw;
	int mapping;

	mapping = armpmu->map_event(event);

	if (mapping < 0) {
		pr_debug("event %x:%llx not supported\n", event->attr.type,
			 event->attr.config);
		return mapping;
	}

	/*
         * We don't assign an index until we actually place the event onto
         * hardware. Use -1 to signify that we haven't decided where to put it
         * yet. For SMP systems, each core has it's own PMU so we can't do any
         * clever allocation or constraints checking at this point.
         */
	hwc->idx		= -1;
	hwc->config_base	= 0;
	hwc->config		= 0;
	hwc->event_base		= 0;

	/*
         * Check whether we need to exclude the counter from certain modes.
         */
	if ((!armpmu->set_event_filter ||
	     armpmu->set_event_filter(hwc, &event->attr)) &&
	     event_requires_mode_exclusion(&event->attr)) {
		pr_debug("ARM performance counters do not support "
			 "mode exclusion\n");
		return -EOPNOTSUPP;
	}

	/*
         * Store the event encoding into the config_base field.
         */
	hwc->config_base	    |= (unsigned long)mapping;

	if (!is_sampling_event(event)) {
		/*
                 * For non-sampling runs, limit the sample_period to half
                 * of the counter width. That way, the new counter value
                 * is far less likely to overtake the previous one unless
                 * you have some serious IRQ latency issues.
                 */
		hwc->sample_period  = armpmu->max_period >> 1;
		hwc->last_period    = hwc->sample_period;
		local64_set(&hwc->period_left, hwc->sample_period);
	}

	if (event->group_leader != event) {
		if (validate_group(event) != 0)
			return -EINVAL;
	}

	return 0;
}


Contributors
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Jamie Iles14365.30%111.11%


Will Deacon5223.74%333.33%


Mark Rutland198.68%333.33%


Vince Weaver41.83%111.11%


Peter Zijlstra10.46%111.11%


Total219100.00%9100.00%






static int armpmu_event_init(struct perf_event *event)
{
	struct arm_pmu *armpmu = to_arm_pmu(event->pmu);

	/*
         * Reject CPU-affine events for CPUs that are of a different class to
         * that which this PMU handles. Process-following events (where
         * event->cpu == -1) can be migrated between CPUs, and thus we have to
         * reject them later (in armpmu_add) if they're scheduled on a
         * different class of CPU.
         */
	if (event->cpu != -1 &&
		!cpumask_test_cpu(event->cpu, &armpmu->supported_cpus))
		return -ENOENT;

	/* does not support taken branch sampling */
	if (has_branch_stack(event))
		return -EOPNOTSUPP;

	if (armpmu->map_event(event) == -ENOENT)
		return -ENOENT;

	return __hw_perf_event_init(event);
}


Contributors
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Mark Rutland4857.14%350.00%


Jamie Iles1416.67%116.67%


Stéphane Eranian1214.29%116.67%


Peter Zijlstra1011.90%116.67%


Total84100.00%6100.00%






static void armpmu_enable(struct pmu *pmu)
{
	struct arm_pmu *armpmu = to_arm_pmu(pmu);
	struct pmu_hw_events *hw_events = this_cpu_ptr(armpmu->hw_events);
	int enabled = bitmap_weight(hw_events->used_mask, armpmu->num_events);

	/* For task-bound events we may be called on other CPUs */
	if (!cpumask_test_cpu(smp_processor_id(), &armpmu->supported_cpus))
		return;

	if (enabled)
		armpmu->start(armpmu);
}


Contributors
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Mark Rutland4358.11%650.00%


Jamie Iles1824.32%18.33%


Peter Zijlstra68.11%325.00%


Will Deacon45.41%18.33%


Sudeep KarkadaNagesha34.05%18.33%


Total74100.00%12100.00%






static void armpmu_disable(struct pmu *pmu)
{
	struct arm_pmu *armpmu = to_arm_pmu(pmu);

	/* For task-bound events we may be called on other CPUs */
	if (!cpumask_test_cpu(smp_processor_id(), &armpmu->supported_cpus))
		return;

	armpmu->stop(armpmu);
}


Contributors
PersonTokensPropCommitsCommitProp
Mark Rutland2659.09%233.33%


Jamie Iles920.45%116.67%


Peter Zijlstra613.64%233.33%


Sudeep KarkadaNagesha36.82%116.67%


Total44100.00%6100.00%



/*
 * In heterogeneous systems, events are specific to a particular
 * microarchitecture, and aren't suitable for another. Thus, only match CPUs of
 * the same microarchitecture.
 */



static int armpmu_filter_match(struct perf_event *event)
{
	struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
	unsigned int cpu = smp_processor_id();
	return cpumask_test_cpu(cpu, &armpmu->supported_cpus);
}


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Total41100.00%1100.00%






static ssize_t armpmu_cpumask_show(struct device *dev,
				   struct device_attribute *attr, char *buf)
{
	struct arm_pmu *armpmu = to_arm_pmu(dev_get_drvdata(dev));
	return cpumap_print_to_pagebuf(true, buf, &armpmu->supported_cpus);
}


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Total46100.00%1100.00%



static DEVICE_ATTR(cpus, S_IRUGO, armpmu_cpumask_show, NULL);


static struct attribute *armpmu_common_attrs[] = {
	&dev_attr_cpus.attr,
	NULL,
};


static struct attribute_group armpmu_common_attr_group = {
	.attrs = armpmu_common_attrs,
};

/* Set at runtime when we know what CPU type we are. */

static struct arm_pmu *__oprofile_cpu_pmu;

/*
 * Despite the names, these two functions are CPU-specific and are used
 * by the OProfile/perf code.
 */



const char *perf_pmu_name(void)
{
	if (!__oprofile_cpu_pmu)
		return NULL;

	return __oprofile_cpu_pmu->name;
}

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Total22100.00%1100.00%




EXPORT_SYMBOL_GPL(perf_pmu_name);




int perf_num_counters(void)
{
	int max_events = 0;

	if (__oprofile_cpu_pmu != NULL)
		max_events = __oprofile_cpu_pmu->num_events;

	return max_events;
}

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Total27100.00%1100.00%




EXPORT_SYMBOL_GPL(perf_num_counters);




void armpmu_free_irq(struct arm_pmu *armpmu, int cpu)
{
	struct pmu_hw_events __percpu *hw_events = armpmu->hw_events;
	int irq = per_cpu(hw_events->irq, cpu);

	if (!cpumask_test_and_clear_cpu(cpu, &armpmu->active_irqs))
		return;

	if (irq_is_percpu(irq)) {
		free_percpu_irq(irq, &hw_events->percpu_pmu);
		cpumask_clear(&armpmu->active_irqs);
		return;
	}

	free_irq(irq, per_cpu_ptr(&hw_events->percpu_pmu, cpu));
}


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Total92100.00%4100.00%






void armpmu_free_irqs(struct arm_pmu *armpmu)
{
	int cpu;

	for_each_cpu(cpu, &armpmu->supported_cpus)
		armpmu_free_irq(armpmu, cpu);
}


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Total26100.00%2100.00%






int armpmu_request_irq(struct arm_pmu *armpmu, int cpu)
{
	int err = 0;
	struct pmu_hw_events __percpu *hw_events = armpmu->hw_events;
	const irq_handler_t handler = armpmu_dispatch_irq;
	int irq = per_cpu(hw_events->irq, cpu);
	if (!irq)
		return 0;

	if (irq_is_percpu(irq) && cpumask_empty(&armpmu->active_irqs)) {
		err = request_percpu_irq(irq, handler, "arm-pmu",
					 &hw_events->percpu_pmu);
	} else if (irq_is_percpu(irq)) {
		int other_cpu = cpumask_first(&armpmu->active_irqs);
		int other_irq = per_cpu(hw_events->irq, other_cpu);

		if (irq != other_irq) {
			pr_warn("mismatched PPIs detected.\n");
			err = -EINVAL;
			goto err_out;
		}
	} else {
		struct arm_pmu_platdata *platdata = armpmu_get_platdata(armpmu);
		unsigned long irq_flags;

		err = irq_force_affinity(irq, cpumask_of(cpu));

		if (err && num_possible_cpus() > 1) {
			pr_warn("unable to set irq affinity (irq=%d, cpu=%u)\n",
				irq, cpu);
			goto err_out;
		}

		if (platdata && platdata->irq_flags) {
			irq_flags = platdata->irq_flags;
		} else {
			irq_flags = IRQF_PERCPU |
				    IRQF_NOBALANCING |
				    IRQF_NO_THREAD;
		}

		err = request_irq(irq, handler, irq_flags, "arm-pmu",
				  per_cpu_ptr(&hw_events->percpu_pmu, cpu));
	}

	if (err)
		goto err_out;

	cpumask_set_cpu(cpu, &armpmu->active_irqs);
	return 0;

err_out:
	pr_err("unable to request IRQ%d for ARM PMU counters\n", irq);
	return err;
}


Contributors
PersonTokensPropCommitsCommitProp
Mark Rutland18165.82%685.71%


Will Deacon9434.18%114.29%


Total275100.00%7100.00%






int armpmu_request_irqs(struct arm_pmu *armpmu)
{
	int cpu, err;

	for_each_cpu(cpu, &armpmu->supported_cpus) {
		err = armpmu_request_irq(armpmu, cpu);
		if (err)
			break;
	}

	return err;
}


Contributors
PersonTokensPropCommitsCommitProp
Mark Rutland40100.00%1100.00%


Total40100.00%1100.00%






static int armpmu_get_cpu_irq(struct arm_pmu *pmu, int cpu)
{
	struct pmu_hw_events __percpu *hw_events = pmu->hw_events;
	return per_cpu(hw_events->irq, cpu);
}


Contributors
PersonTokensPropCommitsCommitProp
Mark Rutland34100.00%1100.00%


Total34100.00%1100.00%



/*
 * PMU hardware loses all context when a CPU goes offline.
 * When a CPU is hotplugged back in, since some hardware registers are
 * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
 * junk values out of them.
 */



static int arm_perf_starting_cpu(unsigned int cpu, struct hlist_node *node)
{
	struct arm_pmu *pmu = hlist_entry_safe(node, struct arm_pmu, node);
	int irq;

	if (!cpumask_test_cpu(cpu, &pmu->supported_cpus))
		return 0;
	if (pmu->reset)
		pmu->reset(pmu);

	irq = armpmu_get_cpu_irq(pmu, cpu);
	if (irq) {
		if (irq_is_percpu(irq)) {
			enable_percpu_irq(irq, IRQ_TYPE_NONE);
			return 0;
		}
	}

	return 0;
}


Contributors
PersonTokensPropCommitsCommitProp
Mark Rutland8080.81%240.00%


Sebastian Andrzej Siewior1616.16%240.00%


Thomas Gleixner33.03%120.00%


Total99100.00%5100.00%






static int arm_perf_teardown_cpu(unsigned int cpu, struct hlist_node *node)
{
	struct arm_pmu *pmu = hlist_entry_safe(node, struct arm_pmu, node);
	int irq;

	if (!cpumask_test_cpu(cpu, &pmu->supported_cpus))
		return 0;

	irq = armpmu_get_cpu_irq(pmu, cpu);
	if (irq && irq_is_percpu(irq))
		disable_percpu_irq(irq);

	return 0;
}


Contributors
PersonTokensPropCommitsCommitProp
Mark Rutland7498.67%266.67%


Thomas Gleixner11.33%133.33%


Total75100.00%3100.00%



#ifdef CONFIG_CPU_PM



static void cpu_pm_pmu_setup(struct arm_pmu *armpmu, unsigned long cmd)
{
	struct pmu_hw_events *hw_events = this_cpu_ptr(armpmu->hw_events);
	struct perf_event *event;
	int idx;

	for (idx = 0; idx < armpmu->num_events; idx++) {
		/*
                 * If the counter is not used skip it, there is no
                 * need of stopping/restarting it.
                 */
		if (!test_bit(idx, hw_events->used_mask))
			continue;

		event = hw_events->events[idx];

		switch (cmd) {
		case CPU_PM_ENTER:
			/*
                         * Stop and update the counter
                         */
			armpmu_stop(event, PERF_EF_UPDATE);
			break;
		case CPU_PM_EXIT:
		case CPU_PM_ENTER_FAILED:
			 /*
                          * Restore and enable the counter.
                          * armpmu_start() indirectly calls
                          *
                          * perf_event_update_userpage()
                          *
                          * that requires RCU read locking to be functional,
                          * wrap the call within RCU_NONIDLE to make the
                          * RCU subsystem aware this cpu is not idle from
                          * an RCU perspective for the armpmu_start() call
                          * duration.
                          */
			RCU_NONIDLE(armpmu_start(event, PERF_EF_RELOAD));
			break;
		default:
			break;
		}
	}
}


Contributors
PersonTokensPropCommitsCommitProp
Lorenzo Pieralisi113100.00%2100.00%


Total113100.00%2100.00%






static int cpu_pm_pmu_notify(struct notifier_block *b, unsigned long cmd,
			     void *v)
{
	struct arm_pmu *armpmu = container_of(b, struct arm_pmu, cpu_pm_nb);
	struct pmu_hw_events *hw_events = this_cpu_ptr(armpmu->hw_events);
	int enabled = bitmap_weight(hw_events->used_mask, armpmu->num_events);

	if (!cpumask_test_cpu(smp_processor_id(), &armpmu->supported_cpus))
		return NOTIFY_DONE;

	/*
         * Always reset the PMU registers on power-up even if
         * there are no events running.
         */
	if (cmd == CPU_PM_EXIT && armpmu->reset)
		armpmu->reset(armpmu);

	if (!enabled)
		return NOTIFY_OK;

	switch (cmd) {
	case CPU_PM_ENTER:
		armpmu->stop(armpmu);
		cpu_pm_pmu_setup(armpmu, cmd);
		break;
	case CPU_PM_EXIT:
		cpu_pm_pmu_setup(armpmu, cmd);
	case CPU_PM_ENTER_FAILED:
		armpmu->start(armpmu);
		break;
	default:
		return NOTIFY_DONE;
	}

	return NOTIFY_OK;
}


Contributors
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Lorenzo Pieralisi155100.00%1100.00%


Total155100.00%1100.00%






static int cpu_pm_pmu_register(struct arm_pmu *cpu_pmu)
{
	cpu_pmu->cpu_pm_nb.notifier_call = cpu_pm_pmu_notify;
	return cpu_pm_register_notifier(&cpu_pmu->cpu_pm_nb);
}


Contributors
PersonTokensPropCommitsCommitProp
Lorenzo Pieralisi28100.00%1100.00%


Total28100.00%1100.00%






static void cpu_pm_pmu_unregister(struct arm_pmu *cpu_pmu)
{
	cpu_pm_unregister_notifier(&cpu_pmu->cpu_pm_nb);
}

Contributors
PersonTokensPropCommitsCommitProp
Lorenzo Pieralisi19100.00%1100.00%


Total19100.00%1100.00%



#else



static inline int cpu_pm_pmu_register(struct arm_pmu *cpu_pmu) { return 0; }

Contributors
PersonTokensPropCommitsCommitProp
Lorenzo Pieralisi15100.00%1100.00%


Total15100.00%1100.00%






static inline void cpu_pm_pmu_unregister(struct arm_pmu *cpu_pmu) { }

Contributors
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Lorenzo Pieralisi11100.00%1100.00%


Total11100.00%1100.00%



#endif




static int cpu_pmu_init(struct arm_pmu *cpu_pmu)
{
	int err;

	err = cpuhp_state_add_instance(CPUHP_AP_PERF_ARM_STARTING,
				       &cpu_pmu->node);
	if (err)
		goto out;

	err = cpu_pm_pmu_register(cpu_pmu);
	if (err)
		goto out_unregister;

	return 0;

out_unregister:
	cpuhp_state_remove_instance_nocalls(CPUHP_AP_PERF_ARM_STARTING,
					    &cpu_pmu->node);
out:
	return err;
}


Contributors
PersonTokensPropCommitsCommitProp
Mark Rutland2943.28%360.00%


Lorenzo Pieralisi2232.84%120.00%


Sebastian Andrzej Siewior1623.88%120.00%


Total67100.00%5100.00%






static void cpu_pmu_destroy(struct arm_pmu *cpu_pmu)
{
	cpu_pm_pmu_unregister(cpu_pmu);
	cpuhp_state_remove_instance_nocalls(CPUHP_AP_PERF_ARM_STARTING,
					    &cpu_pmu->node);
}


Contributors
PersonTokensPropCommitsCommitProp
Mark Rutland1765.38%133.33%


Lorenzo Pieralisi519.23%133.33%


Sebastian Andrzej Siewior415.38%133.33%


Total26100.00%3100.00%






struct arm_pmu *armpmu_alloc(void)
{
	struct arm_pmu *pmu;
	int cpu;

	pmu = kzalloc(sizeof(*pmu), GFP_KERNEL);
	if (!pmu) {
		pr_info("failed to allocate PMU device!\n");
		goto out;
	}

	pmu->hw_events = alloc_percpu(struct pmu_hw_events);
	if (!pmu->hw_events) {
		pr_info("failed to allocate per-cpu PMU data.\n");
		goto out_free_pmu;
	}

	pmu->pmu = (struct pmu) {
		.pmu_enable	= armpmu_enable,
		.pmu_disable	= armpmu_disable,
		.event_init	= armpmu_event_init,
		.add		= armpmu_add,
		.del		= armpmu_del,
		.start		= armpmu_start,
		.stop		= armpmu_stop,
		.read		= armpmu_read,
		.filter_match	= armpmu_filter_match,
		.attr_groups	= pmu->attr_groups,
		/*
                 * This is a CPU PMU potentially in a heterogeneous
                 * configuration (e.g. big.LITTLE). This is not an uncore PMU,
                 * and we have taken ctx sharing into account (e.g. with our
                 * pmu::filter_match callback and pmu::event_init group
                 * validation).
                 */
		.capabilities	= PERF_PMU_CAP_HETEROGENEOUS_CPUS,
        };

	pmu->attr_groups[ARMPMU_ATTR_GROUP_COMMON] =
		&armpmu_common_attr_group;

	for_each_possible_cpu(cpu) {
		struct pmu_hw_events *events;

		events = per_cpu_ptr(pmu->hw_events, cpu);
		raw_spin_lock_init(&events->pmu_lock);
		events->percpu_pmu = pmu;
	}

	return pmu;

out_free_pmu:
	kfree(pmu);
out:
	return NULL;
}


Contributors
PersonTokensPropCommitsCommitProp
Mark Rutland201100.00%2100.00%


Total201100.00%2100.00%






void armpmu_free(struct arm_pmu *pmu)
{
	free_percpu(pmu->hw_events);
	kfree(pmu);
}


Contributors
PersonTokensPropCommitsCommitProp
Mark Rutland22100.00%4100.00%


Total22100.00%4100.00%






int armpmu_register(struct arm_pmu *pmu)
{
	int ret;

	ret = cpu_pmu_init(pmu);
	if (ret)
		return ret;

	ret = perf_pmu_register(&pmu->pmu, pmu->name, -1);
	if (ret)
		goto out_destroy;

	if (!__oprofile_cpu_pmu)
		__oprofile_cpu_pmu = pmu;

	pr_info("enabled with %s PMU driver, %d counters available\n",
		pmu->name, pmu->num_events);

	return 0;

out_destroy:
	cpu_pmu_destroy(pmu);
	return ret;
}


Contributors
PersonTokensPropCommitsCommitProp
Mark Rutland86100.00%1100.00%


Total86100.00%1100.00%






static int arm_pmu_hp_init(void)
{
	int ret;

	ret = cpuhp_setup_state_multi(CPUHP_AP_PERF_ARM_STARTING,
				      "perf/arm/pmu:starting",
				      arm_perf_starting_cpu,
				      arm_perf_teardown_cpu);
	if (ret)
		pr_err("CPU hotplug notifier for ARM PMU could not be registered: %d\n",
		       ret);
	return ret;
}

Contributors
PersonTokensPropCommitsCommitProp
Sebastian Andrzej Siewior3694.74%250.00%


Mark Rutland12.63%125.00%


Thomas Gleixner12.63%125.00%


Total38100.00%4100.00%




subsys_initcall(arm_pmu_hp_init);

Overall Contributors
PersonTokensPropCommitsCommitProp
Mark Rutland155844.21%2640.62%


Jamie Iles81523.13%11.56%


Lorenzo Pieralisi37810.73%23.12%


Will Deacon3309.36%1523.44%


Peter Zijlstra1684.77%57.81%


Sebastian Andrzej Siewior772.19%23.12%


Sudeep KarkadaNagesha531.50%23.12%


Stephen Boyd481.36%34.69%


Suzuki K. Poulose381.08%11.56%


Rabin Vincent290.82%11.56%


Stéphane Eranian120.34%11.56%


Daniel R Thompson60.17%11.56%


Thomas Gleixner50.14%23.12%


Vince Weaver40.11%11.56%


Ingo Molnar30.09%11.56%


Total3524100.00%64100.00%


Directory: drivers/perf



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