Release 4.14 drivers/spi/spi-ath79.c

/*
 * SPI controller driver for the Atheros AR71XX/AR724X/AR913X SoCs
 *
 * Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
 *
 * This driver has been based on the spi-gpio.c:
 *      Copyright (C) 2006,2008 David Brownell
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/spinlock.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi_bitbang.h>
#include <linux/bitops.h>
#include <linux/gpio.h>
#include <linux/clk.h>
#include <linux/err.h>

#include <asm/mach-ath79/ar71xx_regs.h>
#include <asm/mach-ath79/ath79_spi_platform.h>


#define DRV_NAME	"ath79-spi"


#define ATH79_SPI_RRW_DELAY_FACTOR	12000

#define MHZ				(1000 * 1000)


struct ath79_spi {
	
struct spi_bitbang	bitbang;
	
u32			ioc_base;
	
u32			reg_ctrl;
	
void __iomem		*base;
	
struct clk		*clk;
	
unsigned int		rrw_delay;
};



static inline u32 ath79_spi_rr(struct ath79_spi *sp, unsigned int reg)
{
	return ioread32(sp->base + reg);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Gabor Juhos
25
96.15%
1
50.00%
Aravind Thokala
1
3.85%
1
50.00%
Total
26
100.00%
2
100.00%



static inline void ath79_spi_wr(struct ath79_spi *sp, unsigned int reg, u32 val)
{
	iowrite32(val, sp->base + reg);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Gabor Juhos
29
96.67%
1
50.00%
Aravind Thokala
1
3.33%
1
50.00%
Total
30
100.00%
2
100.00%



static inline struct ath79_spi *ath79_spidev_to_sp(struct spi_device *spi)
{
	return spi_master_get_devdata(spi->master);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Gabor Juhos
22
100.00%
1
100.00%
Total
22
100.00%
1
100.00%



static inline void ath79_spi_delay(struct ath79_spi *sp, unsigned int nsecs)
{
	if (nsecs > sp->rrw_delay)
		ndelay(nsecs - sp->rrw_delay);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Gabor Juhos
32
96.97%
1
50.00%
Aravind Thokala
1
3.03%
1
50.00%
Total
33
100.00%
2
100.00%



static void ath79_spi_chipselect(struct spi_device *spi, int is_active)
{
	struct ath79_spi *sp = ath79_spidev_to_sp(spi);
	int cs_high = (spi->mode & SPI_CS_HIGH) ? is_active : !is_active;

	if (is_active) {
		/* set initial clock polarity */
		if (spi->mode & SPI_CPOL)
			sp->ioc_base |= AR71XX_SPI_IOC_CLK;
		else
			sp->ioc_base &= ~AR71XX_SPI_IOC_CLK;

		ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
	}

	if (gpio_is_valid(spi->cs_gpio)) {
		/* SPI is normally active-low */
		gpio_set_value_cansleep(spi->cs_gpio, cs_high);
	} else {
		u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select);

		if (cs_high)
			sp->ioc_base |= cs_bit;
		else
			sp->ioc_base &= ~cs_bit;

		ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
	}

}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Gabor Juhos
124
86.71%
1
25.00%
Felix Fietkau
17
11.89%
2
50.00%
Alban Bedel
2
1.40%
1
25.00%
Total
143
100.00%
4
100.00%



static void ath79_spi_enable(struct ath79_spi *sp)
{
	/* enable GPIO mode */
	ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO);

	/* save CTRL register */
	sp->reg_ctrl = ath79_spi_rr(sp, AR71XX_SPI_REG_CTRL);
	sp->ioc_base = ath79_spi_rr(sp, AR71XX_SPI_REG_IOC);

	/* TODO: setup speed? */
	ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, 0x43);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Gabor Juhos
54
100.00%
2
100.00%
Total
54
100.00%
2
100.00%



static void ath79_spi_disable(struct ath79_spi *sp)
{
	/* restore CTRL register */
	ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, sp->reg_ctrl);
	/* disable GPIO mode */
	ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Gabor Juhos
33
100.00%
1
100.00%
Total
33
100.00%
1
100.00%



static int ath79_spi_setup_cs(struct spi_device *spi)
{
	struct ath79_spi *sp = ath79_spidev_to_sp(spi);
	int status;

	status = 0;
	if (gpio_is_valid(spi->cs_gpio)) {
		unsigned long flags;

		flags = GPIOF_DIR_OUT;
		if (spi->mode & SPI_CS_HIGH)
			flags |= GPIOF_INIT_LOW;
		else
			flags |= GPIOF_INIT_HIGH;

		status = gpio_request_one(spi->cs_gpio, flags,
					  dev_name(&spi->dev));
	} else {
		u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select);

		if (spi->mode & SPI_CS_HIGH)
			sp->ioc_base &= ~cs_bit;
		else
			sp->ioc_base |= cs_bit;

		ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
	}

	return status;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Gabor Juhos
70
53.03%
4
57.14%
Alban Bedel
46
34.85%
2
28.57%
Felix Fietkau
16
12.12%
1
14.29%
Total
132
100.00%
7
100.00%



static void ath79_spi_cleanup_cs(struct spi_device *spi)
{
	if (gpio_is_valid(spi->cs_gpio))
		gpio_free(spi->cs_gpio);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Gabor Juhos
21
77.78%
1
33.33%
Felix Fietkau
4
14.81%
1
33.33%
Alban Bedel
2
7.41%
1
33.33%
Total
27
100.00%
3
100.00%



static int ath79_spi_setup(struct spi_device *spi)
{
	int status = 0;

	if (!spi->controller_state) {
		status = ath79_spi_setup_cs(spi);
		if (status)
			return status;
	}

	status = spi_bitbang_setup(spi);
	if (status && !spi->controller_state)
		ath79_spi_cleanup_cs(spi);

	return status;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Gabor Juhos
63
100.00%
1
100.00%
Total
63
100.00%
1
100.00%



static void ath79_spi_cleanup(struct spi_device *spi)
{
	ath79_spi_cleanup_cs(spi);
	spi_bitbang_cleanup(spi);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Gabor Juhos
21
100.00%
1
100.00%
Total
21
100.00%
1
100.00%



static u32 ath79_spi_txrx_mode0(struct spi_device *spi, unsigned int nsecs,
			       u32 word, u8 bits)
{
	struct ath79_spi *sp = ath79_spidev_to_sp(spi);
	u32 ioc = sp->ioc_base;

	/* clock starts at inactive polarity */
	for (word <<= (32 - bits); likely(bits); bits--) {
		u32 out;

		if (word & (1 << 31))
			out = ioc | AR71XX_SPI_IOC_DO;
		else
			out = ioc & ~AR71XX_SPI_IOC_DO;

		/* setup MSB (to slave) on trailing edge */
		ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out);
		ath79_spi_delay(sp, nsecs);
		ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out | AR71XX_SPI_IOC_CLK);
		ath79_spi_delay(sp, nsecs);
		if (bits == 1)
			ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out);

		word <<= 1;
	}

	return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Gabor Juhos
147
99.32%
3
75.00%
Aravind Thokala
1
0.68%
1
25.00%
Total
148
100.00%
4
100.00%



static int ath79_spi_probe(struct platform_device *pdev)
{
	struct spi_master *master;
	struct ath79_spi *sp;
	struct ath79_spi_platform_data *pdata;
	struct resource	*r;
	unsigned long rate;
	int ret;

	master = spi_alloc_master(&pdev->dev, sizeof(*sp));
	if (master == NULL) {
		dev_err(&pdev->dev, "failed to allocate spi master\n");
		return -ENOMEM;
	}

	sp = spi_master_get_devdata(master);
	master->dev.of_node = pdev->dev.of_node;
	platform_set_drvdata(pdev, sp);

	pdata = dev_get_platdata(&pdev->dev);

	master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
	master->setup = ath79_spi_setup;
	master->cleanup = ath79_spi_cleanup;
	if (pdata) {
		master->bus_num = pdata->bus_num;
		master->num_chipselect = pdata->num_chipselect;
	}

	sp->bitbang.master = master;
	sp->bitbang.chipselect = ath79_spi_chipselect;
	sp->bitbang.txrx_word[SPI_MODE_0] = ath79_spi_txrx_mode0;
	sp->bitbang.setup_transfer = spi_bitbang_setup_transfer;
	sp->bitbang.flags = SPI_CS_HIGH;

	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	sp->base = devm_ioremap_resource(&pdev->dev, r);
	if (IS_ERR(sp->base)) {
		ret = PTR_ERR(sp->base);
		goto err_put_master;
	}

	sp->clk = devm_clk_get(&pdev->dev, "ahb");
	if (IS_ERR(sp->clk)) {
		ret = PTR_ERR(sp->clk);
		goto err_put_master;
	}

	ret = clk_prepare_enable(sp->clk);
	if (ret)
		goto err_put_master;

	rate = DIV_ROUND_UP(clk_get_rate(sp->clk), MHZ);
	if (!rate) {
		ret = -EINVAL;
		goto err_clk_disable;
	}

	sp->rrw_delay = ATH79_SPI_RRW_DELAY_FACTOR / rate;
	dev_dbg(&pdev->dev, "register read/write delay is %u nsecs\n",
		sp->rrw_delay);

	ath79_spi_enable(sp);
	ret = spi_bitbang_start(&sp->bitbang);
	if (ret)
		goto err_disable;

	return 0;

err_disable:
	ath79_spi_disable(sp);
err_clk_disable:
	clk_disable_unprepare(sp->clk);
err_put_master:
	spi_master_put(sp->bitbang.master);

	return ret;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Gabor Juhos
360
88.45%
3
33.33%
Alban Bedel
14
3.44%
2
22.22%
Jingoo Han
12
2.95%
2
22.22%
Stephen Warren
11
2.70%
1
11.11%
Heiner Kallweit
10
2.46%
1
11.11%
Total
407
100.00%
9
100.00%



static int ath79_spi_remove(struct platform_device *pdev)
{
	struct ath79_spi *sp = platform_get_drvdata(pdev);

	spi_bitbang_stop(&sp->bitbang);
	ath79_spi_disable(sp);
	clk_disable_unprepare(sp->clk);
	spi_master_put(sp->bitbang.master);

	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Gabor Juhos
52
98.11%
3
75.00%
Alban Bedel
1
1.89%
1
25.00%
Total
53
100.00%
4
100.00%



static void ath79_spi_shutdown(struct platform_device *pdev)
{
	ath79_spi_remove(pdev);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Gabor Juhos
16
100.00%
1
100.00%
Total
16
100.00%
1
100.00%


static const struct of_device_id ath79_spi_of_match[] = {
	{ .compatible = "qca,ar7100-spi", },
	{ },
};
MODULE_DEVICE_TABLE(of, ath79_spi_of_match);


static struct platform_driver ath79_spi_driver = {
	.probe		= ath79_spi_probe,
	.remove		= ath79_spi_remove,
	.shutdown	= ath79_spi_shutdown,
	.driver		= {
		.name	= DRV_NAME,
		.of_match_table = ath79_spi_of_match,
        },
};

module_platform_driver(ath79_spi_driver);

MODULE_DESCRIPTION("SPI controller driver for Atheros AR71XX/AR724X/AR913X");
MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("platform:" DRV_NAME);
Overall Contributors
Person
Tokens
Prop
Commits
CommitProp
Gabor Juhos
1209
87.61%
8
40.00%
Alban Bedel
88
6.38%
3
15.00%
Felix Fietkau
37
2.68%
2
10.00%
Jingoo Han
12
0.87%
2
10.00%
Stephen Warren
11
0.80%
1
5.00%
Heiner Kallweit
10
0.72%
1
5.00%
Javier Martinez Canillas
7
0.51%
1
5.00%
Aravind Thokala
5
0.36%
1
5.00%
Grant C. Likely
1
0.07%
1
5.00%
Total
1380
100.00%
20
100.00%
Directory: drivers/spi

Information contained on this website is for historical information purposes only and does not indicate or represent copyright ownership.