Release 4.15 arch/x86/kernel/irqinit.c
// SPDX-License-Identifier: GPL-2.0
#include <linux/linkage.h>
#include <linux/errno.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/ioport.h>
#include <linux/interrupt.h>
#include <linux/timex.h>
#include <linux/random.h>
#include <linux/kprobes.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/device.h>
#include <linux/bitops.h>
#include <linux/acpi.h>
#include <linux/io.h>
#include <linux/delay.h>
#include <linux/atomic.h>
#include <asm/timer.h>
#include <asm/hw_irq.h>
#include <asm/pgtable.h>
#include <asm/desc.h>
#include <asm/apic.h>
#include <asm/setup.h>
#include <asm/i8259.h>
#include <asm/traps.h>
#include <asm/prom.h>
/*
* ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts:
* (these are usually mapped to vectors 0x30-0x3f)
*/
/*
* The IO-APIC gives us many more interrupt sources. Most of these
* are unused but an SMP system is supposed to have enough memory ...
* sometimes (mostly wrt. hw bugs) we get corrupted vectors all
* across the spectrum, so we really want to be prepared to get all
* of these. Plus, more powerful systems might have more than 64
* IO-APIC registers.
*
* (these are usually mapped into the 0x30-0xff vector range)
*/
/*
* IRQ2 is cascade interrupt to second interrupt controller
*/
static struct irqaction irq2 = {
.handler = no_action,
.name = "cascade",
.flags = IRQF_NO_THREAD,
};
DEFINE_PER_CPU(vector_irq_t, vector_irq) = {
[0 ... NR_VECTORS - 1] = VECTOR_UNUSED,
};
void __init init_ISA_irqs(void)
{
struct irq_chip *chip = legacy_pic->chip;
int i;
#if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC)
init_bsp_APIC();
#endif
legacy_pic->init(0);
for (i = 0; i < nr_legacy_irqs(); i++)
irq_set_chip_and_handler(i, chip, handle_level_irq);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Linus Torvalds (pre-git) | 25 | 37.88% | 1 | 10.00% |
| Ville Syrjälä | 16 | 24.24% | 1 | 10.00% |
| Thomas Gleixner | 10 | 15.15% | 1 | 10.00% |
| Andi Kleen | 6 | 9.09% | 1 | 10.00% |
| Jacob jun Pan | 3 | 4.55% | 1 | 10.00% |
| Yinghai Lu | 2 | 3.03% | 2 | 20.00% |
| Ingo Molnar | 2 | 3.03% | 1 | 10.00% |
| Jiang Liu | 1 | 1.52% | 1 | 10.00% |
| Maciej W. Rozycki | 1 | 1.52% | 1 | 10.00% |
| Total | 66 | 100.00% | 10 | 100.00% |
void __init init_IRQ(void)
{
int i;
/*
* On cpu 0, Assign ISA_IRQ_VECTOR(irq) to IRQ 0..15.
* If these IRQ's are handled by legacy interrupt-controllers like PIC,
* then this configuration will likely be static after the boot. If
* these IRQ's are handled by more mordern controllers like IO-APIC,
* then this vector space can be freed and re-used dynamically as the
* irq's migrate etc.
*/
for (i = 0; i < nr_legacy_irqs(); i++)
per_cpu(vector_irq, 0)[ISA_IRQ_VECTOR(i)] = irq_to_desc(i);
x86_init.irqs.intr_init();
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Suresh B. Siddha | 28 | 54.90% | 1 | 14.29% |
| Thomas Gleixner | 13 | 25.49% | 3 | 42.86% |
| Glauber de Oliveira Costa | 5 | 9.80% | 1 | 14.29% |
| Brian Gerst | 4 | 7.84% | 1 | 14.29% |
| Jiang Liu | 1 | 1.96% | 1 | 14.29% |
| Total | 51 | 100.00% | 7 | 100.00% |
void __init native_init_IRQ(void)
{
/* Execute any quirks before the call gates are initialised: */
x86_init.irqs.pre_vector_init();
idt_setup_apic_and_irq_gates();
lapic_assign_system_vectors();
if (!acpi_ioapic && !of_ioapic && nr_legacy_irqs())
setup_irq(2, &irq2);
irq_ctx_init(smp_processor_id());
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Cyrill V. Gorcunov | 13 | 27.66% | 1 | 7.69% |
| Thomas Gleixner | 9 | 19.15% | 3 | 23.08% |
| Glauber de Oliveira Costa | 7 | 14.89% | 1 | 7.69% |
| Pekka J Enberg | 3 | 6.38% | 1 | 7.69% |
| Sebastian Andrzej Siewior | 3 | 6.38% | 1 | 7.69% |
| Andrew Morton | 3 | 6.38% | 1 | 7.69% |
| Andy Shevchenko | 3 | 6.38% | 1 | 7.69% |
| James Bottomley | 2 | 4.26% | 1 | 7.69% |
| Yinghai Lu | 2 | 4.26% | 1 | 7.69% |
| Mikael Pettersson | 1 | 2.13% | 1 | 7.69% |
| Linus Torvalds (pre-git) | 1 | 2.13% | 1 | 7.69% |
| Total | 47 | 100.00% | 13 | 100.00% |
Overall Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Linus Torvalds (pre-git) | 63 | 21.95% | 2 | 4.26% |
| Thomas Gleixner | 38 | 13.24% | 9 | 19.15% |
| Cyrill V. Gorcunov | 31 | 10.80% | 1 | 2.13% |
| Suresh B. Siddha | 29 | 10.10% | 1 | 2.13% |
| Yinghai Lu | 22 | 7.67% | 4 | 8.51% |
| Ville Syrjälä | 16 | 5.57% | 1 | 2.13% |
| Andi Kleen | 14 | 4.88% | 1 | 2.13% |
| Glauber de Oliveira Costa | 12 | 4.18% | 2 | 4.26% |
| Jaswinder Singh Rajput | 9 | 3.14% | 2 | 4.26% |
| Sebastian Andrzej Siewior | 6 | 2.09% | 1 | 2.13% |
| Ingo Molnar | 6 | 2.09% | 3 | 6.38% |
| Linus Torvalds | 5 | 1.74% | 2 | 4.26% |
| Brian Gerst | 4 | 1.39% | 1 | 2.13% |
| Andrew Morton | 4 | 1.39% | 2 | 4.26% |
| James Bottomley | 4 | 1.39% | 2 | 4.26% |
| Andy Shevchenko | 3 | 1.05% | 1 | 2.13% |
| Pekka J Enberg | 3 | 1.05% | 1 | 2.13% |
| Adrian Bunk | 3 | 1.05% | 1 | 2.13% |
| Jacob jun Pan | 3 | 1.05% | 1 | 2.13% |
| Len Brown | 2 | 0.70% | 1 | 2.13% |
| Jiang Liu | 2 | 0.70% | 1 | 2.13% |
| Pavel Machek | 2 | 0.70% | 1 | 2.13% |
| Arun Sharma | 1 | 0.35% | 1 | 2.13% |
| Paul Jimenez | 1 | 0.35% | 1 | 2.13% |
| Greg Kroah-Hartman | 1 | 0.35% | 1 | 2.13% |
| Kay Sievers | 1 | 0.35% | 1 | 2.13% |
| Mikael Pettersson | 1 | 0.35% | 1 | 2.13% |
| Maciej W. Rozycki | 1 | 0.35% | 1 | 2.13% |
| Total | 287 | 100.00% | 47 | 100.00% |
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