Release 4.15 drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

/*
 * Copyright 2015 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 *
 */
#include <linux/kthread.h>
#include <linux/wait.h>
#include <linux/sched.h>
#include <drm/drmP.h>
#include "amdgpu.h"
#include "amdgpu_trace.h"



static void amdgpu_job_timedout(struct amd_sched_job *s_job)
{
	struct amdgpu_job *job = container_of(s_job, struct amdgpu_job, base);

	DRM_ERROR("ring %s timeout, last signaled seq=%u, last emitted seq=%u\n",
		  job->base.sched->name,
		  atomic_read(&job->ring->fence_drv.last_seq),
		  job->ring->fence_drv.sync_seq);

	if (amdgpu_sriov_vf(job->adev))
		amdgpu_sriov_gpu_reset(job->adev, job);
	else
		amdgpu_gpu_reset(job->adev);
}

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73
85.88%
3
60.00%
Chunming Zhou
7
8.24%
1
20.00%
Christian König
5
5.88%
1
20.00%
Total
85
100.00%
5
100.00%



int amdgpu_job_alloc(struct amdgpu_device *adev, unsigned num_ibs,
		     struct amdgpu_job **job, struct amdgpu_vm *vm)
{
	size_t size = sizeof(struct amdgpu_job);

	if (num_ibs == 0)
		return -EINVAL;

	size += sizeof(struct amdgpu_ib) * num_ibs;

	*job = kzalloc(size, GFP_KERNEL);
	if (!*job)
		return -ENOMEM;

	(*job)->adev = adev;
	(*job)->vm = vm;
	(*job)->ibs = (void *)&(*job)[1];
	(*job)->num_ibs = num_ibs;

	amdgpu_sync_create(&(*job)->sync);
	amdgpu_sync_create(&(*job)->dep_sync);
	amdgpu_sync_create(&(*job)->sched_sync);
	(*job)->vram_lost_counter = atomic_read(&adev->vram_lost_counter);

	return 0;
}

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28
16.37%
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Chunming Zhou
17
9.94%
2
25.00%
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171
100.00%
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int amdgpu_job_alloc_with_ib(struct amdgpu_device *adev, unsigned size,
			     struct amdgpu_job **job)
{
	int r;

	r = amdgpu_job_alloc(adev, 1, job, NULL);
	if (r)
		return r;

	r = amdgpu_ib_get(adev, NULL, size, &(*job)->ibs[0]);
	if (r)
		kfree(*job);
	else
		(*job)->vm_pd_addr = adev->gart.table_addr;

	return r;
}

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89
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2
2.20%
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91
100.00%
4
100.00%



void amdgpu_job_free_resources(struct amdgpu_job *job)
{
	struct dma_fence *f;
	unsigned i;

	/* use sched fence if available */
	f = job->base.s_fence ? &job->base.s_fence->finished : job->fence;

	for (i = 0; i < job->num_ibs; ++i)
		amdgpu_ib_free(job->adev, &job->ibs[i], f);
}

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42
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29
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2
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1
1.39%
1
12.50%
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72
100.00%
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100.00%



static void amdgpu_job_free_cb(struct amd_sched_job *s_job)
{
	struct amdgpu_job *job = container_of(s_job, struct amdgpu_job, base);

	amdgpu_ring_priority_put(job->ring, amd_sched_get_job_priority(s_job));
	dma_fence_put(job->fence);
	amdgpu_sync_free(&job->sync);
	amdgpu_sync_free(&job->dep_sync);
	amdgpu_sync_free(&job->sched_sync);
	kfree(job);
}

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18
24.32%
2
25.00%
Chunming Zhou
16
21.62%
2
25.00%
Andres Rodriguez
12
16.22%
1
12.50%
Chris Wilson
1
1.35%
1
12.50%
Baoyou Xie
1
1.35%
1
12.50%
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74
100.00%
8
100.00%



void amdgpu_job_free(struct amdgpu_job *job)
{
	amdgpu_job_free_resources(job);

	dma_fence_put(job->fence);
	amdgpu_sync_free(&job->sync);
	amdgpu_sync_free(&job->dep_sync);
	amdgpu_sync_free(&job->sched_sync);
	kfree(job);
}

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34
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16
31.37%
2
40.00%
Chris Wilson
1
1.96%
1
20.00%
Total
51
100.00%
5
100.00%



int amdgpu_job_submit(struct amdgpu_job *job, struct amdgpu_ring *ring,
		      struct amd_sched_entity *entity, void *owner,
		      struct dma_fence **f)
{
	int r;
	job->ring = ring;

	if (!f)
		return -EINVAL;

	r = amd_sched_job_init(&job->base, &ring->sched, entity, owner);
	if (r)
		return r;

	job->owner = owner;
	job->fence_ctx = entity->fence_context;
	*f = dma_fence_get(&job->base.s_fence->finished);
	amdgpu_job_free_resources(job);
	amdgpu_ring_priority_get(job->ring,
				 amd_sched_get_job_priority(&job->base));
	amd_sched_entity_push_job(&job->base);

	return 0;
}

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29
21.64%
3
27.27%
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15
11.19%
1
9.09%
Chris Wilson
2
1.49%
1
9.09%
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static struct dma_fence *amdgpu_job_dependency(struct amd_sched_job *sched_job)
{
	struct amdgpu_job *job = to_amdgpu_job(sched_job);
	struct amdgpu_vm *vm = job->vm;

	struct dma_fence *fence = amdgpu_sync_get_fence(&job->dep_sync);
	int r;

	if (amd_sched_dependency_optimized(fence, sched_job->s_entity)) {
		r = amdgpu_sync_fence(job->adev, &job->sched_sync, fence);
		if (r)
			DRM_ERROR("Error adding fence to sync (%d)\n", r);
	}
	if (!fence)
		fence = amdgpu_sync_get_fence(&job->sync);
	while (fence == NULL && vm && !job->vm_id) {
		struct amdgpu_ring *ring = job->ring;

		r = amdgpu_vm_grab_id(vm, ring, &job->sync,
				      &job->base.s_fence->finished,
				      job);
		if (r)
			DRM_ERROR("Error getting VM ID (%d)\n", r);

		fence = amdgpu_sync_get_fence(&job->sync);
	}

	return fence;
}

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60
34.09%
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7
3.98%
2
14.29%
Chris Wilson
2
1.14%
1
7.14%
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14
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static struct dma_fence *amdgpu_job_run(struct amd_sched_job *sched_job)
{
	struct dma_fence *fence = NULL;
	struct amdgpu_device *adev;
	struct amdgpu_job *job;
	int r;

	if (!sched_job) {
		DRM_ERROR("job is null\n");
		return NULL;
	}
	job = to_amdgpu_job(sched_job);
	adev = job->adev;

	BUG_ON(amdgpu_sync_peek_fence(&job->sync, NULL));

	trace_amdgpu_sched_run_job(job);
	/* skip ib schedule when vram is lost */
	if (job->vram_lost_counter != atomic_read(&adev->vram_lost_counter)) {
		dma_fence_set_error(&job->base.s_fence->finished, -ECANCELED);
		DRM_ERROR("Skip scheduling IBs!\n");
	} else {
		r = amdgpu_ib_schedule(job->ring, job->num_ibs, job->ibs, job,
				       &fence);
		if (r)
			DRM_ERROR("Error scheduling IBs (%d)\n", r);
	}
	/* if gpu reset, hw fence will be replaced here */
	dma_fence_put(job->fence);
	job->fence = dma_fence_get(fence);

	amdgpu_job_free_resources(job);
	return fence;
}

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Junwei (Martin) Zhang
11
6.21%
2
8.33%
Monk Liu
7
3.95%
2
8.33%
Chris Wilson
4
2.26%
1
4.17%
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100.00%
24
100.00%


const struct amd_sched_backend_ops amdgpu_sched_ops = {
	.dependency = amdgpu_job_dependency,
	.run_job = amdgpu_job_run,
	.timedout_job = amdgpu_job_timedout,
	.free_job = amdgpu_job_free_cb
};
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222
20.61%
10
17.24%
Monk Liu
194
18.01%
11
18.97%
Andres Rodriguez
27
2.51%
1
1.72%
Junwei (Martin) Zhang
18
1.67%
2
3.45%
Chris Wilson
11
1.02%
1
1.72%
Baoyou Xie
1
0.09%
1
1.72%
Nils Wallménius
1
0.09%
1
1.72%
Total
1077
100.00%
58
100.00%
Directory: drivers/gpu/drm/amd/amdgpu

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