Release 4.15 drivers/gpu/drm/nouveau/dispnv04/tvnv04.c
  
  
  
/*
 * Copyright (C) 2009 Francisco Jerez.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining
 * a copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sublicense, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial
 * portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 */
#include <drm/drmP.h>
#include "nouveau_drv.h"
#include "nouveau_reg.h"
#include "nouveau_encoder.h"
#include "nouveau_connector.h"
#include "nouveau_crtc.h"
#include "hw.h"
#include <drm/drm_crtc_helper.h>
#include <drm/i2c/ch7006.h>
static struct nvkm_i2c_bus_probe nv04_tv_encoder_info[] = {
	{
		{
			I2C_BOARD_INFO("ch7006", 0x75),
			.platform_data = &(struct ch7006_encoder_params) {
				CH7006_FORMAT_RGB24m12I, CH7006_CLOCK_MASTER,
				0, 0, 0,
				CH7006_SYNC_SLAVE, CH7006_SYNC_SEPARATED,
				CH7006_POUT_3_3V, CH7006_ACTIVE_HSYNC
			}
		},
		0
	},
	{ }
};
int nv04_tv_identify(struct drm_device *dev, int i2c_index)
{
	struct nouveau_drm *drm = nouveau_drm(dev);
	struct nvkm_i2c *i2c = nvxx_i2c(&drm->client.device);
	struct nvkm_i2c_bus *bus = nvkm_i2c_bus_find(i2c, i2c_index);
	if (bus) {
		return nvkm_i2c_bus_probe(bus, "TV encoder",
					  nv04_tv_encoder_info,
					  NULL, NULL);
	}
	return -ENODEV;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp | 
| Ben Skeggs | 72 | 97.30% | 8 | 80.00% | 
| Francisco Jerez | 2 | 2.70% | 2 | 20.00% | 
| Total | 74 | 100.00% | 10 | 100.00% | 
#define PLLSEL_TV_CRTC1_MASK				\
	(NV_PRAMDAC_PLL_COEFF_SELECT_TV_VSCLK1          \
         | NV_PRAMDAC_PLL_COEFF_SELECT_TV_PCLK1)
#define PLLSEL_TV_CRTC2_MASK				\
	(NV_PRAMDAC_PLL_COEFF_SELECT_TV_VSCLK2          \
         | NV_PRAMDAC_PLL_COEFF_SELECT_TV_PCLK2)
static void nv04_tv_dpms(struct drm_encoder *encoder, int mode)
{
	struct drm_device *dev = encoder->dev;
	struct nouveau_drm *drm = nouveau_drm(dev);
	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
	struct nv04_mode_state *state = &nv04_display(dev)->mode_reg;
	uint8_t crtc1A;
	NV_DEBUG(drm, "Setting dpms mode %d on TV encoder (output %d)\n",
		 mode, nv_encoder->dcb->index);
	state->pllsel &= ~(PLLSEL_TV_CRTC1_MASK | PLLSEL_TV_CRTC2_MASK);
	if (mode == DRM_MODE_DPMS_ON) {
		int head = nouveau_crtc(encoder->crtc)->index;
		crtc1A = NVReadVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX);
		state->pllsel |= head ? PLLSEL_TV_CRTC2_MASK :
					PLLSEL_TV_CRTC1_MASK;
		/* Inhibit hsync */
		crtc1A |= 0x80;
		NVWriteVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX, crtc1A);
	}
	NVWriteRAMDAC(dev, 0, NV_PRAMDAC_PLL_COEFF_SELECT, state->pllsel);
	get_slave_funcs(encoder)->dpms(encoder, mode);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp | 
| Ben Skeggs | 166 | 99.40% | 4 | 80.00% | 
| Francisco Jerez | 1 | 0.60% | 1 | 20.00% | 
| Total | 167 | 100.00% | 5 | 100.00% | 
static void nv04_tv_bind(struct drm_device *dev, int head, bool bind)
{
	struct nv04_crtc_reg *state = &nv04_display(dev)->mode_reg.crtc_reg[head];
	state->tv_setup = 0;
	if (bind)
		state->CRTC[NV_CIO_CRE_49] |= 0x10;
	else
		state->CRTC[NV_CIO_CRE_49] &= ~0x10;
	NVWriteVgaCrtc(dev, head, NV_CIO_CRE_LCD__INDEX,
		       state->CRTC[NV_CIO_CRE_LCD__INDEX]);
	NVWriteVgaCrtc(dev, head, NV_CIO_CRE_49,
		       state->CRTC[NV_CIO_CRE_49]);
	NVWriteRAMDAC(dev, head, NV_PRAMDAC_TV_SETUP,
		      state->tv_setup);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp | 
| Ben Skeggs | 110 | 100.00% | 2 | 100.00% | 
| Total | 110 | 100.00% | 2 | 100.00% | 
static void nv04_tv_prepare(struct drm_encoder *encoder)
{
	struct drm_device *dev = encoder->dev;
	int head = nouveau_crtc(encoder->crtc)->index;
	const struct drm_encoder_helper_funcs *helper = encoder->helper_private;
	helper->dpms(encoder, DRM_MODE_DPMS_OFF);
	nv04_dfp_disable(dev, head);
	if (nv_two_heads(dev))
		nv04_tv_bind(dev, head ^ 1, false);
	nv04_tv_bind(dev, head, true);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp | 
| Ben Skeggs | 84 | 98.82% | 1 | 50.00% | 
| Jani Nikula | 1 | 1.18% | 1 | 50.00% | 
| Total | 85 | 100.00% | 2 | 100.00% | 
static void nv04_tv_mode_set(struct drm_encoder *encoder,
			     struct drm_display_mode *mode,
			     struct drm_display_mode *adjusted_mode)
{
	struct drm_device *dev = encoder->dev;
	struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
	struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index];
	regp->tv_htotal = adjusted_mode->htotal;
	regp->tv_vtotal = adjusted_mode->vtotal;
	/* These delay the TV signals with respect to the VGA port,
         * they might be useful if we ever allow a CRTC to drive
         * multiple outputs.
         */
	regp->tv_hskew = 1;
	regp->tv_hsync_delay = 1;
	regp->tv_hsync_delay2 = 64;
	regp->tv_vskew = 1;
	regp->tv_vsync_delay = 1;
	get_slave_funcs(encoder)->mode_set(encoder, mode, adjusted_mode);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp | 
| Ben Skeggs | 122 | 99.19% | 2 | 66.67% | 
| Francisco Jerez | 1 | 0.81% | 1 | 33.33% | 
| Total | 123 | 100.00% | 3 | 100.00% | 
static void nv04_tv_commit(struct drm_encoder *encoder)
{
	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
	struct drm_device *dev = encoder->dev;
	struct nouveau_drm *drm = nouveau_drm(dev);
	struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
	const struct drm_encoder_helper_funcs *helper = encoder->helper_private;
	helper->dpms(encoder, DRM_MODE_DPMS_ON);
	NV_DEBUG(drm, "Output %s is running on CRTC %d using output %c\n",
		 nouveau_encoder_connector_get(nv_encoder)->base.name,
		 nv_crtc->index, '@' + ffs(nv_encoder->dcb->or));
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp | 
| Ben Skeggs | 99 | 97.06% | 3 | 60.00% | 
| Jani Nikula | 3 | 2.94% | 2 | 40.00% | 
| Total | 102 | 100.00% | 5 | 100.00% | 
static void nv04_tv_destroy(struct drm_encoder *encoder)
{
	get_slave_funcs(encoder)->destroy(encoder);
	drm_encoder_cleanup(encoder);
	kfree(encoder->helper_private);
	kfree(nouveau_encoder(encoder));
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp | 
| Ben Skeggs | 29 | 70.73% | 1 | 33.33% | 
| Francisco Jerez | 12 | 29.27% | 2 | 66.67% | 
| Total | 41 | 100.00% | 3 | 100.00% | 
static const struct drm_encoder_funcs nv04_tv_funcs = {
	.destroy = nv04_tv_destroy,
};
static const struct drm_encoder_helper_funcs nv04_tv_helper_funcs = {
	.dpms = nv04_tv_dpms,
	.mode_fixup = drm_i2c_encoder_mode_fixup,
	.prepare = nv04_tv_prepare,
	.commit = nv04_tv_commit,
	.mode_set = nv04_tv_mode_set,
	.detect = drm_i2c_encoder_detect,
};
int
nv04_tv_create(struct drm_connector *connector, struct dcb_output *entry)
{
	struct nouveau_encoder *nv_encoder;
	struct drm_encoder *encoder;
	struct drm_device *dev = connector->dev;
	struct nouveau_drm *drm = nouveau_drm(dev);
	struct nvkm_i2c *i2c = nvxx_i2c(&drm->client.device);
	struct nvkm_i2c_bus *bus = nvkm_i2c_bus_find(i2c, entry->i2c_index);
	int type, ret;
	/* Ensure that we can talk to this encoder */
	type = nv04_tv_identify(dev, entry->i2c_index);
	if (type < 0)
		return type;
	/* Allocate the necessary memory */
	nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
	if (!nv_encoder)
		return -ENOMEM;
	/* Initialize the common members */
	encoder = to_drm_encoder(nv_encoder);
	drm_encoder_init(dev, encoder, &nv04_tv_funcs, DRM_MODE_ENCODER_TVDAC,
			 NULL);
	drm_encoder_helper_add(encoder, &nv04_tv_helper_funcs);
	nv_encoder->enc_save = drm_i2c_encoder_save;
	nv_encoder->enc_restore = drm_i2c_encoder_restore;
	encoder->possible_crtcs = entry->heads;
	encoder->possible_clones = 0;
	nv_encoder->dcb = entry;
	nv_encoder->or = ffs(entry->or) - 1;
	/* Run the slave-specific initialization */
	ret = drm_i2c_encoder_init(dev, to_encoder_slave(encoder),
				   &bus->i2c,
				   &nv04_tv_encoder_info[type].dev);
	if (ret < 0)
		goto fail_cleanup;
	/* Attach it to the specified connector. */
	get_slave_funcs(encoder)->create_resources(encoder, connector);
	drm_mode_connector_attach_encoder(connector, encoder);
	return 0;
fail_cleanup:
	drm_encoder_cleanup(encoder);
	kfree(nv_encoder);
	return ret;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp | 
| Ben Skeggs | 231 | 85.56% | 9 | 60.00% | 
| Francisco Jerez | 20 | 7.41% | 2 | 13.33% | 
| Daniel Vetter | 12 | 4.44% | 1 | 6.67% | 
| Rob Clark | 3 | 1.11% | 1 | 6.67% | 
| Martin Peres | 2 | 0.74% | 1 | 6.67% | 
| Ville Syrjälä | 2 | 0.74% | 1 | 6.67% | 
| Total | 270 | 100.00% | 15 | 100.00% | 
Overall Contributors
| Person | Tokens | Prop | Commits | CommitProp | 
| Ben Skeggs | 991 | 89.12% | 14 | 58.33% | 
| Francisco Jerez | 53 | 4.77% | 3 | 12.50% | 
| Rob Clark | 41 | 3.69% | 1 | 4.17% | 
| Daniel Vetter | 12 | 1.08% | 1 | 4.17% | 
| Martin Peres | 6 | 0.54% | 1 | 4.17% | 
| Jani Nikula | 4 | 0.36% | 2 | 8.33% | 
| David Howells | 3 | 0.27% | 1 | 4.17% | 
| Ville Syrjälä | 2 | 0.18% | 1 | 4.17% | 
| Total | 1112 | 100.00% | 24 | 100.00% | 
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