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Release 4.16 drivers/net/dsa/mv88e6xxx/phy.c

/*
 * Marvell 88e6xxx Ethernet switch PHY and PPU support
 *
 * Copyright (c) 2008 Marvell Semiconductor
 *
 * Copyright (c) 2017 Andrew Lunn <andrew@lunn.ch>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/mdio.h>
#include <linux/module.h>

#include "chip.h"
#include "phy.h"


int mv88e6165_phy_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus, int addr, int reg, u16 *val) { return mv88e6xxx_read(chip, addr, reg, val); }

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Andrew Lunn37100.00%1100.00%
Total37100.00%1100.00%


int mv88e6165_phy_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus, int addr, int reg, u16 val) { return mv88e6xxx_write(chip, addr, reg, val); }

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Andrew Lunn36100.00%1100.00%
Total36100.00%1100.00%


int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy, int reg, u16 *val) { int addr = phy; /* PHY devices addresses start at 0x0 */ struct mii_bus *bus; bus = mv88e6xxx_default_mdio_bus(chip); if (!bus) return -EOPNOTSUPP; if (!chip->info->ops->phy_read) return -EOPNOTSUPP; return chip->info->ops->phy_read(chip, bus, addr, reg, val); }

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Andrew Lunn82100.00%1100.00%
Total82100.00%1100.00%


int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy, int reg, u16 val) { int addr = phy; /* PHY devices addresses start at 0x0 */ struct mii_bus *bus; bus = mv88e6xxx_default_mdio_bus(chip); if (!bus) return -EOPNOTSUPP; if (!chip->info->ops->phy_write) return -EOPNOTSUPP; return chip->info->ops->phy_write(chip, bus, addr, reg, val); }

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Andrew Lunn81100.00%1100.00%
Total81100.00%1100.00%


static int mv88e6xxx_phy_page_get(struct mv88e6xxx_chip *chip, int phy, u8 page) { return mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE, page); }

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Andrew Lunn2896.55%150.00%
Vivien Didelot13.45%150.00%
Total29100.00%2100.00%


static void mv88e6xxx_phy_page_put(struct mv88e6xxx_chip *chip, int phy) { int err; /* Restore PHY page Copper 0x0 for access via the registered * MDIO bus */ err = mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE, MV88E6XXX_PHY_PAGE_COPPER); if (unlikely(err)) { dev_err(chip->dev, "failed to restore PHY %d page Copper (%d)\n", phy, err); } }

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Andrew Lunn5196.23%150.00%
Vivien Didelot23.77%150.00%
Total53100.00%2100.00%


int mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy, u8 page, int reg, u16 *val) { int err; /* There is no paging for registers 22 */ if (reg == MV88E6XXX_PHY_PAGE) return -EINVAL; err = mv88e6xxx_phy_page_get(chip, phy, page); if (!err) { err = mv88e6xxx_phy_read(chip, phy, reg, val); mv88e6xxx_phy_page_put(chip, phy); } return err; }

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Andrew Lunn7798.72%150.00%
Vivien Didelot11.28%150.00%
Total78100.00%2100.00%


int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy, u8 page, int reg, u16 val) { int err; /* There is no paging for registers 22 */ if (reg == MV88E6XXX_PHY_PAGE) return -EINVAL; err = mv88e6xxx_phy_page_get(chip, phy, page); if (!err) { err = mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE, page); mv88e6xxx_phy_page_put(chip, phy); } return err; }

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Andrew Lunn7597.40%150.00%
Vivien Didelot22.60%150.00%
Total77100.00%2100.00%


static int mv88e6xxx_phy_ppu_disable(struct mv88e6xxx_chip *chip) { if (!chip->info->ops->ppu_disable) return 0; return chip->info->ops->ppu_disable(chip); }

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Andrew Lunn3697.30%150.00%
Vivien Didelot12.70%150.00%
Total37100.00%2100.00%


static int mv88e6xxx_phy_ppu_enable(struct mv88e6xxx_chip *chip) { if (!chip->info->ops->ppu_enable) return 0; return chip->info->ops->ppu_enable(chip); }

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Andrew Lunn3594.59%133.33%
Vivien Didelot25.41%266.67%
Total37100.00%3100.00%


static void mv88e6xxx_phy_ppu_reenable_work(struct work_struct *ugly) { struct mv88e6xxx_chip *chip; chip = container_of(ugly, struct mv88e6xxx_chip, ppu_work); mutex_lock(&chip->reg_lock); if (mutex_trylock(&chip->ppu_mutex)) { if (mv88e6xxx_phy_ppu_enable(chip) == 0) chip->ppu_disabled = 0; mutex_unlock(&chip->ppu_mutex); } mutex_unlock(&chip->reg_lock); }

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Andrew Lunn7797.47%150.00%
Vivien Didelot22.53%150.00%
Total79100.00%2100.00%


static void mv88e6xxx_phy_ppu_reenable_timer(struct timer_list *t) { struct mv88e6xxx_chip *chip = from_timer(chip, t, ppu_timer); schedule_work(&chip->ppu_work); }

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Andrew Lunn2060.61%133.33%
Kees Cook1236.36%133.33%
Vivien Didelot13.03%133.33%
Total33100.00%3100.00%


static int mv88e6xxx_phy_ppu_access_get(struct mv88e6xxx_chip *chip) { int ret; mutex_lock(&chip->ppu_mutex); /* If the PHY polling unit is enabled, disable it so that * we can access the PHY registers. If it was already * disabled, cancel the timer that is going to re-enable * it. */ if (!chip->ppu_disabled) { ret = mv88e6xxx_phy_ppu_disable(chip); if (ret < 0) { mutex_unlock(&chip->ppu_mutex); return ret; } chip->ppu_disabled = 1; } else { del_timer(&chip->ppu_timer); ret = 0; } return ret; }

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Andrew Lunn8097.56%150.00%
Vivien Didelot22.44%150.00%
Total82100.00%2100.00%


static void mv88e6xxx_phy_ppu_access_put(struct mv88e6xxx_chip *chip) { /* Schedule a timer to re-enable the PHY polling unit. */ mod_timer(&chip->ppu_timer, jiffies + msecs_to_jiffies(10)); mutex_unlock(&chip->ppu_mutex); }

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Andrew Lunn3497.14%150.00%
Vivien Didelot12.86%150.00%
Total35100.00%2100.00%


static void mv88e6xxx_phy_ppu_state_init(struct mv88e6xxx_chip *chip) { mutex_init(&chip->ppu_mutex); INIT_WORK(&chip->ppu_work, mv88e6xxx_phy_ppu_reenable_work); timer_setup(&chip->ppu_timer, mv88e6xxx_phy_ppu_reenable_timer, 0); }

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Andrew Lunn3687.80%133.33%
Vivien Didelot37.32%133.33%
Kees Cook24.88%133.33%
Total41100.00%3100.00%


static void mv88e6xxx_phy_ppu_state_destroy(struct mv88e6xxx_chip *chip) { del_timer_sync(&chip->ppu_timer); }

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Andrew Lunn1894.74%150.00%
Vivien Didelot15.26%150.00%
Total19100.00%2100.00%


int mv88e6185_phy_ppu_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus, int addr, int reg, u16 *val) { int err; err = mv88e6xxx_phy_ppu_access_get(chip); if (!err) { err = mv88e6xxx_read(chip, addr, reg, val); mv88e6xxx_phy_ppu_access_put(chip); } return err; }

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Andrew Lunn6095.24%133.33%
Vivien Didelot34.76%266.67%
Total63100.00%3100.00%


int mv88e6185_phy_ppu_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus, int addr, int reg, u16 val) { int err; err = mv88e6xxx_phy_ppu_access_get(chip); if (!err) { err = mv88e6xxx_write(chip, addr, reg, val); mv88e6xxx_phy_ppu_access_put(chip); } return err; }

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Andrew Lunn5995.16%133.33%
Vivien Didelot34.84%266.67%
Total62100.00%3100.00%


void mv88e6xxx_phy_init(struct mv88e6xxx_chip *chip) { if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable) mv88e6xxx_phy_ppu_state_init(chip); }

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Andrew Lunn3296.97%150.00%
Vivien Didelot13.03%150.00%
Total33100.00%2100.00%


void mv88e6xxx_phy_destroy(struct mv88e6xxx_chip *chip) { if (chip->info->ops->ppu_enable && chip->info->ops->ppu_disable) mv88e6xxx_phy_ppu_state_destroy(chip); }

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Andrew Lunn3296.97%150.00%
Vivien Didelot13.03%150.00%
Total33100.00%2100.00%


int mv88e6xxx_phy_setup(struct mv88e6xxx_chip *chip) { return mv88e6xxx_phy_ppu_enable(chip); }

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Vivien Didelot16100.00%2100.00%
Total16100.00%2100.00%


Overall Contributors

PersonTokensPropCommitsCommitProp
Andrew Lunn99894.51%114.29%
Vivien Didelot444.17%571.43%
Kees Cook141.33%114.29%
Total1056100.00%7100.00%
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