cregit-Linux how code gets into the kernel

Release 4.16 drivers/net/ethernet/mellanox/mlx5/core/en_common.c

/*
 * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#include "en.h"

/* mlx5e global resources should be placed in this file.
 * Global resources are common to all the netdevices crated on the same nic.
 */


int mlx5e_create_tir(struct mlx5_core_dev *mdev, struct mlx5e_tir *tir, u32 *in, int inlen) { int err; err = mlx5_core_create_tir(mdev, in, inlen, &tir->tirn); if (err) return err; list_add(&tir->list, &mdev->mlx5e_res.td.tirs_list); return 0; }

Contributors

PersonTokensPropCommitsCommitProp
Hadar Hen Zion68100.00%1100.00%
Total68100.00%1100.00%


void mlx5e_destroy_tir(struct mlx5_core_dev *mdev, struct mlx5e_tir *tir) { mlx5_core_destroy_tir(mdev, tir->tirn); list_del(&tir->list); }

Contributors

PersonTokensPropCommitsCommitProp
Hadar Hen Zion32100.00%1100.00%
Total32100.00%1100.00%


static int mlx5e_create_mkey(struct mlx5_core_dev *mdev, u32 pdn, struct mlx5_core_mkey *mkey) { int inlen = MLX5_ST_SZ_BYTES(create_mkey_in); void *mkc; u32 *in; int err; in = kvzalloc(inlen, GFP_KERNEL); if (!in) return -ENOMEM; mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry); MLX5_SET(mkc, mkc, access_mode, MLX5_MKC_ACCESS_MODE_PA); MLX5_SET(mkc, mkc, lw, 1); MLX5_SET(mkc, mkc, lr, 1); MLX5_SET(mkc, mkc, pd, pdn); MLX5_SET(mkc, mkc, length64, 1); MLX5_SET(mkc, mkc, qpn, 0xffffff); err = mlx5_core_create_mkey(mdev, mkey, in, inlen); kvfree(in); return err; }

Contributors

PersonTokensPropCommitsCommitProp
Saeed Mahameed8253.25%133.33%
Hadar Hen Zion6944.81%133.33%
Leon Romanovsky31.95%133.33%
Total154100.00%3100.00%


int mlx5e_create_mdev_resources(struct mlx5_core_dev *mdev) { struct mlx5e_resources *res = &mdev->mlx5e_res; int err; err = mlx5_core_alloc_pd(mdev, &res->pdn); if (err) { mlx5_core_err(mdev, "alloc pd failed, %d\n", err); return err; } err = mlx5_core_alloc_transport_domain(mdev, &res->td.tdn); if (err) { mlx5_core_err(mdev, "alloc td failed, %d\n", err); goto err_dealloc_pd; } err = mlx5e_create_mkey(mdev, res->pdn, &res->mkey); if (err) { mlx5_core_err(mdev, "create mkey failed, %d\n", err); goto err_dealloc_transport_domain; } err = mlx5_alloc_bfreg(mdev, &res->bfreg, false, false); if (err) { mlx5_core_err(mdev, "alloc bfreg failed, %d\n", err); goto err_destroy_mkey; } INIT_LIST_HEAD(&mdev->mlx5e_res.td.tirs_list); return 0; err_destroy_mkey: mlx5_core_destroy_mkey(mdev, &res->mkey); err_dealloc_transport_domain: mlx5_core_dealloc_transport_domain(mdev, res->td.tdn); err_dealloc_pd: mlx5_core_dealloc_pd(mdev, res->pdn); return err; }

Contributors

PersonTokensPropCommitsCommitProp
Hadar Hen Zion15876.33%250.00%
Saeed Mahameed4622.22%125.00%
Eli Cohen31.45%125.00%
Total207100.00%4100.00%


void mlx5e_destroy_mdev_resources(struct mlx5_core_dev *mdev) { struct mlx5e_resources *res = &mdev->mlx5e_res; mlx5_free_bfreg(mdev, &res->bfreg); mlx5_core_destroy_mkey(mdev, &res->mkey); mlx5_core_dealloc_transport_domain(mdev, res->td.tdn); mlx5_core_dealloc_pd(mdev, res->pdn); memset(res, 0, sizeof(*res)); }

Contributors

PersonTokensPropCommitsCommitProp
Hadar Hen Zion5068.49%133.33%
Alex Vesker1317.81%133.33%
Saeed Mahameed1013.70%133.33%
Total73100.00%3100.00%


int mlx5e_refresh_tirs(struct mlx5e_priv *priv, bool enable_uc_lb) { struct mlx5_core_dev *mdev = priv->mdev; struct mlx5e_tir *tir; int err = -ENOMEM; u32 tirn = 0; int inlen; void *in; inlen = MLX5_ST_SZ_BYTES(modify_tir_in); in = kvzalloc(inlen, GFP_KERNEL); if (!in) goto out; if (enable_uc_lb) MLX5_SET(modify_tir_in, in, ctx.self_lb_block, MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_); MLX5_SET(modify_tir_in, in, bitmask.self_lb_en, 1); list_for_each_entry(tir, &mdev->mlx5e_res.td.tirs_list, list) { tirn = tir->tirn; err = mlx5_core_modify_tir(mdev, tirn, in, inlen); if (err) goto out; } out: kvfree(in); if (err) netdev_err(priv->netdev, "refresh tir(0x%x) failed, %d\n", tirn, err); return err; }

Contributors

PersonTokensPropCommitsCommitProp
Hadar Hen Zion8049.38%120.00%
Saeed Mahameed7143.83%240.00%
Kamal Heib84.94%120.00%
Leon Romanovsky31.85%120.00%
Total162100.00%5100.00%


u8 mlx5e_params_calculate_tx_min_inline(struct mlx5_core_dev *mdev) { u8 min_inline_mode; mlx5_query_min_inline(mdev, &min_inline_mode); if (min_inline_mode == MLX5_INLINE_MODE_NONE && !MLX5_CAP_ETH(mdev, wqe_vlan_insert)) min_inline_mode = MLX5_INLINE_MODE_L2; return min_inline_mode; }

Contributors

PersonTokensPropCommitsCommitProp
Huy Nguyen42100.00%1100.00%
Total42100.00%1100.00%


Overall Contributors

PersonTokensPropCommitsCommitProp
Hadar Hen Zion46262.18%218.18%
Saeed Mahameed20928.13%436.36%
Huy Nguyen425.65%19.09%
Alex Vesker131.75%19.09%
Kamal Heib81.08%19.09%
Leon Romanovsky60.81%19.09%
Eli Cohen30.40%19.09%
Total743100.00%11100.00%
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