Release 4.16 drivers/pci/dwc/pci-exynos.c

// SPDX-License-Identifier: GPL-2.0
/*
 * PCIe host controller driver for Samsung EXYNOS SoCs
 *
 * Copyright (C) 2013 Samsung Electronics Co., Ltd.
 *              http://www.samsung.com
 *
 * Author: Jingoo Han <jg1.han@samsung.com>
 */

#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/of_device.h>
#include <linux/of_gpio.h>
#include <linux/pci.h>
#include <linux/platform_device.h>
#include <linux/phy/phy.h>
#include <linux/resource.h>
#include <linux/signal.h>
#include <linux/types.h>

#include "pcie-designware.h"


#define to_exynos_pcie(x)	dev_get_drvdata((x)->dev)

/* PCIe ELBI registers */

#define PCIE_IRQ_PULSE			0x000

#define IRQ_INTA_ASSERT			BIT(0)

#define IRQ_INTB_ASSERT			BIT(2)

#define IRQ_INTC_ASSERT			BIT(4)

#define IRQ_INTD_ASSERT			BIT(6)

#define PCIE_IRQ_LEVEL			0x004

#define PCIE_IRQ_SPECIAL		0x008

#define PCIE_IRQ_EN_PULSE		0x00c

#define PCIE_IRQ_EN_LEVEL		0x010

#define IRQ_MSI_ENABLE			BIT(2)

#define PCIE_IRQ_EN_SPECIAL		0x014

#define PCIE_PWR_RESET			0x018

#define PCIE_CORE_RESET			0x01c

#define PCIE_CORE_RESET_ENABLE		BIT(0)

#define PCIE_STICKY_RESET		0x020

#define PCIE_NONSTICKY_RESET		0x024

#define PCIE_APP_INIT_RESET		0x028

#define PCIE_APP_LTSSM_ENABLE		0x02c

#define PCIE_ELBI_RDLH_LINKUP		0x064

#define PCIE_ELBI_LTSSM_ENABLE		0x1

#define PCIE_ELBI_SLV_AWMISC		0x11c

#define PCIE_ELBI_SLV_ARMISC		0x120

#define PCIE_ELBI_SLV_DBI_ENABLE	BIT(21)


struct exynos_pcie_mem_res {
	
void __iomem *elbi_base;   /* DT 0th resource: PCIe CTRL */
};


struct exynos_pcie_clk_res {
	
struct clk *clk;
	
struct clk *bus_clk;
};


struct exynos_pcie {
	
struct dw_pcie			*pci;
	
struct exynos_pcie_mem_res	*mem_res;
	
struct exynos_pcie_clk_res	*clk_res;
	
const struct exynos_pcie_ops	*ops;
	
int				reset_gpio;

	
struct phy			*phy;
};


struct exynos_pcie_ops {
	
int (*get_mem_resources)(struct platform_device *pdev,
			struct exynos_pcie *ep);
	
int (*get_clk_resources)(struct exynos_pcie *ep);
	
int (*init_clk_resources)(struct exynos_pcie *ep);
	
void (*deinit_clk_resources)(struct exynos_pcie *ep);
};



static int exynos5440_pcie_get_mem_resources(struct platform_device *pdev,
					     struct exynos_pcie *ep)
{
	struct dw_pcie *pci = ep->pci;
	struct device *dev = pci->dev;
	struct resource *res;

	ep->mem_res = devm_kzalloc(dev, sizeof(*ep->mem_res), GFP_KERNEL);
	if (!ep->mem_res)
		return -ENOMEM;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	ep->mem_res->elbi_base = devm_ioremap_resource(dev, res);
	if (IS_ERR(ep->mem_res->elbi_base))
		return PTR_ERR(ep->mem_res->elbi_base);

	return 0;
}

Contributors
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Niyas Ahmed S T
80
68.38%
1
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Björn Helgaas
13
11.11%
2
20.00%
Jaehoon Chung
10
8.55%
5
50.00%
Seungwon Jeon
8
6.84%
1
10.00%
Jingoo Han
6
5.13%
1
10.00%
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117
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10
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static int exynos5440_pcie_get_clk_resources(struct exynos_pcie *ep)
{
	struct dw_pcie *pci = ep->pci;
	struct device *dev = pci->dev;

	ep->clk_res = devm_kzalloc(dev, sizeof(*ep->clk_res), GFP_KERNEL);
	if (!ep->clk_res)
		return -ENOMEM;

	ep->clk_res->clk = devm_clk_get(dev, "pcie");
	if (IS_ERR(ep->clk_res->clk)) {
		dev_err(dev, "Failed to get pcie rc clock\n");
		return PTR_ERR(ep->clk_res->clk);
	}

	ep->clk_res->bus_clk = devm_clk_get(dev, "pcie_bus");
	if (IS_ERR(ep->clk_res->bus_clk)) {
		dev_err(dev, "Failed to get pcie bus clock\n");
		return PTR_ERR(ep->clk_res->bus_clk);
	}

	return 0;
}

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Niyas Ahmed S T
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static int exynos5440_pcie_init_clk_resources(struct exynos_pcie *ep)
{
	struct dw_pcie *pci = ep->pci;
	struct device *dev = pci->dev;
	int ret;

	ret = clk_prepare_enable(ep->clk_res->clk);
	if (ret) {
		dev_err(dev, "cannot enable pcie rc clock");
		return ret;
	}

	ret = clk_prepare_enable(ep->clk_res->bus_clk);
	if (ret) {
		dev_err(dev, "cannot enable pcie bus clock");
		goto err_bus_clk;
	}

	return 0;

err_bus_clk:
	clk_disable_unprepare(ep->clk_res->clk);

	return ret;
}

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Niyas Ahmed S T
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Björn Helgaas
10
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static void exynos5440_pcie_deinit_clk_resources(struct exynos_pcie *ep)
{
	clk_disable_unprepare(ep->clk_res->bus_clk);
	clk_disable_unprepare(ep->clk_res->clk);
}

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Niyas Ahmed S T
27
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Seungwon Jeon
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static const struct exynos_pcie_ops exynos5440_pcie_ops = {
	.get_mem_resources	= exynos5440_pcie_get_mem_resources,
	.get_clk_resources	= exynos5440_pcie_get_clk_resources,
	.init_clk_resources	= exynos5440_pcie_init_clk_resources,
	.deinit_clk_resources	= exynos5440_pcie_deinit_clk_resources,
};



static void exynos_pcie_writel(void __iomem *base, u32 val, u32 reg)
{
	writel(val, base + reg);
}

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Niyas Ahmed S T
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static u32 exynos_pcie_readl(void __iomem *base, u32 reg)
{
	return readl(base + reg);
}

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Seungwon Jeon
17
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Niyas Ahmed S T
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static void exynos_pcie_sideband_dbi_w_mode(struct exynos_pcie *ep, bool on)
{
	u32 val;

	val = exynos_pcie_readl(ep->mem_res->elbi_base, PCIE_ELBI_SLV_AWMISC);
	if (on)
		val |= PCIE_ELBI_SLV_DBI_ENABLE;
	else
		val &= ~PCIE_ELBI_SLV_DBI_ENABLE;
	exynos_pcie_writel(ep->mem_res->elbi_base, val, PCIE_ELBI_SLV_AWMISC);
}

Contributors
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Jingoo Han
37
64.91%
1
16.67%
Niyas Ahmed S T
13
22.81%
1
16.67%
Jaehoon Chung
4
7.02%
2
33.33%
Seungwon Jeon
2
3.51%
1
16.67%
Björn Helgaas
1
1.75%
1
16.67%
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57
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6
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static void exynos_pcie_sideband_dbi_r_mode(struct exynos_pcie *ep, bool on)
{
	u32 val;

	val = exynos_pcie_readl(ep->mem_res->elbi_base, PCIE_ELBI_SLV_ARMISC);
	if (on)
		val |= PCIE_ELBI_SLV_DBI_ENABLE;
	else
		val &= ~PCIE_ELBI_SLV_DBI_ENABLE;
	exynos_pcie_writel(ep->mem_res->elbi_base, val, PCIE_ELBI_SLV_ARMISC);
}

Contributors
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Jaehoon Chung
29
50.88%
3
42.86%
Jingoo Han
22
38.60%
1
14.29%
Niyas Ahmed S T
4
7.02%
1
14.29%
Björn Helgaas
1
1.75%
1
14.29%
Seungwon Jeon
1
1.75%
1
14.29%
Total
57
100.00%
7
100.00%



static void exynos_pcie_assert_core_reset(struct exynos_pcie *ep)
{
	u32 val;

	val = exynos_pcie_readl(ep->mem_res->elbi_base, PCIE_CORE_RESET);
	val &= ~PCIE_CORE_RESET_ENABLE;
	exynos_pcie_writel(ep->mem_res->elbi_base, val, PCIE_CORE_RESET);
	exynos_pcie_writel(ep->mem_res->elbi_base, 0, PCIE_PWR_RESET);
	exynos_pcie_writel(ep->mem_res->elbi_base, 0, PCIE_STICKY_RESET);
	exynos_pcie_writel(ep->mem_res->elbi_base, 0, PCIE_NONSTICKY_RESET);
}

Contributors
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Jaehoon Chung
50
59.52%
3
50.00%
Jingoo Han
20
23.81%
1
16.67%
Niyas Ahmed S T
10
11.90%
1
16.67%
Seungwon Jeon
4
4.76%
1
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84
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6
100.00%



static void exynos_pcie_deassert_core_reset(struct exynos_pcie *ep)
{
	u32 val;

	val = exynos_pcie_readl(ep->mem_res->elbi_base, PCIE_CORE_RESET);
	val |= PCIE_CORE_RESET_ENABLE;

	exynos_pcie_writel(ep->mem_res->elbi_base, val, PCIE_CORE_RESET);
	exynos_pcie_writel(ep->mem_res->elbi_base, 1, PCIE_STICKY_RESET);
	exynos_pcie_writel(ep->mem_res->elbi_base, 1, PCIE_NONSTICKY_RESET);
	exynos_pcie_writel(ep->mem_res->elbi_base, 1, PCIE_APP_INIT_RESET);
	exynos_pcie_writel(ep->mem_res->elbi_base, 0, PCIE_APP_INIT_RESET);
}

Contributors
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Jaehoon Chung
54
56.25%
3
50.00%
Jingoo Han
25
26.04%
1
16.67%
Niyas Ahmed S T
12
12.50%
1
16.67%
Seungwon Jeon
5
5.21%
1
16.67%
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96
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6
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static void exynos_pcie_assert_reset(struct exynos_pcie *ep)
{
	struct dw_pcie *pci = ep->pci;
	struct device *dev = pci->dev;

	if (ep->reset_gpio >= 0)
		devm_gpio_request_one(dev, ep->reset_gpio,
				GPIOF_OUT_INIT_HIGH, "RESET");
}

Contributors
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CommitProp
Jingoo Han
32
64.00%
1
20.00%
Björn Helgaas
10
20.00%
2
40.00%
Jaehoon Chung
4
8.00%
1
20.00%
Kishon Vijay Abraham I
4
8.00%
1
20.00%
Total
50
100.00%
5
100.00%



static int exynos_pcie_establish_link(struct exynos_pcie *ep)
{
	struct dw_pcie *pci = ep->pci;
	struct pcie_port *pp = &pci->pp;
	struct device *dev = pci->dev;

	if (dw_pcie_link_up(pci)) {
		dev_err(dev, "Link already up\n");
		return 0;
	}

	exynos_pcie_assert_core_reset(ep);

	phy_reset(ep->phy);

	exynos_pcie_writel(ep->mem_res->elbi_base, 1,
			PCIE_PWR_RESET);

	phy_power_on(ep->phy);
	phy_init(ep->phy);

	exynos_pcie_deassert_core_reset(ep);
	dw_pcie_setup_rc(pp);
	exynos_pcie_assert_reset(ep);

	/* assert LTSSM enable */
	exynos_pcie_writel(ep->mem_res->elbi_base, PCIE_ELBI_LTSSM_ENABLE,
			  PCIE_APP_LTSSM_ENABLE);

	/* check if the link is up or not */
	if (!dw_pcie_wait_for_link(pci))
		return 0;

	phy_power_off(ep->phy);
	return -ETIMEDOUT;
}

Contributors
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CommitProp
Jingoo Han
67
44.97%
1
8.33%
Jaehoon Chung
47
31.54%
3
25.00%
Björn Helgaas
18
12.08%
4
33.33%
Kishon Vijay Abraham I
12
8.05%
1
8.33%
Niyas Ahmed S T
2
1.34%
1
8.33%
Joao Pinto
2
1.34%
1
8.33%
Seungwon Jeon
1
0.67%
1
8.33%
Total
149
100.00%
12
100.00%



static void exynos_pcie_clear_irq_pulse(struct exynos_pcie *ep)
{
	u32 val;

	val = exynos_pcie_readl(ep->mem_res->elbi_base, PCIE_IRQ_PULSE);
	exynos_pcie_writel(ep->mem_res->elbi_base, val, PCIE_IRQ_PULSE);
}

Contributors
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Jingoo Han
24
60.00%
1
16.67%
Jaehoon Chung
9
22.50%
2
33.33%
Niyas Ahmed S T
4
10.00%
1
16.67%
Seungwon Jeon
2
5.00%
1
16.67%
Björn Helgaas
1
2.50%
1
16.67%
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40
100.00%
6
100.00%



static void exynos_pcie_enable_irq_pulse(struct exynos_pcie *ep)
{
	u32 val;

	/* enable INTX interrupt */
	val = IRQ_INTA_ASSERT | IRQ_INTB_ASSERT |
		IRQ_INTC_ASSERT | IRQ_INTD_ASSERT;
	exynos_pcie_writel(ep->mem_res->elbi_base, val, PCIE_IRQ_EN_PULSE);
}

Contributors
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Jingoo Han
28
73.68%
1
14.29%
Jaehoon Chung
6
15.79%
3
42.86%
Niyas Ahmed S T
2
5.26%
1
14.29%
Seungwon Jeon
1
2.63%
1
14.29%
Björn Helgaas
1
2.63%
1
14.29%
Total
38
100.00%
7
100.00%



static irqreturn_t exynos_pcie_irq_handler(int irq, void *arg)
{
	struct exynos_pcie *ep = arg;

	exynos_pcie_clear_irq_pulse(ep);
	return IRQ_HANDLED;
}

Contributors
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Jingoo Han
25
89.29%
1
33.33%
Jaehoon Chung
2
7.14%
1
33.33%
Björn Helgaas
1
3.57%
1
33.33%
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28
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static irqreturn_t exynos_pcie_msi_irq_handler(int irq, void *arg)
{
	struct exynos_pcie *ep = arg;
	struct dw_pcie *pci = ep->pci;
	struct pcie_port *pp = &pci->pp;

	return dw_handle_msi_irq(pp);
}

Contributors
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Jingoo Han
24
53.33%
1
16.67%
Björn Helgaas
10
22.22%
2
33.33%
Kishon Vijay Abraham I
9
20.00%
1
16.67%
Lucas Stach
1
2.22%
1
16.67%
Jaehoon Chung
1
2.22%
1
16.67%
Total
45
100.00%
6
100.00%



static void exynos_pcie_msi_init(struct exynos_pcie *ep)
{
	struct dw_pcie *pci = ep->pci;
	struct pcie_port *pp = &pci->pp;
	u32 val;

	dw_pcie_msi_init(pp);

	/* enable MSI interrupt */
	val = exynos_pcie_readl(ep->mem_res->elbi_base, PCIE_IRQ_EN_LEVEL);
	val |= IRQ_MSI_ENABLE;
	exynos_pcie_writel(ep->mem_res->elbi_base, val, PCIE_IRQ_EN_LEVEL);
}

Contributors
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Jingoo Han
38
55.07%
1
14.29%
Jaehoon Chung
9
13.04%
2
28.57%
Kishon Vijay Abraham I
9
13.04%
1
14.29%
Björn Helgaas
9
13.04%
2
28.57%
Niyas Ahmed S T
4
5.80%
1
14.29%
Total
69
100.00%
7
100.00%



static void exynos_pcie_enable_interrupts(struct exynos_pcie *ep)
{
	exynos_pcie_enable_irq_pulse(ep);

	if (IS_ENABLED(CONFIG_PCI_MSI))
		exynos_pcie_msi_init(ep);
}

Contributors
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Jingoo Han
24
85.71%
2
50.00%
Jaehoon Chung
3
10.71%
1
25.00%
Björn Helgaas
1
3.57%
1
25.00%
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28
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4
100.00%



static u32 exynos_pcie_read_dbi(struct dw_pcie *pci, void __iomem *base,
				u32 reg, size_t size)
{
	struct exynos_pcie *ep = to_exynos_pcie(pci);
	u32 val;

	exynos_pcie_sideband_dbi_r_mode(ep, true);
	dw_pcie_read(base + reg, size, &val);
	exynos_pcie_sideband_dbi_r_mode(ep, false);
	return val;
}

Contributors
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Jingoo Han
23
35.94%
1
12.50%
Björn Helgaas
19
29.69%
3
37.50%
Kishon Vijay Abraham I
19
29.69%
3
37.50%
Jaehoon Chung
3
4.69%
1
12.50%
Total
64
100.00%
8
100.00%



static void exynos_pcie_write_dbi(struct dw_pcie *pci, void __iomem *base,
				  u32 reg, size_t size, u32 val)
{
	struct exynos_pcie *ep = to_exynos_pcie(pci);

	exynos_pcie_sideband_dbi_w_mode(ep, true);
	dw_pcie_write(base + reg, size, val);
	exynos_pcie_sideband_dbi_w_mode(ep, false);
}

Contributors
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CommitProp
Jingoo Han
25
41.67%
1
12.50%
Kishon Vijay Abraham I
18
30.00%
3
37.50%
Björn Helgaas
14
23.33%
3
37.50%
Jaehoon Chung
3
5.00%
1
12.50%
Total
60
100.00%
8
100.00%



static int exynos_pcie_rd_own_conf(struct pcie_port *pp, int where, int size,
				u32 *val)
{
	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
	struct exynos_pcie *ep = to_exynos_pcie(pci);
	int ret;

	exynos_pcie_sideband_dbi_r_mode(ep, true);
	ret = dw_pcie_read(pci->dbi_base + where, size, val);
	exynos_pcie_sideband_dbi_r_mode(ep, false);
	return ret;
}

Contributors
Person
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CommitProp
Jingoo Han
52
68.42%
1
20.00%
Kishon Vijay Abraham I
13
17.11%
2
40.00%
Björn Helgaas
8
10.53%
1
20.00%
Jaehoon Chung
3
3.95%
1
20.00%
Total
76
100.00%
5
100.00%



static int exynos_pcie_wr_own_conf(struct pcie_port *pp, int where, int size,
				u32 val)
{
	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
	struct exynos_pcie *ep = to_exynos_pcie(pci);
	int ret;

	exynos_pcie_sideband_dbi_w_mode(ep, true);
	ret = dw_pcie_write(pci->dbi_base + where, size, val);
	exynos_pcie_sideband_dbi_w_mode(ep, false);
	return ret;
}

Contributors
Person
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CommitProp
Jingoo Han
51
68.00%
1
20.00%
Kishon Vijay Abraham I
13
17.33%
2
40.00%
Björn Helgaas
8
10.67%
1
20.00%
Jaehoon Chung
3
4.00%
1
20.00%
Total
75
100.00%
5
100.00%



static int exynos_pcie_link_up(struct dw_pcie *pci)
{
	struct exynos_pcie *ep = to_exynos_pcie(pci);
	u32 val;

	val = exynos_pcie_readl(ep->mem_res->elbi_base, PCIE_ELBI_RDLH_LINKUP);
	if (val == PCIE_ELBI_LTSSM_ENABLE)
		return 1;

	return 0;
}

Contributors
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Jingoo Han
34
69.39%
1
14.29%
Jaehoon Chung
5
10.20%
2
28.57%
Björn Helgaas
4
8.16%
1
14.29%
Kishon Vijay Abraham I
3
6.12%
1
14.29%
Niyas Ahmed S T
2
4.08%
1
14.29%
Seungwon Jeon
1
2.04%
1
14.29%
Total
49
100.00%
7
100.00%



static int exynos_pcie_host_init(struct pcie_port *pp)
{
	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
	struct exynos_pcie *ep = to_exynos_pcie(pci);

	exynos_pcie_establish_link(ep);
	exynos_pcie_enable_interrupts(ep);

	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Jingoo Han
17
38.64%
1
20.00%
Kishon Vijay Abraham I
11
25.00%
1
20.00%
Björn Helgaas
9
20.45%
1
20.00%
Björn Andersson
4
9.09%
1
20.00%
Jaehoon Chung
3
6.82%
1
20.00%
Total
44
100.00%
5
100.00%


static const struct dw_pcie_host_ops exynos_pcie_host_ops = {
	.rd_own_conf = exynos_pcie_rd_own_conf,
	.wr_own_conf = exynos_pcie_wr_own_conf,
	.host_init = exynos_pcie_host_init,
};



static int __init exynos_add_pcie_port(struct exynos_pcie *ep,
				       struct platform_device *pdev)
{
	struct dw_pcie *pci = ep->pci;
	struct pcie_port *pp = &pci->pp;
	struct device *dev = &pdev->dev;
	int ret;

	pp->irq = platform_get_irq(pdev, 1);
	if (pp->irq < 0) {
		dev_err(dev, "failed to get irq\n");
		return pp->irq;
	}
	ret = devm_request_irq(dev, pp->irq, exynos_pcie_irq_handler,
				IRQF_SHARED, "exynos-pcie", ep);
	if (ret) {
		dev_err(dev, "failed to request irq\n");
		return ret;
	}

	if (IS_ENABLED(CONFIG_PCI_MSI)) {
		pp->msi_irq = platform_get_irq(pdev, 0);
		if (pp->msi_irq < 0) {
			dev_err(dev, "failed to get msi irq\n");
			return pp->msi_irq;
		}

		ret = devm_request_irq(dev, pp->msi_irq,
					exynos_pcie_msi_irq_handler,
					IRQF_SHARED | IRQF_NO_THREAD,
					"exynos-pcie", ep);
		if (ret) {
			dev_err(dev, "failed to request msi irq\n");
			return ret;
		}
	}

	pp->root_bus_nr = -1;
	pp->ops = &exynos_pcie_host_ops;

	ret = dw_pcie_host_init(pp);
	if (ret) {
		dev_err(dev, "failed to initialize host\n");
		return ret;
	}

	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Jingoo Han
190
80.51%
3
27.27%
Björn Helgaas
19
8.05%
3
27.27%
Kishon Vijay Abraham I
11
4.66%
1
9.09%
Fabio Estevam
10
4.24%
1
9.09%
Jaehoon Chung
3
1.27%
1
9.09%
Grygorii Strashko
2
0.85%
1
9.09%
Sachin Kamat
1
0.42%
1
9.09%
Total
236
100.00%
11
100.00%


static const struct dw_pcie_ops dw_pcie_ops = {
	.read_dbi = exynos_pcie_read_dbi,
	.write_dbi = exynos_pcie_write_dbi,
	.link_up = exynos_pcie_link_up,
};



static int __init exynos_pcie_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct dw_pcie *pci;
	struct exynos_pcie *ep;
	struct device_node *np = dev->of_node;
	int ret;

	ep = devm_kzalloc(dev, sizeof(*ep), GFP_KERNEL);
	if (!ep)
		return -ENOMEM;

	pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL);
	if (!pci)
		return -ENOMEM;

	pci->dev = dev;
	pci->ops = &dw_pcie_ops;

	ep->pci = pci;
	ep->ops = (const struct exynos_pcie_ops *)
		of_device_get_match_data(dev);

	ep->reset_gpio = of_get_named_gpio(np, "reset-gpio", 0);

	ep->phy = devm_of_phy_get(dev, np, NULL);
	if (IS_ERR(ep->phy)) {
		if (PTR_ERR(ep->phy) == -EPROBE_DEFER)
			return PTR_ERR(ep->phy);

		ep->phy = NULL;
	}

	if (ep->ops && ep->ops->get_mem_resources) {
		ret = ep->ops->get_mem_resources(pdev, ep);
		if (ret)
			return ret;
	}

	if (ep->ops && ep->ops->get_clk_resources &&
			ep->ops->init_clk_resources) {
		ret = ep->ops->get_clk_resources(ep);
		if (ret)
			return ret;
		ret = ep->ops->init_clk_resources(ep);
		if (ret)
			return ret;
	}

	platform_set_drvdata(pdev, ep);

	ret = exynos_add_pcie_port(ep, pdev);
	if (ret < 0)
		goto fail_probe;

	return 0;

fail_probe:
	phy_exit(ep->phy);

	if (ep->ops && ep->ops->deinit_clk_resources)
		ep->ops->deinit_clk_resources(ep);
	return ret;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Jingoo Han
153
45.00%
2
15.38%
Niyas Ahmed S T
74
21.76%
1
7.69%
Jaehoon Chung
54
15.88%
4
30.77%
Björn Helgaas
27
7.94%
2
15.38%
Kishon Vijay Abraham I
16
4.71%
2
15.38%
Wei Yongjun
10
2.94%
1
7.69%
Guenter Roeck
6
1.76%
1
7.69%
Total
340
100.00%
13
100.00%



static int __exit exynos_pcie_remove(struct platform_device *pdev)
{
	struct exynos_pcie *ep = platform_get_drvdata(pdev);

	if (ep->ops && ep->ops->deinit_clk_resources)
		ep->ops->deinit_clk_resources(ep);

	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Jingoo Han
28
60.87%
1
33.33%
Niyas Ahmed S T
15
32.61%
1
33.33%
Jaehoon Chung
3
6.52%
1
33.33%
Total
46
100.00%
3
100.00%


static const struct of_device_id exynos_pcie_of_match[] = {
	{
		.compatible = "samsung,exynos5440-pcie",
		.data = &exynos5440_pcie_ops
	},
	{},
};


static struct platform_driver exynos_pcie_driver = {
	.remove		= __exit_p(exynos_pcie_remove),
	.driver = {
		.name	= "exynos-pcie",
		.of_match_table = exynos_pcie_of_match,
        },
};

/* Exynos PCIe driver does not allow module unload */



static int __init exynos_pcie_init(void)
{
	return platform_driver_probe(&exynos_pcie_driver, exynos_pcie_probe);
}
Contributors
Person
Tokens
Prop
Commits
CommitProp
Jingoo Han
18
100.00%
2
100.00%
Total
18
100.00%
2
100.00%

subsys_initcall(exynos_pcie_init);
Overall Contributors
Person
Tokens
Prop
Commits
CommitProp
Jingoo Han
1167
45.01%
3
7.89%
Niyas Ahmed S T
609
23.49%
1
2.63%
Jaehoon Chung
352
13.58%
9
23.68%
Björn Helgaas
194
7.48%
9
23.68%
Kishon Vijay Abraham I
163
6.29%
5
13.16%
Seungwon Jeon
70
2.70%
1
2.63%
Wei Yongjun
10
0.39%
1
2.63%
Fabio Estevam
10
0.39%
1
2.63%
Guenter Roeck
6
0.23%
1
2.63%
Björn Andersson
4
0.15%
1
2.63%
Grygorii Strashko
2
0.08%
1
2.63%
Joao Pinto
2
0.08%
1
2.63%
JiSheng Zhang
1
0.04%
1
2.63%
Sachin Kamat
1
0.04%
1
2.63%
Lucas Stach
1
0.04%
1
2.63%
Paul Gortmaker
1
0.04%
1
2.63%
Total
2593
100.00%
38
100.00%
Directory: drivers/pci/dwc

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