Release 4.17 drivers/gpu/drm/amd/include/asic_reg/umc/umc_6_0_offset.h

/*
 * Copyright (C) 2017  Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included
 * in all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */

#ifndef _umc_6_0_OFFSET_H_

#define _umc_6_0_OFFSET_H_


#define mmUMCCH0_0_EccCtrl				0x0053

#define mmUMCCH0_0_EccCtrl_BASE_IDX			0

#define mmUMCCH1_0_EccCtrl				0x0853

#define mmUMCCH1_0_EccCtrl_BASE_IDX			0

#define mmUMCCH2_0_EccCtrl				0x1053

#define mmUMCCH2_0_EccCtrl_BASE_IDX			0

#define mmUMCCH3_0_EccCtrl				0x1853

#define mmUMCCH3_0_EccCtrl_BASE_IDX			0


#define mmUMCCH0_0_UMC_CONFIG				0x0040

#define mmUMCCH0_0_UMC_CONFIG_BASE_IDX			0

#define mmUMCCH1_0_UMC_CONFIG				0x0840

#define mmUMCCH1_0_UMC_CONFIG_BASE_IDX			0

#define mmUMCCH2_0_UMC_CONFIG				0x1040

#define mmUMCCH2_0_UMC_CONFIG_BASE_IDX			0

#define mmUMCCH3_0_UMC_CONFIG				0x1840

#define mmUMCCH3_0_UMC_CONFIG_BASE_IDX			0


#define mmUMCCH0_0_UmcLocalCap				0x0306

#define mmUMCCH0_0_UmcLocalCap_BASE_IDX			0

#define mmUMCCH1_0_UmcLocalCap				0x0b06

#define mmUMCCH1_0_UmcLocalCap_BASE_IDX			0

#define mmUMCCH2_0_UmcLocalCap				0x1306

#define mmUMCCH2_0_UmcLocalCap_BASE_IDX			0

#define mmUMCCH3_0_UmcLocalCap				0x1b06

#define mmUMCCH3_0_UmcLocalCap_BASE_IDX			0

#endif
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Directory: drivers/gpu/drm/amd/include/asic_reg/umc

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