Release 4.17 drivers/gpu/drm/sun4i/sun4i_crtc.c
/*
* Copyright (C) 2015 Free Electrons
* Copyright (C) 2015 NextThing Co
*
* Maxime Ripard <maxime.ripard@free-electrons.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*/
#include <drm/drmP.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_crtc.h>
#include <drm/drm_crtc_helper.h>
#include <drm/drm_modes.h>
#include <linux/clk-provider.h>
#include <linux/ioport.h>
#include <linux/of_address.h>
#include <linux/of_graph.h>
#include <linux/of_irq.h>
#include <linux/regmap.h>
#include <video/videomode.h>
#include "sun4i_backend.h"
#include "sun4i_crtc.h"
#include "sun4i_drv.h"
#include "sunxi_engine.h"
#include "sun4i_tcon.h"
/*
* While this isn't really working in the DRM theory, in practice we
* can only ever have one encoder per TCON since we have a mux in our
* TCON.
*/
static struct drm_encoder *sun4i_crtc_get_encoder(struct drm_crtc *crtc)
{
struct drm_encoder *encoder;
drm_for_each_encoder(encoder, crtc->dev)
if (encoder->crtc == crtc)
return encoder;
return NULL;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Maxime Ripard | 38 | 100.00% | 1 | 100.00% |
| Total | 38 | 100.00% | 1 | 100.00% |
static int sun4i_crtc_atomic_check(struct drm_crtc *crtc,
struct drm_crtc_state *state)
{
struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
struct sunxi_engine *engine = scrtc->engine;
int ret = 0;
if (engine && engine->ops && engine->ops->atomic_check)
ret = engine->ops->atomic_check(engine, state);
return ret;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Maxime Ripard | 70 | 100.00% | 1 | 100.00% |
| Total | 70 | 100.00% | 1 | 100.00% |
static void sun4i_crtc_atomic_begin(struct drm_crtc *crtc,
struct drm_crtc_state *old_state)
{
struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
struct drm_device *dev = crtc->dev;
struct sunxi_engine *engine = scrtc->engine;
unsigned long flags;
if (crtc->state->event) {
WARN_ON(drm_crtc_vblank_get(crtc) != 0);
spin_lock_irqsave(&dev->event_lock, flags);
scrtc->event = crtc->state->event;
spin_unlock_irqrestore(&dev->event_lock, flags);
crtc->state->event = NULL;
}
if (engine->ops->atomic_begin)
engine->ops->atomic_begin(engine, old_state);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Maxime Ripard | 125 | 100.00% | 2 | 100.00% |
| Total | 125 | 100.00% | 2 | 100.00% |
static void sun4i_crtc_atomic_flush(struct drm_crtc *crtc,
struct drm_crtc_state *old_state)
{
struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
struct drm_pending_vblank_event *event = crtc->state->event;
DRM_DEBUG_DRIVER("Committing plane changes\n");
sunxi_engine_commit(scrtc->engine);
if (event) {
crtc->state->event = NULL;
spin_lock_irq(&crtc->dev->event_lock);
if (drm_crtc_vblank_get(crtc) == 0)
drm_crtc_arm_vblank_event(crtc, event);
else
drm_crtc_send_vblank_event(crtc, event);
spin_unlock_irq(&crtc->dev->event_lock);
}
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Daniel Vetter | 68 | 63.55% | 1 | 25.00% |
| Maxime Ripard | 36 | 33.64% | 1 | 25.00% |
| Icenowy Zheng | 2 | 1.87% | 1 | 25.00% |
| Chen-Yu Tsai | 1 | 0.93% | 1 | 25.00% |
| Total | 107 | 100.00% | 4 | 100.00% |
static void sun4i_crtc_atomic_disable(struct drm_crtc *crtc,
struct drm_crtc_state *old_state)
{
struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc);
struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
DRM_DEBUG_DRIVER("Disabling the CRTC\n");
drm_crtc_vblank_off(crtc);
sun4i_tcon_set_status(scrtc->tcon, encoder, false);
if (crtc->state->event && !crtc->state->active) {
spin_lock_irq(&crtc->dev->event_lock);
drm_crtc_send_vblank_event(crtc, crtc->state->event);
spin_unlock_irq(&crtc->dev->event_lock);
crtc->state->event = NULL;
}
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Maxime Ripard | 106 | 93.81% | 4 | 66.67% |
| Laurent Pinchart | 6 | 5.31% | 1 | 16.67% |
| Chen-Yu Tsai | 1 | 0.88% | 1 | 16.67% |
| Total | 113 | 100.00% | 6 | 100.00% |
static void sun4i_crtc_atomic_enable(struct drm_crtc *crtc,
struct drm_crtc_state *old_state)
{
struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc);
struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
DRM_DEBUG_DRIVER("Enabling the CRTC\n");
sun4i_tcon_set_status(scrtc->tcon, encoder, true);
drm_crtc_vblank_on(crtc);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Maxime Ripard | 50 | 87.72% | 3 | 60.00% |
| Laurent Pinchart | 6 | 10.53% | 1 | 20.00% |
| Chen-Yu Tsai | 1 | 1.75% | 1 | 20.00% |
| Total | 57 | 100.00% | 5 | 100.00% |
static void sun4i_crtc_mode_set_nofb(struct drm_crtc *crtc)
{
struct drm_display_mode *mode = &crtc->state->adjusted_mode;
struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc);
struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
sun4i_tcon_mode_set(scrtc->tcon, encoder, mode);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Maxime Ripard | 54 | 100.00% | 1 | 100.00% |
| Total | 54 | 100.00% | 1 | 100.00% |
static const struct drm_crtc_helper_funcs sun4i_crtc_helper_funcs = {
.atomic_check = sun4i_crtc_atomic_check,
.atomic_begin = sun4i_crtc_atomic_begin,
.atomic_flush = sun4i_crtc_atomic_flush,
.atomic_enable = sun4i_crtc_atomic_enable,
.atomic_disable = sun4i_crtc_atomic_disable,
.mode_set_nofb = sun4i_crtc_mode_set_nofb,
};
static int sun4i_crtc_enable_vblank(struct drm_crtc *crtc)
{
struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
DRM_DEBUG_DRIVER("Enabling VBLANK on crtc %p\n", crtc);
sun4i_tcon_enable_vblank(scrtc->tcon, true);
return 0;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Shawn Guo | 39 | 97.50% | 1 | 50.00% |
| Chen-Yu Tsai | 1 | 2.50% | 1 | 50.00% |
| Total | 40 | 100.00% | 2 | 100.00% |
static void sun4i_crtc_disable_vblank(struct drm_crtc *crtc)
{
struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
DRM_DEBUG_DRIVER("Disabling VBLANK on crtc %p\n", crtc);
sun4i_tcon_enable_vblank(scrtc->tcon, false);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Shawn Guo | 36 | 97.30% | 1 | 50.00% |
| Chen-Yu Tsai | 1 | 2.70% | 1 | 50.00% |
| Total | 37 | 100.00% | 2 | 100.00% |
static const struct drm_crtc_funcs sun4i_crtc_funcs = {
.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
.atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
.destroy = drm_crtc_cleanup,
.page_flip = drm_atomic_helper_page_flip,
.reset = drm_atomic_helper_crtc_reset,
.set_config = drm_atomic_helper_set_config,
.enable_vblank = sun4i_crtc_enable_vblank,
.disable_vblank = sun4i_crtc_disable_vblank,
};
struct sun4i_crtc *sun4i_crtc_init(struct drm_device *drm,
struct sunxi_engine *engine,
struct sun4i_tcon *tcon)
{
struct sun4i_crtc *scrtc;
struct drm_plane **planes;
struct drm_plane *primary = NULL, *cursor = NULL;
int ret, i;
scrtc = devm_kzalloc(drm->dev, sizeof(*scrtc), GFP_KERNEL);
if (!scrtc)
return ERR_PTR(-ENOMEM);
scrtc->engine = engine;
scrtc->tcon = tcon;
/* Create our layers */
planes = sunxi_engine_layers_init(drm, engine);
if (IS_ERR(planes)) {
dev_err(drm->dev, "Couldn't create the planes\n");
return NULL;
}
/* find primary and cursor planes for drm_crtc_init_with_planes */
for (i = 0; planes[i]; i++) {
struct drm_plane *plane = planes[i];
switch (plane->type) {
case DRM_PLANE_TYPE_PRIMARY:
primary = plane;
break;
case DRM_PLANE_TYPE_CURSOR:
cursor = plane;
break;
default:
break;
}
}
ret = drm_crtc_init_with_planes(drm, &scrtc->crtc,
primary,
cursor,
&sun4i_crtc_funcs,
NULL);
if (ret) {
dev_err(drm->dev, "Couldn't init DRM CRTC\n");
return ERR_PTR(ret);
}
drm_crtc_helper_add(&scrtc->crtc, &sun4i_crtc_helper_funcs);
/* Set crtc.port to output port node of the tcon */
scrtc->crtc.port = of_graph_get_port_by_id(scrtc->tcon->dev->of_node,
1);
/* Set possible_crtcs to this crtc for overlay planes */
for (i = 0; planes[i]; i++) {
uint32_t possible_crtcs = BIT(drm_crtc_index(&scrtc->crtc));
struct drm_plane *plane = planes[i];
if (plane->type == DRM_PLANE_TYPE_OVERLAY)
plane->possible_crtcs = possible_crtcs;
}
return scrtc;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Chen-Yu Tsai | 182 | 59.48% | 9 | 75.00% |
| Maxime Ripard | 99 | 32.35% | 1 | 8.33% |
| Icenowy Zheng | 25 | 8.17% | 2 | 16.67% |
| Total | 306 | 100.00% | 12 | 100.00% |
Overall Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Maxime Ripard | 697 | 64.18% | 8 | 34.78% |
| Chen-Yu Tsai | 192 | 17.68% | 9 | 39.13% |
| Shawn Guo | 85 | 7.83% | 1 | 4.35% |
| Daniel Vetter | 68 | 6.26% | 1 | 4.35% |
| Icenowy Zheng | 28 | 2.58% | 2 | 8.70% |
| Laurent Pinchart | 16 | 1.47% | 2 | 8.70% |
| Total | 1086 | 100.00% | 23 | 100.00% |
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