Release 4.17 drivers/pci/pcie/portdrv_pci.c
// SPDX-License-Identifier: GPL-2.0
/*
* Purpose: PCI Express Port Bus Driver
* Author: Tom Nguyen <tom.l.nguyen@intel.com>
*
* Copyright (C) 2004 Intel
* Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
*/
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
#include <linux/init.h>
#include <linux/aer.h>
#include <linux/dmi.h>
#include "../pci.h"
#include "portdrv.h"
/* If this switch is set, PCIe port native services should not be enabled. */
bool pcie_ports_disabled;
/*
* If the user specified "pcie_ports=native", use the PCIe services regardless
* of whether the platform has given us permission. On ACPI systems, this
* means we ignore _OSC.
*/
bool pcie_ports_native;
static int __init pcie_port_setup(char *str)
{
if (!strncmp(str, "compat", 6))
pcie_ports_disabled = true;
else if (!strncmp(str, "native", 6))
pcie_ports_native = true;
return 1;
}
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| Rafael J. Wysocki | 46 | 97.87% | 2 | 66.67% |
| Björn Helgaas | 1 | 2.13% | 1 | 33.33% |
| Total | 47 | 100.00% | 3 | 100.00% |
__setup("pcie_ports=", pcie_port_setup);
/* global data */
static int pcie_portdrv_restore_config(struct pci_dev *dev)
{
int retval;
retval = pci_enable_device(dev);
if (retval)
return retval;
pci_set_master(dev);
return 0;
}
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| Henrik Kretzschmar | 36 | 100.00% | 1 | 100.00% |
| Total | 36 | 100.00% | 1 | 100.00% |
#ifdef CONFIG_PM
static int pcie_port_runtime_suspend(struct device *dev)
{
return to_pci_dev(dev)->bridge_d3 ? 0 : -EBUSY;
}
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| Mika Westerberg | 24 | 100.00% | 1 | 100.00% |
| Total | 24 | 100.00% | 1 | 100.00% |
static int pcie_port_runtime_resume(struct device *dev)
{
return 0;
}
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| Person | Tokens | Prop | Commits | CommitProp |
| Mika Westerberg | 14 | 100.00% | 1 | 100.00% |
| Total | 14 | 100.00% | 1 | 100.00% |
static int pcie_port_runtime_idle(struct device *dev)
{
/*
* Assume the PCI core has set bridge_d3 whenever it thinks the port
* should be good to go to D3. Everything else, including moving
* the port to D3, is handled by the PCI core.
*/
return to_pci_dev(dev)->bridge_d3 ? 0 : -EBUSY;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Mika Westerberg | 25 | 100.00% | 1 | 100.00% |
| Total | 25 | 100.00% | 1 | 100.00% |
static const struct dev_pm_ops pcie_portdrv_pm_ops = {
.suspend = pcie_port_device_suspend,
.resume = pcie_port_device_resume,
.freeze = pcie_port_device_suspend,
.thaw = pcie_port_device_resume,
.poweroff = pcie_port_device_suspend,
.restore = pcie_port_device_resume,
.runtime_suspend = pcie_port_runtime_suspend,
.runtime_resume = pcie_port_runtime_resume,
.runtime_idle = pcie_port_runtime_idle,
};
#define PCIE_PORTDRV_PM_OPS (&pcie_portdrv_pm_ops)
#else /* !PM */
#define PCIE_PORTDRV_PM_OPS NULL
#endif /* !PM */
/*
* pcie_portdrv_probe - Probe PCI-Express port devices
* @dev: PCI-Express port device being probed
*
* If detected invokes the pcie_port_device_register() method for
* this port device.
*
*/
static int pcie_portdrv_probe(struct pci_dev *dev,
const struct pci_device_id *id)
{
int status;
if (!pci_is_pcie(dev) ||
((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) &&
(pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) &&
(pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM)))
return -ENODEV;
status = pcie_port_device_register(dev);
if (status)
return status;
pci_save_state(dev);
dev_pm_set_driver_flags(&dev->dev, DPM_FLAG_SMART_SUSPEND |
DPM_FLAG_LEAVE_SUSPENDED);
if (pci_bridge_d3_possible(dev)) {
/*
* Keep the port resumed 100ms to make sure things like
* config space accesses from userspace (lspci) will not
* cause the port to repeatedly suspend and resume.
*/
pm_runtime_set_autosuspend_delay(&dev->dev, 100);
pm_runtime_use_autosuspend(&dev->dev);
pm_runtime_mark_last_busy(&dev->dev);
pm_runtime_put_autosuspend(&dev->dev);
pm_runtime_allow(&dev->dev);
}
return 0;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Mika Westerberg | 48 | 32.65% | 1 | 11.11% |
| Yanmin Zhang | 34 | 23.13% | 1 | 11.11% |
| Kenji Kaneshige | 26 | 17.69% | 1 | 11.11% |
| Rafael J. Wysocki | 20 | 13.61% | 3 | 33.33% |
| Yijing Wang | 9 | 6.12% | 1 | 11.11% |
| Tom L. Nguyen | 6 | 4.08% | 1 | 11.11% |
| Lukas Wunner | 4 | 2.72% | 1 | 11.11% |
| Total | 147 | 100.00% | 9 | 100.00% |
static void pcie_portdrv_remove(struct pci_dev *dev)
{
if (pci_bridge_d3_possible(dev)) {
pm_runtime_forbid(&dev->dev);
pm_runtime_get_noresume(&dev->dev);
pm_runtime_dont_use_autosuspend(&dev->dev);
}
pcie_port_device_remove(dev);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Mika Westerberg | 29 | 59.18% | 1 | 33.33% |
| Yanmin Zhang | 16 | 32.65% | 1 | 33.33% |
| Lukas Wunner | 4 | 8.16% | 1 | 33.33% |
| Total | 49 | 100.00% | 3 | 100.00% |
static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev,
enum pci_channel_state error)
{
/* Root Port has no impact. Always recovers. */
return PCI_ERS_RESULT_CAN_RECOVER;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Yanmin Zhang | 17 | 89.47% | 1 | 50.00% |
| Christoph Hellwig | 2 | 10.53% | 1 | 50.00% |
| Total | 19 | 100.00% | 2 | 100.00% |
static pci_ers_result_t pcie_portdrv_mmio_enabled(struct pci_dev *dev)
{
return PCI_ERS_RESULT_RECOVERED;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Yanmin Zhang | 13 | 92.86% | 1 | 50.00% |
| Christoph Hellwig | 1 | 7.14% | 1 | 50.00% |
| Total | 14 | 100.00% | 2 | 100.00% |
static pci_ers_result_t pcie_portdrv_slot_reset(struct pci_dev *dev)
{
/* If fatal, restore cfg space for possible link reset at upstream */
if (dev->error_state == pci_channel_io_frozen) {
dev->state_saved = true;
pci_restore_state(dev);
pcie_portdrv_restore_config(dev);
pci_enable_pcie_error_reporting(dev);
}
return PCI_ERS_RESULT_RECOVERED;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Yanmin Zhang | 34 | 73.91% | 1 | 25.00% |
| Rafael J. Wysocki | 11 | 23.91% | 2 | 50.00% |
| Christoph Hellwig | 1 | 2.17% | 1 | 25.00% |
| Total | 46 | 100.00% | 4 | 100.00% |
static int resume_iter(struct device *device, void *data)
{
struct pcie_device *pcie_device;
struct pcie_port_service_driver *driver;
if (device->bus == &pcie_port_bus_type && device->driver) {
driver = to_service_driver(device->driver);
if (driver && driver->error_resume) {
pcie_device = to_pcie_device(device);
/* Forward error message to service drivers */
driver->error_resume(pcie_device->port);
}
}
return 0;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Yanmin Zhang | 77 | 97.47% | 1 | 50.00% |
| Christoph Hellwig | 2 | 2.53% | 1 | 50.00% |
| Total | 79 | 100.00% | 2 | 100.00% |
static void pcie_portdrv_err_resume(struct pci_dev *dev)
{
device_for_each_child(&dev->dev, NULL, resume_iter);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Yanmin Zhang | 23 | 100.00% | 1 | 100.00% |
| Total | 23 | 100.00% | 1 | 100.00% |
/*
* LINUX Device Driver Model
*/
static const struct pci_device_id port_pci_ids[] = { {
/* handle any PCI-Express port */
PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0),
}, { /* end: all zeroes */ }
};
static const struct pci_error_handlers pcie_portdrv_err_handler = {
.error_detected = pcie_portdrv_error_detected,
.mmio_enabled = pcie_portdrv_mmio_enabled,
.slot_reset = pcie_portdrv_slot_reset,
.resume = pcie_portdrv_err_resume,
};
static struct pci_driver pcie_portdriver = {
.name = "pcieport",
.id_table = &port_pci_ids[0],
.probe = pcie_portdrv_probe,
.remove = pcie_portdrv_remove,
.shutdown = pcie_portdrv_remove,
.err_handler = &pcie_portdrv_err_handler,
.driver.pm = PCIE_PORTDRV_PM_OPS,
};
static int __init dmi_pcie_pme_disable_msi(const struct dmi_system_id *d)
{
pr_notice("%s detected: will not use MSI for PCIe PME signaling\n",
d->ident);
pcie_pme_disable_msi();
return 0;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Rafael J. Wysocki | 28 | 100.00% | 1 | 100.00% |
| Total | 28 | 100.00% | 1 | 100.00% |
static const struct dmi_system_id pcie_portdrv_dmi_table[] __initconst = {
/*
* Boxes that should not use MSI for PCIe PME signaling.
*/
{
.callback = dmi_pcie_pme_disable_msi,
.ident = "MSI Wind U-100",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR,
"MICRO-STAR INTERNATIONAL CO., LTD"),
DMI_MATCH(DMI_PRODUCT_NAME, "U-100"),
},
},
{}
};
static int __init pcie_portdrv_init(void)
{
if (pcie_ports_disabled)
return -EACCES;
dmi_check_system(pcie_portdrv_dmi_table);
return pci_register_driver(&pcie_portdriver);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Tom L. Nguyen | 13 | 44.83% | 1 | 14.29% |
| Rafael J. Wysocki | 11 | 37.93% | 2 | 28.57% |
| Björn Helgaas | 3 | 10.34% | 2 | 28.57% |
| Christophe Lucas | 1 | 3.45% | 1 | 14.29% |
| Sam Ravnborg | 1 | 3.45% | 1 | 14.29% |
| Total | 29 | 100.00% | 7 | 100.00% |
device_initcall(pcie_portdrv_init);
Overall Contributors
| Person | Tokens | Prop | Commits | CommitProp |
| Yanmin Zhang | 284 | 33.10% | 2 | 5.88% |
| Rafael J. Wysocki | 228 | 26.57% | 10 | 29.41% |
| Mika Westerberg | 153 | 17.83% | 1 | 2.94% |
| Tom L. Nguyen | 79 | 9.21% | 1 | 2.94% |
| Henrik Kretzschmar | 36 | 4.20% | 1 | 2.94% |
| Kenji Kaneshige | 26 | 3.03% | 1 | 2.94% |
| Lukas Wunner | 11 | 1.28% | 1 | 2.94% |
| Yijing Wang | 9 | 1.05% | 1 | 2.94% |
| Björn Helgaas | 8 | 0.93% | 5 | 14.71% |
| Christoph Hellwig | 8 | 0.93% | 2 | 5.88% |
| Sinan Kaya | 5 | 0.58% | 1 | 2.94% |
| Zheng Yan | 3 | 0.35% | 1 | 2.94% |
| Sam Ravnborg | 2 | 0.23% | 1 | 2.94% |
| Hidetoshi Seto | 1 | 0.12% | 1 | 2.94% |
| Paul Gortmaker | 1 | 0.12% | 1 | 2.94% |
| Greg Kroah-Hartman | 1 | 0.12% | 1 | 2.94% |
| Christophe Lucas | 1 | 0.12% | 1 | 2.94% |
| Alexey Dobriyan | 1 | 0.12% | 1 | 2.94% |
| Stephen Hemminger | 1 | 0.12% | 1 | 2.94% |
| Total | 858 | 100.00% | 34 | 100.00% |
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