Release 4.18 arch/arm/mach-s3c24xx/mach-smdk2443.c
// SPDX-License-Identifier: GPL-2.0
//
// Copyright (c) 2007 Simtec Electronics
// Ben Dooks <ben@simtec.co.uk>
//
// http://www.fluff.org/ben/smdk2443/
//
// Thanks to Samsung for the loan of an SMDK2443
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/list.h>
#include <linux/timer.h>
#include <linux/init.h>
#include <linux/serial_core.h>
#include <linux/serial_s3c.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <mach/hardware.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <mach/regs-gpio.h>
#include <mach/regs-lcd.h>
#include <mach/fb.h>
#include <linux/platform_data/i2c-s3c2410.h>
#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/samsung-time.h>
#include "common.h"
#include "common-smdk.h"
static struct map_desc smdk2443_iodesc[] __initdata = {
/* ISA IO Space map (memory space selected by A24) */
{
.virtual = (u32)S3C24XX_VA_ISA_WORD,
.pfn = __phys_to_pfn(S3C2410_CS2),
.length = 0x10000,
.type = MT_DEVICE,
}, {
.virtual = (u32)S3C24XX_VA_ISA_WORD + 0x10000,
.pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
.length = SZ_4M,
.type = MT_DEVICE,
}, {
.virtual = (u32)S3C24XX_VA_ISA_BYTE,
.pfn = __phys_to_pfn(S3C2410_CS2),
.length = 0x10000,
.type = MT_DEVICE,
}, {
.virtual = (u32)S3C24XX_VA_ISA_BYTE + 0x10000,
.pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
.length = SZ_4M,
.type = MT_DEVICE,
}
};
#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
static struct s3c2410_uartcfg smdk2443_uartcfgs[] __initdata = {
[0] = {
.hwport = 0,
.flags = 0,
.ucon = 0x3c5,
.ulcon = 0x03,
.ufcon = 0x51,
},
[1] = {
.hwport = 1,
.flags = 0,
.ucon = 0x3c5,
.ulcon = 0x03,
.ufcon = 0x51,
},
/* IR port */
[2] = {
.hwport = 2,
.flags = 0,
.ucon = 0x3c5,
.ulcon = 0x43,
.ufcon = 0x51,
},
[3] = {
.hwport = 3,
.flags = 0,
.ucon = 0x3c5,
.ulcon = 0x03,
.ufcon = 0x51,
}
};
static struct platform_device *smdk2443_devices[] __initdata = {
&s3c_device_wdt,
&s3c_device_i2c0,
&s3c_device_hsmmc1,
&s3c2443_device_dma,
};
static void __init smdk2443_map_io(void)
{
s3c24xx_init_io(smdk2443_iodesc, ARRAY_SIZE(smdk2443_iodesc));
s3c24xx_init_uarts(smdk2443_uartcfgs, ARRAY_SIZE(smdk2443_uartcfgs));
samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Ben Dooks | 29 | 80.56% | 1 | 50.00% |
Romain Naour | 7 | 19.44% | 1 | 50.00% |
Total | 36 | 100.00% | 2 | 100.00% |
static void __init smdk2443_init_time(void)
{
s3c2443_init_clocks(12000000);
samsung_timer_init();
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Heiko Stübner | 17 | 100.00% | 1 | 100.00% |
Total | 17 | 100.00% | 1 | 100.00% |
static void __init smdk2443_machine_init(void)
{
s3c_i2c0_set_platdata(NULL);
platform_add_devices(smdk2443_devices, ARRAY_SIZE(smdk2443_devices));
smdk_machine_init();
}
Contributors
Person | Tokens | Prop | Commits | CommitProp |
Ben Dooks | 27 | 100.00% | 3 | 100.00% |
Total | 27 | 100.00% | 3 | 100.00% |
MACHINE_START(SMDK2443, "SMDK2443")
/* Maintainer: Ben Dooks <ben-linux@fluff.org> */
.atag_offset = 0x100,
.init_irq = s3c2443_init_irq,
.map_io = smdk2443_map_io,
.init_machine = smdk2443_machine_init,
.init_time = smdk2443_init_time,
MACHINE_END
Overall Contributors
Person | Tokens | Prop | Commits | CommitProp |
Ben Dooks | 411 | 81.87% | 5 | 23.81% |
Abhilash Kesavan | 31 | 6.18% | 1 | 4.76% |
Heiko Stübner | 25 | 4.98% | 4 | 19.05% |
Romain Naour | 10 | 1.99% | 1 | 4.76% |
Russell King | 8 | 1.59% | 2 | 9.52% |
Krzysztof Kozlowski | 8 | 1.59% | 1 | 4.76% |
Tushar Behera | 3 | 0.60% | 1 | 4.76% |
Jassi Brar | 1 | 0.20% | 1 | 4.76% |
Kukjin Kim | 1 | 0.20% | 1 | 4.76% |
Arnd Bergmann | 1 | 0.20% | 1 | 4.76% |
Yauhen Kharuzhy | 1 | 0.20% | 1 | 4.76% |
Stephen Warren | 1 | 0.20% | 1 | 4.76% |
Nico Pitre | 1 | 0.20% | 1 | 4.76% |
Total | 502 | 100.00% | 21 | 100.00% |
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