Release 4.18 drivers/nvme/host/pci.c

/*
 * NVM Express device driver
 * Copyright (c) 2011-2014, Intel Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 */

#include <linux/aer.h>
#include <linux/async.h>
#include <linux/blkdev.h>
#include <linux/blk-mq.h>
#include <linux/blk-mq-pci.h>
#include <linux/dmi.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/once.h>
#include <linux/pci.h>
#include <linux/t10-pi.h>
#include <linux/types.h>
#include <linux/io-64-nonatomic-lo-hi.h>
#include <linux/sed-opal.h>

#include "nvme.h"


#define SQ_SIZE(depth)		(depth * sizeof(struct nvme_command))

#define CQ_SIZE(depth)		(depth * sizeof(struct nvme_completion))


#define SGES_PER_PAGE	(PAGE_SIZE / sizeof(struct nvme_sgl_desc))

/*
 * These can be higher, but we need to ensure that any command doesn't
 * require an sg allocation that needs more than a page of data.
 */

#define NVME_MAX_KB_SZ	4096

#define NVME_MAX_SEGS	127


static int use_threaded_interrupts;
module_param(use_threaded_interrupts, int, 0);


static bool use_cmb_sqes = true;
module_param(use_cmb_sqes, bool, 0444);
MODULE_PARM_DESC(use_cmb_sqes, "use controller's memory buffer for I/O SQes");


static unsigned int max_host_mem_size_mb = 128;
module_param(max_host_mem_size_mb, uint, 0444);
MODULE_PARM_DESC(max_host_mem_size_mb,
	"Maximum Host Memory Buffer (HMB) size per controller (in MiB)");


static unsigned int sgl_threshold = SZ_32K;
module_param(sgl_threshold, uint, 0644);
MODULE_PARM_DESC(sgl_threshold,
		"Use SGLs when average request segment size is larger or equal to "
		"this size. Use 0 to disable SGLs.");

static int io_queue_depth_set(const char *val, const struct kernel_param *kp);

static const struct kernel_param_ops io_queue_depth_ops = {
	.set = io_queue_depth_set,
	.get = param_get_int,
};


static int io_queue_depth = 1024;
module_param_cb(io_queue_depth, &io_queue_depth_ops, &io_queue_depth, 0644);
MODULE_PARM_DESC(io_queue_depth, "set io queue depth, should >= 2");

struct nvme_dev;
struct nvme_queue;

static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown);

/*
 * Represents an NVM Express device.  Each nvme_dev is a PCI function.
 */

struct nvme_dev {
	
struct nvme_queue *queues;
	
struct blk_mq_tag_set tagset;
	
struct blk_mq_tag_set admin_tagset;
	
u32 __iomem *dbs;
	
struct device *dev;
	
struct dma_pool *prp_page_pool;
	
struct dma_pool *prp_small_pool;
	
unsigned online_queues;
	
unsigned max_qid;
	
unsigned int num_vecs;
	
int q_depth;
	
u32 db_stride;
	
void __iomem *bar;
	
unsigned long bar_mapped_size;
	
struct work_struct remove_work;
	
struct mutex shutdown_lock;
	
bool subsystem;
	
void __iomem *cmb;
	
pci_bus_addr_t cmb_bus_addr;
	
u64 cmb_size;
	
u32 cmbsz;
	
u32 cmbloc;
	
struct nvme_ctrl ctrl;
	
struct completion ioq_wait;

	
mempool_t *iod_mempool;

	/* shadow doorbell buffer support: */
	
u32 *dbbuf_dbs;
	
dma_addr_t dbbuf_dbs_dma_addr;
	
u32 *dbbuf_eis;
	
dma_addr_t dbbuf_eis_dma_addr;

	/* host memory buffer support: */
	
u64 host_mem_size;
	
u32 nr_host_mem_descs;
	
dma_addr_t host_mem_descs_dma;
	
struct nvme_host_mem_buf_desc *host_mem_descs;
	
void **host_mem_desc_bufs;
};



static int io_queue_depth_set(const char *val, const struct kernel_param *kp)
{
	int n = 0, ret;

	ret = kstrtoint(val, 10, &n);
	if (ret != 0 || n < 2)
		return -EINVAL;

	return param_set_int(val, kp);
}

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static inline unsigned int sq_idx(unsigned int qid, u32 stride)
{
	return qid * 2 * stride;
}

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static inline unsigned int cq_idx(unsigned int qid, u32 stride)
{
	return (qid * 2 + 1) * stride;
}

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static inline struct nvme_dev *to_nvme_dev(struct nvme_ctrl *ctrl)
{
	return container_of(ctrl, struct nvme_dev, ctrl);
}

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/*
 * An NVM Express queue.  Each device has at least two (one for admin
 * commands and one for I/O commands).
 */

struct nvme_queue {
	
struct device *q_dmadev;
	
struct nvme_dev *dev;
	
spinlock_t sq_lock;
	
struct nvme_command *sq_cmds;
	
struct nvme_command __iomem *sq_cmds_io;
	
spinlock_t cq_lock ____cacheline_aligned_in_smp;
	
volatile struct nvme_completion *cqes;
	
struct blk_mq_tags **tags;
	
dma_addr_t sq_dma_addr;
	
dma_addr_t cq_dma_addr;
	
u32 __iomem *q_db;
	
u16 q_depth;
	
s16 cq_vector;
	
u16 sq_tail;
	
u16 cq_head;
	
u16 last_cq_head;
	
u16 qid;
	
u8 cq_phase;
	
u32 *dbbuf_sq_db;
	
u32 *dbbuf_cq_db;
	
u32 *dbbuf_sq_ei;
	
u32 *dbbuf_cq_ei;
};

/*
 * The nvme_iod describes the data in an I/O, including the list of PRP
 * entries.  You can't see it in this data structure because C doesn't let
 * me express that.  Use nvme_init_iod to ensure there's enough space
 * allocated to store the PRP list.
 */

struct nvme_iod {
	
struct nvme_request req;
	
struct nvme_queue *nvmeq;
	
bool use_sgl;
	
int aborted;
	
int npages;		/* In the PRP list. 0 means small pool in use */
	
int nents;		/* Used in scatterlist */
	
int length;		/* Of data, in bytes */
	
dma_addr_t first_dma;
	
struct scatterlist meta_sg; /* metadata requires single contiguous buffer */
	
struct scatterlist *sg;
	
struct scatterlist inline_sg[0];
};

/*
 * Check we didin't inadvertently grow the command struct
 */


static inline void _nvme_check_size(void)
{
	BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
	BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
	BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
	BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
	BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
	BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
	BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
	BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
	BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE);
	BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE);
	BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
	BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
	BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64);
}

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static inline unsigned int nvme_dbbuf_size(u32 stride)
{
	return ((num_possible_cpus() + 1) * 8 * stride);
}

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static int nvme_dbbuf_dma_alloc(struct nvme_dev *dev)
{
	unsigned int mem_size = nvme_dbbuf_size(dev->db_stride);

	if (dev->dbbuf_dbs)
		return 0;

	dev->dbbuf_dbs = dma_alloc_coherent(dev->dev, mem_size,
					    &dev->dbbuf_dbs_dma_addr,
					    GFP_KERNEL);
	if (!dev->dbbuf_dbs)
		return -ENOMEM;
	dev->dbbuf_eis = dma_alloc_coherent(dev->dev, mem_size,
					    &dev->dbbuf_eis_dma_addr,
					    GFP_KERNEL);
	if (!dev->dbbuf_eis) {
		dma_free_coherent(dev->dev, mem_size,
				  dev->dbbuf_dbs, dev->dbbuf_dbs_dma_addr);
		dev->dbbuf_dbs = NULL;
		return -ENOMEM;
	}

	return 0;
}

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static void nvme_dbbuf_dma_free(struct nvme_dev *dev)
{
	unsigned int mem_size = nvme_dbbuf_size(dev->db_stride);

	if (dev->dbbuf_dbs) {
		dma_free_coherent(dev->dev, mem_size,
				  dev->dbbuf_dbs, dev->dbbuf_dbs_dma_addr);
		dev->dbbuf_dbs = NULL;
	}
	if (dev->dbbuf_eis) {
		dma_free_coherent(dev->dev, mem_size,
				  dev->dbbuf_eis, dev->dbbuf_eis_dma_addr);
		dev->dbbuf_eis = NULL;
	}
}

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static void nvme_dbbuf_init(struct nvme_dev *dev,
			    struct nvme_queue *nvmeq, int qid)
{
	if (!dev->dbbuf_dbs || !qid)
		return;

	nvmeq->dbbuf_sq_db = &dev->dbbuf_dbs[sq_idx(qid, dev->db_stride)];
	nvmeq->dbbuf_cq_db = &dev->dbbuf_dbs[cq_idx(qid, dev->db_stride)];
	nvmeq->dbbuf_sq_ei = &dev->dbbuf_eis[sq_idx(qid, dev->db_stride)];
	nvmeq->dbbuf_cq_ei = &dev->dbbuf_eis[cq_idx(qid, dev->db_stride)];
}

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static void nvme_dbbuf_set(struct nvme_dev *dev)
{
	struct nvme_command c;

	if (!dev->dbbuf_dbs)
		return;

	memset(&c, 0, sizeof(c));
	c.dbbuf.opcode = nvme_admin_dbbuf;
	c.dbbuf.prp1 = cpu_to_le64(dev->dbbuf_dbs_dma_addr);
	c.dbbuf.prp2 = cpu_to_le64(dev->dbbuf_eis_dma_addr);

	if (nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0)) {
		dev_warn(dev->ctrl.device, "unable to set dbbuf\n");
		/* Free memory and continue on */
		nvme_dbbuf_dma_free(dev);
	}
}

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static inline int nvme_dbbuf_need_event(u16 event_idx, u16 new_idx, u16 old)
{
	return (u16)(new_idx - event_idx - 1) < (u16)(new_idx - old);
}

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/* Update dbbuf and return true if an MMIO is required */


static bool nvme_dbbuf_update_and_check_event(u16 value, u32 *dbbuf_db,
					      volatile u32 *dbbuf_ei)
{
	if (dbbuf_db) {
		u16 old_value;

		/*
                 * Ensure that the queue is written before updating
                 * the doorbell in memory
                 */
		wmb();

		old_value = *dbbuf_db;
		*dbbuf_db = value;

		if (!nvme_dbbuf_need_event(*dbbuf_ei, value, old_value))
			return false;
	}

	return true;
}

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/*
 * Max size of iod being embedded in the request payload
 */

#define NVME_INT_PAGES		2

#define NVME_INT_BYTES(dev)	(NVME_INT_PAGES * (dev)->ctrl.page_size)

/*
 * Will slightly overestimate the number of pages needed.  This is OK
 * as it only leads to a small amount of wasted memory for the lifetime of
 * the I/O.
 */


static int nvme_npages(unsigned size, struct nvme_dev *dev)
{
	unsigned nprps = DIV_ROUND_UP(size + dev->ctrl.page_size,
				      dev->ctrl.page_size);
	return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
}

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/*
 * Calculates the number of pages needed for the SGL segments. For example a 4k
 * page can accommodate 256 SGL descriptors.
 */


static int nvme_pci_npages_sgl(unsigned int num_seg)
{
	return DIV_ROUND_UP(num_seg * sizeof(struct nvme_sgl_desc), PAGE_SIZE);
}

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static unsigned int nvme_pci_iod_alloc_size(struct nvme_dev *dev,
		unsigned int size, unsigned int nseg, bool use_sgl)
{
	size_t alloc_size;

	if (use_sgl)
		alloc_size = sizeof(__le64 *) * nvme_pci_npages_sgl(nseg);
	else
		alloc_size = sizeof(__le64 *) * nvme_npages(size, dev);

	return alloc_size + sizeof(struct scatterlist) * nseg;
}

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static unsigned int nvme_pci_cmd_size(struct nvme_dev *dev, bool use_sgl)
{
	unsigned int alloc_size = nvme_pci_iod_alloc_size(dev,
				    NVME_INT_BYTES(dev), NVME_INT_PAGES,
				    use_sgl);

	return sizeof(struct nvme_iod) + alloc_size;
}

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static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
				unsigned int hctx_idx)
{
	struct nvme_dev *dev = data;
	struct nvme_queue *nvmeq = &dev->queues[0];

	WARN_ON(hctx_idx != 0);
	WARN_ON(dev->admin_tagset.tags[0] != hctx->tags);
	WARN_ON(nvmeq->tags);

	hctx->driver_data = nvmeq;
	nvmeq->tags = &dev->admin_tagset.tags[0];
	return 0;
}

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static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
{
	struct nvme_queue *nvmeq = hctx->driver_data;

	nvmeq->tags = NULL;
}

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static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
			  unsigned int hctx_idx)
{
	struct nvme_dev *dev = data;
	struct nvme_queue *nvmeq = &dev->queues[hctx_idx + 1];

	if (!nvmeq->tags)
		nvmeq->tags = &dev->tagset.tags[hctx_idx];

	WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags);
	hctx->driver_data = nvmeq;
	return 0;
}

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static int nvme_init_request(struct blk_mq_tag_set *set, struct request *req,
		unsigned int hctx_idx, unsigned int numa_node)
{
	struct nvme_dev *dev = set->driver_data;
	struct nvme_iod *iod = blk_mq_rq_to_pdu(req);
	int queue_idx = (set == &dev->tagset) ? hctx_idx + 1 : 0;
	struct nvme_queue *nvmeq = &dev->queues[queue_idx];

	BUG_ON(!nvmeq);
	iod->nvmeq = nvmeq;
	return 0;
}

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static int nvme_pci_map_queues(struct blk_mq_tag_set *set)
{
	struct nvme_dev *dev = set->driver_data;

	return blk_mq_pci_map_queues(set, to_pci_dev(dev->dev),
			dev->num_vecs > 1 ? 1 /* admin queue */ : 0);
}

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/**
 * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
 * @nvmeq: The queue to use
 * @cmd: The command to send
 */


static void nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
{
	spin_lock(&nvmeq->sq_lock);
	if (nvmeq->sq_cmds_io)
		memcpy_toio(&nvmeq->sq_cmds_io[nvmeq->sq_tail], cmd,
				sizeof(*cmd));
	else
		memcpy(&nvmeq->sq_cmds[nvmeq->sq_tail], cmd, sizeof(*cmd));

	if (++nvmeq->sq_tail == nvmeq->q_depth)
		nvmeq->sq_tail = 0;
	if (nvme_dbbuf_update_and_check_event(nvmeq->sq_tail,
			nvmeq->dbbuf_sq_db, nvmeq->dbbuf_sq_ei))
		writel(nvmeq->sq_tail, nvmeq->q_db);
	spin_unlock(&nvmeq->sq_lock);
}

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static void **nvme_pci_iod_list(struct request *req)
{
	struct nvme_iod *iod = blk_mq_rq_to_pdu(req);
	return (void **)(iod->sg + blk_rq_nr_phys_segments(req));
}

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static inline bool nvme_pci_use_sgls(struct nvme_dev *dev, struct request *req)
{
	struct nvme_iod *iod = blk_mq_rq_to_pdu(req);
	int nseg = blk_rq_nr_phys_segments(req);
	unsigned int avg_seg_size;

	if (nseg == 0)
		return false;

	avg_seg_size = DIV_ROUND_UP(blk_rq_payload_bytes(req), nseg);

	if (!(dev->ctrl.sgls & ((1 << 0) | (1 << 1))))
		return false;
	if (!iod->nvmeq->qid)
		return false;
	if (!sgl_threshold || avg_seg_size < sgl_threshold)
		return false;
	return true;
}

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1
50.00%
Keith Busch
18
15.65%
1
50.00%
Total
115
100.00%
2
100.00%



static blk_status_t nvme_init_iod(struct request *rq, struct nvme_dev *dev)
{
	struct nvme_iod *iod = blk_mq_rq_to_pdu(rq);
	int nseg = blk_rq_nr_phys_segments(rq);
	unsigned int size = blk_rq_payload_bytes(rq);

	iod->use_sgl = nvme_pci_use_sgls(dev, rq);

	if (nseg > NVME_INT_PAGES || size > NVME_INT_BYTES(dev)) {
		iod->sg = mempool_alloc(dev->iod_mempool, GFP_ATOMIC);
		if (!iod->sg)
			return BLK_STS_RESOURCE;
	} else {
		iod->sg = iod->inline_sg;
	}

	iod->aborted = 0;
	iod->npages = -1;
	iod->nents = 0;
	iod->length = size;

	return BLK_STS_OK;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Christoph Hellwig
67
51.15%
4
28.57%
Keith Busch
17
12.98%
4
28.57%
Jens Axboe
15
11.45%
2
14.29%
Matthew Wilcox
12
9.16%
1
7.14%
Minwoo Im
11
8.40%
1
7.14%
Chaitanya Kulkarni
5
3.82%
1
7.14%
Matias Björling
4
3.05%
1
7.14%
Total
131
100.00%
14
100.00%



static void nvme_free_iod(struct nvme_dev *dev, struct request *req)
{
	struct nvme_iod *iod = blk_mq_rq_to_pdu(req);
	const int last_prp = dev->ctrl.page_size / sizeof(__le64) - 1;
	dma_addr_t dma_addr = iod->first_dma, next_dma_addr;

	int i;

	if (iod->npages == 0)
		dma_pool_free(dev->prp_small_pool, nvme_pci_iod_list(req)[0],
			dma_addr);

	for (i = 0; i < iod->npages; i++) {
		void *addr = nvme_pci_iod_list(req)[i];

		if (iod->use_sgl) {
			struct nvme_sgl_desc *sg_list = addr;

			next_dma_addr =
			    le64_to_cpu((sg_list[SGES_PER_PAGE - 1]).addr);
		} else {
			__le64 *prp_list = addr;

			next_dma_addr = le64_to_cpu(prp_list[last_prp]);
		}

		dma_pool_free(dev->prp_page_pool, addr, dma_addr);
		dma_addr = next_dma_addr;
	}

	if (iod->sg != iod->inline_sg)
		mempool_free(iod->sg, dev->iod_mempool);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Chaitanya Kulkarni
67
34.36%
1
6.25%
Matthew Wilcox
48
24.62%
8
50.00%
Shane Michael Matthews
43
22.05%
1
6.25%
Christoph Hellwig
16
8.21%
2
12.50%
Matias Björling
10
5.13%
1
6.25%
Jens Axboe
9
4.62%
2
12.50%
Keith Busch
2
1.03%
1
6.25%
Total
195
100.00%
16
100.00%

#ifdef CONFIG_BLK_DEV_INTEGRITY


static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
{
	if (be32_to_cpu(pi->ref_tag) == v)
		pi->ref_tag = cpu_to_be32(p);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
19
51.35%
1
20.00%
Matthew Wilcox
11
29.73%
3
60.00%
Matias Björling
7
18.92%
1
20.00%
Total
37
100.00%
5
100.00%



static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
{
	if (be32_to_cpu(pi->ref_tag) == p)
		pi->ref_tag = cpu_to_be32(v);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
35
94.59%
2
66.67%
Matias Björling
2
5.41%
1
33.33%
Total
37
100.00%
3
100.00%

/**
 * nvme_dif_remap - remaps ref tags to bip seed and physical lba
 *
 * The virtual start sector is the one that was originally submitted by the
 * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
 * start sector may be different. Remap protection information to match the
 * physical LBA on writes, and back to the original seed on reads.
 *
 * Type 0 and 3 do not have a ref tag, so no remapping required.
 */


static void nvme_dif_remap(struct request *req,
			void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
{
	struct nvme_ns *ns = req->rq_disk->private_data;
	struct bio_integrity_payload *bip;
	struct t10_pi_tuple *pi;
	void *p, *pmap;
	u32 i, nlb, ts, phys, virt;

	if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
		return;

	bip = bio_integrity(req->bio);
	if (!bip)
		return;

	pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;

	p = pmap;
	virt = bip_get_seed(bip);
	phys = nvme_block_nr(ns, blk_rq_pos(req));
	nlb = (blk_rq_bytes(req) >> ns->lba_shift);
	ts = ns->disk->queue->integrity.tuple_size;

	for (i = 0; i < nlb; i++, virt++, phys++) {
		pi = (struct t10_pi_tuple *)p;
		dif_swap(phys, virt, pi);
		p += ts;
	}
	kunmap_atomic(pmap);
}
Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
169
80.48%
5
45.45%
Matias Björling
27
12.86%
1
9.09%
Jon Derrick
6
2.86%
1
9.09%
Matthew Wilcox
6
2.86%
2
18.18%
Martin K. Petersen
1
0.48%
1
9.09%
Dan J Williams
1
0.48%
1
9.09%
Total
210
100.00%
11
100.00%

#else /* CONFIG_BLK_DEV_INTEGRITY */


static void nvme_dif_remap(struct request *req,
			void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
{
}
Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
21
75.00%
1
33.33%
Matthew Wilcox
6
21.43%
1
33.33%
Sunad Bhandary
1
3.57%
1
33.33%
Total
28
100.00%
3
100.00%



static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
{
}
Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
11
68.75%
1
33.33%
Matthew Wilcox
4
25.00%
1
33.33%
Shane Michael Matthews
1
6.25%
1
33.33%
Total
16
100.00%
3
100.00%



static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
{
}
Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
10
62.50%
1
33.33%
Matthew Wilcox
3
18.75%
1
33.33%
Jens Axboe
3
18.75%
1
33.33%
Total
16
100.00%
3
100.00%

#endif



static void nvme_print_sgl(struct scatterlist *sgl, int nents)
{
	int i;
	struct scatterlist *sg;

	for_each_sg(sgl, sg, nents, i) {
		dma_addr_t phys = sg_phys(sg);
		pr_warn("sg[%d] phys_addr:%pad offset:%d length:%d "
			"dma_address:%pad dma_length:%d\n",
			i, &phys, sg->offset, sg->length, &sg_dma_address(sg),
			sg_dma_len(sg));
	}
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
72
100.00%
1
100.00%
Total
72
100.00%
1
100.00%



static blk_status_t nvme_pci_setup_prps(struct nvme_dev *dev,
		struct request *req, struct nvme_rw_command *cmnd)
{
	struct nvme_iod *iod = blk_mq_rq_to_pdu(req);
	struct dma_pool *pool;
	int length = blk_rq_payload_bytes(req);
	struct scatterlist *sg = iod->sg;
	int dma_len = sg_dma_len(sg);
	u64 dma_addr = sg_dma_address(sg);
	u32 page_size = dev->ctrl.page_size;
	int offset = dma_addr & (page_size - 1);
	__le64 *prp_list;
	void **list = nvme_pci_iod_list(req);
	dma_addr_t prp_dma;
	int nprps, i;

	length -= (page_size - offset);
	if (length <= 0) {
		iod->first_dma = 0;
		goto done;
	}

	dma_len -= (page_size - offset);
	if (dma_len) {
		dma_addr += (page_size - offset);
	} else {
		sg = sg_next(sg);
		dma_addr = sg_dma_address(sg);
		dma_len = sg_dma_len(sg);
	}

	if (length <= page_size) {
		iod->first_dma = dma_addr;
		goto done;
	}

	nprps = DIV_ROUND_UP(length, page_size);
	if (nprps <= (256 / 8)) {
		pool = dev->prp_small_pool;
		iod->npages = 0;
	} else {
		pool = dev->prp_page_pool;
		iod->npages = 1;
	}

	prp_list = dma_pool_alloc(pool, GFP_ATOMIC, &prp_dma);
	if (!prp_list) {
		iod->first_dma = dma_addr;
		iod->npages = -1;
		return BLK_STS_RESOURCE;
	}
	list[0] = prp_list;
	iod->first_dma = prp_dma;
	i = 0;
	for (;;) {
		if (i == page_size >> 3) {
			__le64 *old_prp_list = prp_list;
			prp_list = dma_pool_alloc(pool, GFP_ATOMIC, &prp_dma);
			if (!prp_list)
				return BLK_STS_RESOURCE;
			list[iod->npages++] = prp_list;
			prp_list[0] = old_prp_list[i - 1];
			old_prp_list[i - 1] = cpu_to_le64(prp_dma);
			i = 1;
		}
		prp_list[i++] = cpu_to_le64(dma_addr);
		dma_len -= page_size;
		dma_addr += page_size;
		length -= page_size;
		if (length <= 0)
			break;
		if (dma_len > 0)
			continue;
		if (unlikely(dma_len < 0))
			goto bad_sgl;
		sg = sg_next(sg);
		dma_addr = sg_dma_address(sg);
		dma_len = sg_dma_len(sg);
	}

done:
	cmnd->dptr.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
	cmnd->dptr.prp2 = cpu_to_le64(iod->first_dma);

	return BLK_STS_OK;

 bad_sgl:
	WARN(DO_ONCE(nvme_print_sgl, iod->sg, iod->nents),
			"Invalid SGL for payload:%d nents:%d\n",
			blk_rq_payload_bytes(req), iod->nents);
	return BLK_STS_IOERR;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Matthew Wilcox
158
30.62%
10
35.71%
Keith Busch
146
28.29%
7
25.00%
Chaitanya Kulkarni
96
18.60%
1
3.57%
Shane Michael Matthews
57
11.05%
1
3.57%
Matias Björling
21
4.07%
1
3.57%
Christoph Hellwig
13
2.52%
4
14.29%
Jan H. Schönherr
8
1.55%
1
3.57%
Jens Axboe
8
1.55%
1
3.57%
Murali Iyer
7
1.36%
1
3.57%
Nisheeth Bhat
2
0.39%
1
3.57%
Total
516
100.00%
28
100.00%



static void nvme_pci_sgl_set_data(struct nvme_sgl_desc *sge,
		struct scatterlist *sg)
{
	sge->addr = cpu_to_le64(sg_dma_address(sg));
	sge->length = cpu_to_le32(sg_dma_len(sg));
	sge->type = NVME_SGL_FMT_DATA_DESC << 4;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Chaitanya Kulkarni
48
100.00%
1
100.00%
Total
48
100.00%
1
100.00%



static void nvme_pci_sgl_set_seg(struct nvme_sgl_desc *sge,
		dma_addr_t dma_addr, int entries)
{
	sge->addr = cpu_to_le64(dma_addr);
	if (entries < SGES_PER_PAGE) {
		sge->length = cpu_to_le32(entries * sizeof(*sge));
		sge->type = NVME_SGL_FMT_LAST_SEG_DESC << 4;
	} else {
		sge->length = cpu_to_le32(PAGE_SIZE);
		sge->type = NVME_SGL_FMT_SEG_DESC << 4;
	}
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Chaitanya Kulkarni
77
100.00%
1
100.00%
Total
77
100.00%
1
100.00%



static blk_status_t nvme_pci_setup_sgls(struct nvme_dev *dev,
		struct request *req, struct nvme_rw_command *cmd, int entries)
{
	struct nvme_iod *iod = blk_mq_rq_to_pdu(req);
	struct dma_pool *pool;
	struct nvme_sgl_desc *sg_list;
	struct scatterlist *sg = iod->sg;
	dma_addr_t sgl_dma;
	int i = 0;

	/* setting the transfer type as SGL */
	cmd->flags = NVME_CMD_SGL_METABUF;

	if (entries == 1) {
		nvme_pci_sgl_set_data(&cmd->dptr.sgl, sg);
		return BLK_STS_OK;
	}

	if (entries <= (256 / sizeof(struct nvme_sgl_desc))) {
		pool = dev->prp_small_pool;
		iod->npages = 0;
	} else {
		pool = dev->prp_page_pool;
		iod->npages = 1;
	}

	sg_list = dma_pool_alloc(pool, GFP_ATOMIC, &sgl_dma);
	if (!sg_list) {
		iod->npages = -1;
		return BLK_STS_RESOURCE;
	}

	nvme_pci_iod_list(req)[0] = sg_list;
	iod->first_dma = sgl_dma;

	nvme_pci_sgl_set_seg(&cmd->dptr.sgl, sgl_dma, entries);

	do {
		if (i == SGES_PER_PAGE) {
			struct nvme_sgl_desc *old_sg_desc = sg_list;
			struct nvme_sgl_desc *link = &old_sg_desc[i - 1];

			sg_list = dma_pool_alloc(pool, GFP_ATOMIC, &sgl_dma);
			if (!sg_list)
				return BLK_STS_RESOURCE;

			i = 0;
			nvme_pci_iod_list(req)[iod->npages++] = sg_list;
			sg_list[i++] = *link;
			nvme_pci_sgl_set_seg(link, sgl_dma, entries);
		}

		nvme_pci_sgl_set_data(&sg_list[i++], sg);
		sg = sg_next(sg);
	} while (--entries > 0);

	return BLK_STS_OK;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Chaitanya Kulkarni
290
93.85%
1
16.67%
Christoph Hellwig
10
3.24%
1
16.67%
Keith Busch
5
1.62%
2
33.33%
Matias Björling
3
0.97%
1
16.67%
Matthew Wilcox
1
0.32%
1
16.67%
Total
309
100.00%
6
100.00%



static blk_status_t nvme_map_data(struct nvme_dev *dev, struct request *req,
		struct nvme_command *cmnd)
{
	struct nvme_iod *iod = blk_mq_rq_to_pdu(req);
	struct request_queue *q = req->q;
	enum dma_data_direction dma_dir = rq_data_dir(req) ?
			DMA_TO_DEVICE : DMA_FROM_DEVICE;
	blk_status_t ret = BLK_STS_IOERR;
	int nr_mapped;

	sg_init_table(iod->sg, blk_rq_nr_phys_segments(req));
	iod->nents = blk_rq_map_sg(q, req, iod->sg);
	if (!iod->nents)
		goto out;

	ret = BLK_STS_RESOURCE;
	nr_mapped = dma_map_sg_attrs(dev->dev, iod->sg, iod->nents, dma_dir,
			DMA_ATTR_NO_WARN);
	if (!nr_mapped)
		goto out;

	if (iod->use_sgl)
		ret = nvme_pci_setup_sgls(dev, req, &cmnd->rw, nr_mapped);
	else
		ret = nvme_pci_setup_prps(dev, req, &cmnd->rw);

	if (ret != BLK_STS_OK)
		goto out_unmap;

	ret = BLK_STS_IOERR;
	if (blk_integrity_rq(req)) {
		if (blk_rq_count_integrity_sg(q, req->bio) != 1)
			goto out_unmap;

		sg_init_table(&iod->meta_sg, 1);
		if (blk_rq_map_integrity_sg(q, req->bio, &iod->meta_sg) != 1)
			goto out_unmap;

		if (req_op(req) == REQ_OP_WRITE)
			nvme_dif_remap(req, nvme_dif_prep);

		if (!dma_map_sg(dev->dev, &iod->meta_sg, 1, dma_dir))
			goto out_unmap;
	}

	if (blk_integrity_rq(req))
		cmnd->rw.metadata = cpu_to_le64(sg_dma_address(&iod->meta_sg));
	return BLK_STS_OK;

out_unmap:
	dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir);
out:
	return ret;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Christoph Hellwig
208
63.80%
7
23.33%
Matthew Wilcox
50
15.34%
10
33.33%
Keith Busch
32
9.82%
6
20.00%
Chaitanya Kulkarni
24
7.36%
1
3.33%
Santosh Yaraganavi
3
0.92%
1
3.33%
Minwoo Im
3
0.92%
1
3.33%
Mauricio Faria de Oliveira
3
0.92%
1
3.33%
Matias Björling
1
0.31%
1
3.33%
Jon Derrick
1
0.31%
1
3.33%
Linus Torvalds
1
0.31%
1
3.33%
Total
326
100.00%
30
100.00%



static void nvme_unmap_data(struct nvme_dev *dev, struct request *req)
{
	struct nvme_iod *iod = blk_mq_rq_to_pdu(req);
	enum dma_data_direction dma_dir = rq_data_dir(req) ?
			DMA_TO_DEVICE : DMA_FROM_DEVICE;

	if (iod->nents) {
		dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir);
		if (blk_integrity_rq(req)) {
			if (req_op(req) == REQ_OP_READ)
				nvme_dif_remap(req, nvme_dif_complete);
			dma_unmap_sg(dev->dev, &iod->meta_sg, 1, dma_dir);
		}
	}

	nvme_cleanup_cmd(req);
	nvme_free_iod(dev, req);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Christoph Hellwig
89
76.07%
5
41.67%
Keith Busch
19
16.24%
3
25.00%
Matthew Wilcox
9
7.69%
4
33.33%
Total
117
100.00%
12
100.00%

/*
 * NOTE: ns is NULL when called on the admin queue.
 */


static blk_status_t nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
			 const struct blk_mq_queue_data *bd)
{
	struct nvme_ns *ns = hctx->queue->queuedata;
	struct nvme_queue *nvmeq = hctx->driver_data;
	struct nvme_dev *dev = nvmeq->dev;
	struct request *req = bd->rq;
	struct nvme_command cmnd;
	blk_status_t ret;

	/*
         * We should not need to do this, but we're still using this to
         * ensure we can drain requests on a dying queue.
         */
	if (unlikely(nvmeq->cq_vector < 0))
		return BLK_STS_IOERR;

	ret = nvme_setup_cmd(ns, req, &cmnd);
	if (ret)
		return ret;

	ret = nvme_init_iod(req, dev);
	if (ret)
		goto out_free_cmd;

	if (blk_rq_nr_phys_segments(req)) {
		ret = nvme_map_data(dev, req, &cmnd);
		if (ret)
			goto out_cleanup_iod;
	}

	blk_mq_start_request(req);
	nvme_submit_cmd(nvmeq, &cmnd);
	return BLK_STS_OK;
out_cleanup_iod:
	nvme_free_iod(dev, req);
out_free_cmd:
	nvme_cleanup_cmd(req);
	return ret;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Christoph Hellwig
67
38.29%
9
32.14%
Matias Björling
34
19.43%
1
3.57%
Keith Busch
25
14.29%
9
32.14%
Matthew Wilcox
18
10.29%
3
10.71%
Jens Axboe
16
9.14%
2
7.14%
Jon Derrick
9
5.14%
1
3.57%
Ming Lin
4
2.29%
2
7.14%
Shane Michael Matthews
2
1.14%
1
3.57%
Total
175
100.00%
28
100.00%



static void nvme_pci_complete_rq(struct request *req)
{
	struct nvme_iod *iod = blk_mq_rq_to_pdu(req);

	nvme_unmap_data(iod->nvmeq->dev, req);
	nvme_complete_rq(req);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
22
59.46%
2
40.00%
Christoph Hellwig
15
40.54%
3
60.00%
Total
37
100.00%
5
100.00%

/* We read the CQE phase first to check if the rest of the entry is valid */


static inline bool nvme_cqe_pending(struct nvme_queue *nvmeq)
{
	return (le16_to_cpu(nvmeq->cqes[nvmeq->cq_head].status) & 1) ==
			nvmeq->cq_phase;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Marta Rybczynska
28
80.00%
1
50.00%
Christoph Hellwig
7
20.00%
1
50.00%
Total
35
100.00%
2
100.00%



static inline void nvme_ring_cq_doorbell(struct nvme_queue *nvmeq)
{
	u16 head = nvmeq->cq_head;

	if (nvme_dbbuf_update_and_check_event(head, nvmeq->dbbuf_cq_db,
					      nvmeq->dbbuf_cq_ei))
		writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Sagi Grimberg
29
59.18%
1
14.29%
Matthew Wilcox
8
16.33%
3
42.86%
Marta Rybczynska
6
12.24%
1
14.29%
Matias Björling
5
10.20%
1
14.29%
Jens Axboe
1
2.04%
1
14.29%
Total
49
100.00%
7
100.00%



static inline void nvme_handle_cqe(struct nvme_queue *nvmeq, u16 idx)
{
	volatile struct nvme_completion *cqe = &nvmeq->cqes[idx];
	struct request *req;

	if (unlikely(cqe->command_id >= nvmeq->q_depth)) {
		dev_warn(nvmeq->dev->ctrl.device,
			"invalid id %d completed on queue %d\n",
			cqe->command_id, le16_to_cpu(cqe->sq_id));
		return;
	}

	/*
         * AEN requests are special as they don't time out and can
         * survive any kind of queue freeze and often don't respond to
         * aborts.  We don't even bother to allocate a struct request
         * for them but rather special case them here.
         */
	if (unlikely(nvmeq->qid == 0 &&
			cqe->command_id >= NVME_AQ_BLK_MQ_DEPTH)) {
		nvme_complete_async_event(&nvmeq->dev->ctrl,
				cqe->status, &cqe->result);
		return;
	}

	req = blk_mq_tag_to_rq(*nvmeq->tags, cqe->command_id);
	nvme_end_request(req, cqe->status, cqe->result);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Christoph Hellwig
77
54.61%
7
35.00%
Sagi Grimberg
20
14.18%
2
10.00%
Jens Axboe
15
10.64%
2
10.00%
Matthew Wilcox
11
7.80%
3
15.00%
Matias Björling
11
7.80%
1
5.00%
Keith Busch
4
2.84%
3
15.00%
Shane Michael Matthews
2
1.42%
1
5.00%
Marta Rybczynska
1
0.71%
1
5.00%
Total
141
100.00%
20
100.00%



static void nvme_complete_cqes(struct nvme_queue *nvmeq, u16 start, u16 end)
{
	while (start != end) {
		nvme_handle_cqe(nvmeq, start);
		if (++start == nvmeq->q_depth)
			start = 0;
	}
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Jens Axboe
25
55.56%
1
14.29%
Sagi Grimberg
15
33.33%
2
28.57%
Keith Busch
4
8.89%
3
42.86%
Matias Björling
1
2.22%
1
14.29%
Total
45
100.00%
7
100.00%



static inline void nvme_update_cq_head(struct nvme_queue *nvmeq)
{
	if (++nvmeq->cq_head == nvmeq->q_depth) {
		nvmeq->cq_head = 0;
		nvmeq->cq_phase = !nvmeq->cq_phase;
	}
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Sagi Grimberg
12
30.00%
2
28.57%
Jens Axboe
11
27.50%
1
14.29%
Matthew Wilcox
11
27.50%
3
42.86%
Matias Björling
6
15.00%
1
14.29%
Total
40
100.00%
7
100.00%



static inline bool nvme_process_cq(struct nvme_queue *nvmeq, u16 *start,
		u16 *end, int tag)
{
	bool found = false;

	*start = nvmeq->cq_head;
	while (!found && nvme_cqe_pending(nvmeq)) {
		if (nvmeq->cqes[nvmeq->cq_head].command_id == tag)
			found = true;
		nvme_update_cq_head(nvmeq);
	}
	*end = nvmeq->cq_head;

	if (*start != *end)
		nvme_ring_cq_doorbell(nvmeq);
	return found;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Jens Axboe
66
70.21%
2
18.18%
Sagi Grimberg
15
15.96%
3
27.27%
Matthew Wilcox
8
8.51%
3
27.27%
Keith Busch
4
4.26%
2
18.18%
Vishal Verma
1
1.06%
1
9.09%
Total
94
100.00%
11
100.00%



static irqreturn_t nvme_irq(int irq, void *data)
{
	struct nvme_queue *nvmeq = data;
	irqreturn_t ret = IRQ_NONE;
	u16 start, end;

	spin_lock(&nvmeq->cq_lock);
	if (nvmeq->cq_head != nvmeq->last_cq_head)
		ret = IRQ_HANDLED;
	nvme_process_cq(nvmeq, &start, &end, -1);
	nvmeq->last_cq_head = nvmeq->cq_head;
	spin_unlock(&nvmeq->cq_lock);

	if (start != end) {
		nvme_complete_cqes(nvmeq, start, end);
		return IRQ_HANDLED;
	}

	return ret;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Jens Axboe
55
52.38%
3
30.00%
Keith Busch
23
21.90%
3
30.00%
Matias Björling
23
21.90%
1
10.00%
Matthew Wilcox
4
3.81%
3
30.00%
Total
105
100.00%
10
100.00%



static irqreturn_t nvme_irq_check(int irq, void *data)
{
	struct nvme_queue *nvmeq = data;
	if (nvme_cqe_pending(nvmeq))
		return IRQ_WAKE_THREAD;
	return IRQ_NONE;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
12
36.36%
5
45.45%
Matias Björling
9
27.27%
1
9.09%
Marta Rybczynska
6
18.18%
1
9.09%
Matthew Wilcox
3
9.09%
2
18.18%
Christoph Hellwig
3
9.09%
2
18.18%
Total
33
100.00%
11
100.00%



static int __nvme_poll(struct nvme_queue *nvmeq, unsigned int tag)
{
	u16 start, end;
	bool found;

	if (!nvme_cqe_pending(nvmeq))
		return 0;

	spin_lock_irq(&nvmeq->cq_lock);
	found = nvme_process_cq(nvmeq, &start, &end, tag);
	spin_unlock_irq(&nvmeq->cq_lock);

	nvme_complete_cqes(nvmeq, start, end);
	return found;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Jens Axboe
44
57.14%
3
30.00%
Sagi Grimberg
21
27.27%
1
10.00%
Keith Busch
7
9.09%
3
30.00%
Matias Björling
3
3.90%
1
10.00%
Christoph Hellwig
1
1.30%
1
10.00%
Marta Rybczynska
1
1.30%
1
10.00%
Total
77
100.00%
10
100.00%



static int nvme_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag)
{
	struct nvme_queue *nvmeq = hctx->driver_data;

	return __nvme_poll(nvmeq, tag);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
32
100.00%
1
100.00%
Total
32
100.00%
1
100.00%



static void nvme_pci_submit_async_event(struct nvme_ctrl *ctrl)
{
	struct nvme_dev *dev = to_nvme_dev(ctrl);
	struct nvme_queue *nvmeq = &dev->queues[0];
	struct nvme_command c;

	memset(&c, 0, sizeof(c));
	c.common.opcode = nvme_admin_async_event;
	c.common.command_id = NVME_AQ_BLK_MQ_DEPTH;
	nvme_submit_cmd(nvmeq, &c);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Christoph Hellwig
57
76.00%
7
53.85%
Keith Busch
11
14.67%
4
30.77%
Matthew Wilcox
6
8.00%
1
7.69%
Sagi Grimberg
1
1.33%
1
7.69%
Total
75
100.00%
13
100.00%



static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
{
	struct nvme_command c;

	memset(&c, 0, sizeof(c));
	c.delete_queue.opcode = opcode;
	c.delete_queue.qid = cpu_to_le16(id);

	return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Matthew Wilcox
57
81.43%
2
20.00%
Christoph Hellwig
6
8.57%
3
30.00%
Keith Busch
5
7.14%
3
30.00%
Matias Björling
2
2.86%
2
20.00%
Total
70
100.00%
10
100.00%



static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
		struct nvme_queue *nvmeq, s16 vector)
{
	struct nvme_command c;
	int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;

	/*
         * Note: we (ab)use the fact that the prp fields survive if no data
         * is attached to the request.
         */
	memset(&c, 0, sizeof(c));
	c.create_cq.opcode = nvme_admin_create_cq;
	c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
	c.create_cq.cqid = cpu_to_le16(qid);
	c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
	c.create_cq.cq_flags = cpu_to_le16(flags);
	c.create_cq.irq_vector = cpu_to_le16(vector);

	return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Matthew Wilcox
97
72.93%
3
21.43%
Keith Busch
21
15.79%
5
35.71%
Christoph Hellwig
6
4.51%
3
21.43%
Dan J Williams
4
3.01%
1
7.14%
Jianchao Wang
4
3.01%
1
7.14%
Minwoo Im
1
0.75%
1
7.14%
Total
133
100.00%
14
100.00%



static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
						struct nvme_queue *nvmeq)
{
	struct nvme_ctrl *ctrl = &dev->ctrl;
	struct nvme_command c;
	int flags = NVME_QUEUE_PHYS_CONTIG;

	/*
         * Some drives have a bug that auto-enables WRRU if MEDIUM isn't
         * set. Since URGENT priority is zeroes, it makes all queues
         * URGENT.
         */
	if (ctrl->quirks & NVME_QUIRK_MEDIUM_PRIO_SQ)
		flags |= NVME_SQ_PRIO_MEDIUM;

	/*
         * Note: we (ab)use the fact that the prp fields survive if no data
         * is attached to the request.
         */
	memset(&c, 0, sizeof(c));
	c.create_sq.opcode = nvme_admin_create_sq;
	c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
	c.create_sq.sqid = cpu_to_le16(qid);
	c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
	c.create_sq.sq_flags = cpu_to_le16(flags);
	c.create_sq.cqid = cpu_to_le16(qid);

	return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Matthew Wilcox
63
41.72%
3
30.00%
Keith Busch
56
37.09%
1
10.00%
Jens Axboe
23
15.23%
1
10.00%
Christoph Hellwig
8
5.30%
4
40.00%
Minwoo Im
1
0.66%
1
10.00%
Total
151
100.00%
10
100.00%



static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
{
	return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
15
62.50%
1
50.00%
Matthew Wilcox
9
37.50%
1
50.00%
Total
24
100.00%
2
100.00%



static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
{
	return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
18
75.00%
2
66.67%
Matthew Wilcox
6
25.00%
1
33.33%
Total
24
100.00%
3
100.00%



static void abort_endio(struct request *req, blk_status_t error)
{
	struct nvme_iod *iod = blk_mq_rq_to_pdu(req);
	struct nvme_queue *nvmeq = iod->nvmeq;

	dev_warn(nvmeq->dev->ctrl.device,
		 "Abort status: 0x%x", nvme_req(req)->status);
	atomic_inc(&nvmeq->dev->ctrl.abort_limit);
	blk_mq_free_request(req);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Christoph Hellwig
47
67.14%
5
71.43%
Keith Busch
18
25.71%
1
14.29%
Sagi Grimberg
5
7.14%
1
14.29%
Total
70
100.00%
7
100.00%



static bool nvme_should_reset(struct nvme_dev *dev, u32 csts)
{

	/* If true, indicates loss of adapter communication, possibly by a
         * NVMe Subsystem reset.
         */
	bool nssro = dev->subsystem && (csts & NVME_CSTS_NSSRO);

	/* If there is a reset/reinit ongoing, we shouldn't reset again. */
	switch (dev->ctrl.state) {
	case NVME_CTRL_RESETTING:
	case NVME_CTRL_CONNECTING:
		return false;
	default:
		break;
	}

	/* We shouldn't reset unless the controller is on fatal error state
         * _or_ if we lost the communication with it.
         */
	if (!(csts & NVME_CSTS_CFS) && !nssro)
		return false;

	return true;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
55
79.71%
5
62.50%
Jianchao Wang
11
15.94%
1
12.50%
Christoph Hellwig
2
2.90%
1
12.50%
Max Gurtovoy
1
1.45%
1
12.50%
Total
69
100.00%
8
100.00%



static void nvme_warn_reset(struct nvme_dev *dev, u32 csts)
{
	/* Read a config register to help see what died. */
	u16 pci_status;
	int result;

	result = pci_read_config_word(to_pci_dev(dev->dev), PCI_STATUS,
				      &pci_status);
	if (result == PCIBIOS_SUCCESSFUL)
		dev_warn(dev->ctrl.device,
			 "controller is down; will reset: CSTS=0x%x, PCI_STATUS=0x%hx\n",
			 csts, pci_status);
	else
		dev_warn(dev->ctrl.device,
			 "controller is down; will reset: CSTS=0x%x, PCI_STATUS read failed (%d)\n",
			 csts, result);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
75
100.00%
1
100.00%
Total
75
100.00%
1
100.00%



static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
{
	struct nvme_iod *iod = blk_mq_rq_to_pdu(req);
	struct nvme_queue *nvmeq = iod->nvmeq;
	struct nvme_dev *dev = nvmeq->dev;
	struct request *abort_req;
	struct nvme_command cmd;
	u32 csts = readl(dev->bar + NVME_REG_CSTS);

	/* If PCI error recovery process is happening, we cannot reset or
         * the recovery mechanism will surely fail.
         */
	mb();
	if (pci_channel_offline(to_pci_dev(dev->dev)))
		return BLK_EH_RESET_TIMER;

	/*
         * Reset immediately if the controller is failed
         */
	if (nvme_should_reset(dev, csts)) {
		nvme_warn_reset(dev, csts);
		nvme_dev_disable(dev, false);
		nvme_reset_ctrl(&dev->ctrl);
		return BLK_EH_DONE;
	}

	/*
         * Did we miss an interrupt?
         */
	if (__nvme_poll(nvmeq, req->tag)) {
		dev_warn(dev->ctrl.device,
			 "I/O %d QID %d timeout, completion polled\n",
			 req->tag, nvmeq->qid);
		return BLK_EH_DONE;
	}

	/*
         * Shutdown immediately if controller times out while starting. The
         * reset work will see the pci device disabled when it gets the forced
         * cancellation error. All outstanding requests are completed on
         * shutdown, so we return BLK_EH_DONE.
         */
	switch (dev->ctrl.state) {
	case NVME_CTRL_CONNECTING:
	case NVME_CTRL_RESETTING:
		dev_warn_ratelimited(dev->ctrl.device,
			 "I/O %d QID %d timeout, disable controller\n",
			 req->tag, nvmeq->qid);
		nvme_dev_disable(dev, false);
		nvme_req(req)->flags |= NVME_REQ_CANCELLED;
		return BLK_EH_DONE;
	default:
		break;
	}

	/*
         * Shutdown the controller immediately and schedule a reset if the
         * command was already aborted once before and still hasn't been
         * returned to the driver, or if this is the admin queue.
         */
	if (!nvmeq->qid || iod->aborted) {
		dev_warn(dev->ctrl.device,
			 "I/O %d QID %d timeout, reset controller\n",
			 req->tag, nvmeq->qid);
		nvme_dev_disable(dev, false);
		nvme_reset_ctrl(&dev->ctrl);

		nvme_req(req)->flags |= NVME_REQ_CANCELLED;
		return BLK_EH_DONE;
	}

	if (atomic_dec_return(&dev->ctrl.abort_limit) < 0) {
		atomic_inc(&dev->ctrl.abort_limit);
		return BLK_EH_RESET_TIMER;
	}
	iod->aborted = 1;

	memset(&cmd, 0, sizeof(cmd));
	cmd.abort.opcode = nvme_admin_abort_cmd;
	cmd.abort.cid = req->tag;
	cmd.abort.sqid = cpu_to_le16(nvmeq->qid);

	dev_warn(nvmeq->dev->ctrl.device,
		"I/O %d QID %d timeout, aborting\n",
		 req->tag, nvmeq->qid);

	abort_req = nvme_alloc_request(dev->ctrl.admin_q, &cmd,
			BLK_MQ_REQ_NOWAIT, NVME_QID_ANY);
	if (IS_ERR(abort_req)) {
		atomic_inc(&dev->ctrl.abort_limit);
		return BLK_EH_RESET_TIMER;
	}

	abort_req->timeout = ADMIN_TIMEOUT;
	abort_req->end_io_data = NULL;
	blk_execute_rq_nowait(abort_req->q, NULL, abort_req, 0, abort_endio);

	/*
         * The aborted req will be completed on receiving the abort req.
         * We enable the timer again. If hit twice, it'll cause a device reset,
         * as the device then is in a faulty state.
         */
	return BLK_EH_RESET_TIMER;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
212
47.75%
16
44.44%
Christoph Hellwig
161
36.26%
13
36.11%
Matias Björling
23
5.18%
1
2.78%
Wendy Xiong
19
4.28%
1
2.78%
Matthew Wilcox
18
4.05%
4
11.11%
Sagi Grimberg
11
2.48%
1
2.78%
Total
444
100.00%
36
100.00%



static void nvme_free_queue(struct nvme_queue *nvmeq)
{
	dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
				(void *)nvmeq->cqes, nvmeq->cq_dma_addr);
	if (nvmeq->sq_cmds)
		dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
					nvmeq->sq_cmds, nvmeq->sq_dma_addr);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Matthew Wilcox
23
35.38%
5
50.00%
Matias Björling
22
33.85%
1
10.00%
Keith Busch
18
27.69%
3
30.00%
Jon Derrick
2
3.08%
1
10.00%
Total
65
100.00%
10
100.00%



static void nvme_free_queues(struct nvme_dev *dev, int lowest)
{
	int i;

	for (i = dev->ctrl.queue_count - 1; i >= lowest; i--) {
		dev->ctrl.queue_count--;
		nvme_free_queue(&dev->queues[i]);
	}
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
39
69.64%
6
54.55%
Sagi Grimberg
7
12.50%
2
18.18%
Matias Björling
5
8.93%
1
9.09%
Matthew Wilcox
4
7.14%
1
9.09%
kaoudis
1
1.79%
1
9.09%
Total
56
100.00%
11
100.00%

/**
 * nvme_suspend_queue - put queue into suspended state
 * @nvmeq - queue to suspend
 */


static int nvme_suspend_queue(struct nvme_queue *nvmeq)
{
	int vector;

	spin_lock_irq(&nvmeq->cq_lock);
	if (nvmeq->cq_vector == -1) {
		spin_unlock_irq(&nvmeq->cq_lock);
		return 1;
	}
	vector = nvmeq->cq_vector;
	nvmeq->dev->online_queues--;
	nvmeq->cq_vector = -1;
	spin_unlock_irq(&nvmeq->cq_lock);

	/*
         * Ensure that nvme_queue_rq() sees it ->cq_vector == -1 without
         * having to grab the lock.
         */
	mb();

	if (!nvmeq->qid && nvmeq->dev->ctrl.admin_q)
		blk_mq_quiesce_queue(nvmeq->dev->ctrl.admin_q);

	pci_free_irq(to_pci_dev(nvmeq->dev->dev), vector, nvmeq);

	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
56
46.28%
7
36.84%
Matthew Wilcox
27
22.31%
5
26.32%
Christoph Hellwig
16
13.22%
2
10.53%
Matias Björling
13
10.74%
1
5.26%
Jens Axboe
7
5.79%
2
10.53%
Greg Kroah-Hartman
1
0.83%
1
5.26%
Sagi Grimberg
1
0.83%
1
5.26%
Total
121
100.00%
19
100.00%



static void nvme_disable_admin_queue(struct nvme_dev *dev, bool shutdown)
{
	struct nvme_queue *nvmeq = &dev->queues[0];
	u16 start, end;

	if (shutdown)
		nvme_shutdown_ctrl(&dev->ctrl);
	else
		nvme_disable_ctrl(&dev->ctrl, dev->ctrl.cap);

	spin_lock_irq(&nvmeq->cq_lock);
	nvme_process_cq(nvmeq, &start, &end, -1);
	spin_unlock_irq(&nvmeq->cq_lock);

	nvme_complete_cqes(nvmeq, start, end);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
44
44.90%
8
44.44%
Jens Axboe
23
23.47%
2
11.11%
Matthew Wilcox
20
20.41%
5
27.78%
Matias Björling
7
7.14%
1
5.56%
Sagi Grimberg
4
4.08%
2
11.11%
Total
98
100.00%
18
100.00%



static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues,
				int entry_size)
{
	int q_depth = dev->q_depth;
	unsigned q_size_aligned = roundup(q_depth * entry_size,
					  dev->ctrl.page_size);

	if (q_size_aligned * nr_io_queues > dev->cmb_size) {
		u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues);
		mem_per_q = round_down(mem_per_q, dev->ctrl.page_size);
		q_depth = div_u64(mem_per_q, entry_size);

		/*
                 * Ensure the reduced q_depth is above some threshold where it
                 * would be better to map queues in system memory with the
                 * original depth
                 */
		if (q_depth < 64)
			return -ENOMEM;
	}

	return q_depth;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Jon Derrick
54
54.00%
2
15.38%
Keith Busch
15
15.00%
4
30.77%
Matthew Wilcox
13
13.00%
4
30.77%
Christoph Hellwig
10
10.00%
2
15.38%
Matias Björling
8
8.00%
1
7.69%
Total
100
100.00%
13
100.00%



static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq,
				int qid, int depth)
{
	/* CMB SQEs will be mapped before creation */
	if (qid && dev->cmb && use_cmb_sqes && (dev->cmbsz & NVME_CMBSZ_SQS))
		return 0;

	nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth),
					    &nvmeq->sq_dma_addr, GFP_KERNEL);
	if (!nvmeq->sq_cmds)
		return -ENOMEM;
	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Jon Derrick
37
45.68%
1
8.33%
Matthew Wilcox
16
19.75%
3
25.00%
Keith Busch
12
14.81%
5
41.67%
Matias Björling
10
12.35%
1
8.33%
Christoph Hellwig
6
7.41%
2
16.67%
Total
81
100.00%
12
100.00%



static int nvme_alloc_queue(struct nvme_dev *dev, int qid, int depth)
{
	struct nvme_queue *nvmeq = &dev->queues[qid];

	if (dev->ctrl.queue_count > qid)
		return 0;

	nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth),
					  &nvmeq->cq_dma_addr, GFP_KERNEL);
	if (!nvmeq->cqes)
		goto free_nvmeq;

	if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth))
		goto free_cqdma;

	nvmeq->q_dmadev = dev->dev;
	nvmeq->dev = dev;
	spin_lock_init(&nvmeq->sq_lock);
	spin_lock_init(&nvmeq->cq_lock);
	nvmeq->cq_head = 0;
	nvmeq->cq_phase = 1;
	nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
	nvmeq->q_depth = depth;
	nvmeq->qid = qid;
	nvmeq->cq_vector = -1;
	dev->ctrl.queue_count++;

	return 0;

 free_cqdma:
	dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
							nvmeq->cq_dma_addr);
 free_nvmeq:
	return -ENOMEM;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Matthew Wilcox
85
39.91%
7
31.82%
Jon Derrick
65
30.52%
3
13.64%
Keith Busch
30
14.08%
5
22.73%
Sagi Grimberg
13
6.10%
2
9.09%
Jens Axboe
9
4.23%
1
4.55%
Christoph Hellwig
5
2.35%
1
4.55%
Matias Björling
3
1.41%
1
4.55%
Haiyan Hu
2
0.94%
1
4.55%
Joe Perches
1
0.47%
1
4.55%
Total
213
100.00%
22
100.00%



static int queue_request_irq(struct nvme_queue *nvmeq)
{
	struct pci_dev *pdev = to_pci_dev(nvmeq->dev->dev);
	int nr = nvmeq->dev->ctrl.instance;

	if (use_threaded_interrupts) {
		return pci_request_irq(pdev, nvmeq->cq_vector, nvme_irq_check,
				nvme_irq, nvmeq, "nvme%dq%d", nr, nvmeq->qid);
	} else {
		return pci_request_irq(pdev, nvmeq->cq_vector, nvme_irq,
				NULL, nvmeq, "nvme%dq%d", nr, nvmeq->qid);
	}
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Christoph Hellwig
57
61.29%
2
20.00%
Matthew Wilcox
22
23.66%
4
40.00%
Jon Derrick
8
8.60%
1
10.00%
Keith Busch
5
5.38%
2
20.00%
Matias Björling
1
1.08%
1
10.00%
Total
93
100.00%
10
100.00%



static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
{
	struct nvme_dev *dev = nvmeq->dev;

	spin_lock_irq(&nvmeq->cq_lock);
	nvmeq->sq_tail = 0;
	nvmeq->cq_head = 0;
	nvmeq->cq_phase = 1;
	nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
	memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
	nvme_dbbuf_init(dev, nvmeq, qid);
	dev->online_queues++;
	spin_unlock_irq(&nvmeq->cq_lock);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
67
61.47%
3
23.08%
Matthew Wilcox
13
11.93%
5
38.46%
Matias Björling
12
11.01%
1
7.69%
Helen Mae Koike Fornazier
9
8.26%
1
7.69%
Greg Kroah-Hartman
4
3.67%
1
7.69%
Haiyan Hu
2
1.83%
1
7.69%
Jens Axboe
2
1.83%
1
7.69%
Total
109
100.00%
13
100.00%



static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
{
	struct nvme_dev *dev = nvmeq->dev;
	int result;
	s16 vector;

	if (dev->cmb && use_cmb_sqes && (dev->cmbsz & NVME_CMBSZ_SQS)) {
		unsigned offset = (qid - 1) * roundup(SQ_SIZE(nvmeq->q_depth),
						      dev->ctrl.page_size);
		nvmeq->sq_dma_addr = dev->cmb_bus_addr + offset;
		nvmeq->sq_cmds_io = dev->cmb + offset;
	}

	/*
         * A queue's vector matches the queue identifier unless the controller
         * has only one vector available.
         */
	vector = dev->num_vecs == 1 ? 0 : qid;
	result = adapter_alloc_cq(dev, qid, nvmeq, vector);
	if (result)
		return result;

	result = adapter_alloc_sq(dev, qid, nvmeq);
	if (result < 0)
		return result;
	else if (result)
		goto release_cq;

	/*
         * Set cq_vector after alloc cq/sq, otherwise nvme_suspend_queue will
         * invoke free_irq for it and cause a 'Trying to free already-free IRQ
         * xxx' warning if the create CQ/SQ command times out.
         */
	nvmeq->cq_vector = vector;
	nvme_init_queue(nvmeq, qid);
	result = queue_request_irq(nvmeq);
	if (result < 0)
		goto release_sq;

	return result;

release_sq:
	nvmeq->cq_vector = -1;
	dev->online_queues--;
	adapter_delete_sq(dev, qid);
release_cq:
	adapter_delete_cq(dev, qid);
	return result;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
119
54.34%
10
38.46%
Matthew Wilcox
46
21.00%
9
34.62%
Jianchao Wang
25
11.42%
2
7.69%
Jon Derrick
18
8.22%
1
3.85%
Matias Björling
7
3.20%
1
3.85%
Ramachandra Rao Gajula
2
0.91%
1
3.85%
Christoph Hellwig
1
0.46%
1
3.85%
Greg Kroah-Hartman
1
0.46%
1
3.85%
Total
219
100.00%
26
100.00%


static const struct blk_mq_ops nvme_mq_admin_ops = {
	.queue_rq	= nvme_queue_rq,
	.complete	= nvme_pci_complete_rq,
	.init_hctx	= nvme_admin_init_hctx,
	.exit_hctx      = nvme_admin_exit_hctx,
	.init_request	= nvme_init_request,
	.timeout	= nvme_timeout,
};


static const struct blk_mq_ops nvme_mq_ops = {
	.queue_rq	= nvme_queue_rq,
	.complete	= nvme_pci_complete_rq,
	.init_hctx	= nvme_init_hctx,
	.init_request	= nvme_init_request,
	.map_queues	= nvme_pci_map_queues,
	.timeout	= nvme_timeout,
	.poll		= nvme_poll,
};



static void nvme_dev_remove_admin(struct nvme_dev *dev)
{
	if (dev->ctrl.admin_q && !blk_queue_dying(dev->ctrl.admin_q)) {
		/*
                 * If the controller was reset during removal, it's possible
                 * user requests may be waiting on a stopped queue. Start the
                 * queue to flush these to completion.
                 */
		blk_mq_unquiesce_queue(dev->ctrl.admin_q);
		blk_cleanup_queue(dev->ctrl.admin_q);
		blk_mq_free_tag_set(&dev->admin_tagset);
	}
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
39
67.24%
4
36.36%
Christoph Hellwig
6
10.34%
1
9.09%
Matthew Wilcox
6
10.34%
4
36.36%
Matias Björling
6
10.34%
1
9.09%
Sagi Grimberg
1
1.72%
1
9.09%
Total
58
100.00%
11
100.00%



static int nvme_alloc_admin_tags(struct nvme_dev *dev)
{
	if (!dev->ctrl.admin_q) {
		dev->admin_tagset.ops = &nvme_mq_admin_ops;
		dev->admin_tagset.nr_hw_queues = 1;

		dev->admin_tagset.queue_depth = NVME_AQ_MQ_TAG_DEPTH;
		dev->admin_tagset.timeout = ADMIN_TIMEOUT;
		dev->admin_tagset.numa_node = dev_to_node(dev->dev);
		dev->admin_tagset.cmd_size = nvme_pci_cmd_size(dev, false);
		dev->admin_tagset.flags = BLK_MQ_F_NO_SCHED;
		dev->admin_tagset.driver_data = dev;

		if (blk_mq_alloc_tag_set(&dev->admin_tagset))
			return -ENOMEM;
		dev->ctrl.admin_tagset = &dev->admin_tagset;

		dev->ctrl.admin_q = blk_mq_init_queue(&dev->admin_tagset);
		if (IS_ERR(dev->ctrl.admin_q)) {
			blk_mq_free_tag_set(&dev->admin_tagset);
			return -ENOMEM;
		}
		if (!blk_get_queue(dev->ctrl.admin_q)) {
			nvme_dev_remove_admin(dev);
			dev->ctrl.admin_q = NULL;
			return -ENODEV;
		}
	} else
		blk_mq_unquiesce_queue(dev->ctrl.admin_q);

	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Matias Björling
92
44.88%
1
3.85%
Keith Busch
55
26.83%
12
46.15%
Matthew Wilcox
20
9.76%
5
19.23%
Christoph Hellwig
14
6.83%
1
3.85%
Jens Axboe
9
4.39%
2
7.69%
Sagi Grimberg
9
4.39%
2
7.69%
Chaitanya Kulkarni
3
1.46%
1
3.85%
Jon Derrick
2
0.98%
1
3.85%
Ming Lei
1
0.49%
1
3.85%
Total
205
100.00%
26
100.00%



static unsigned long db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
{
	return NVME_REG_DBS + ((nr_io_queues + 1) * 8 * dev->db_stride);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Xu Yu
24
75.00%
1
33.33%
Keith Busch
6
18.75%
1
33.33%
Matias Björling
2
6.25%
1
33.33%
Total
32
100.00%
3
100.00%



static int nvme_remap_bar(struct nvme_dev *dev, unsigned long size)
{
	struct pci_dev *pdev = to_pci_dev(dev->dev);

	if (size <= dev->bar_mapped_size)
		return 0;
	if (size > pci_resource_len(pdev, 0))
		return -ENOMEM;
	if (dev->bar)
		iounmap(dev->bar);
	dev->bar = ioremap(pci_resource_start(pdev, 0), size);
	if (!dev->bar) {
		dev->bar_mapped_size = 0;
		return -ENOMEM;
	}
	dev->bar_mapped_size = size;
	dev->dbs = dev->bar + NVME_REG_DBS;

	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Xu Yu
120
100.00%
1
100.00%
Total
120
100.00%
1
100.00%



static int nvme_pci_configure_admin_queue(struct nvme_dev *dev)
{
	int result;
	u32 aqa;
	struct nvme_queue *nvmeq;

	result = nvme_remap_bar(dev, db_bar_size(dev, 0));
	if (result < 0)
		return result;

	dev->subsystem = readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 1, 0) ?
				NVME_CAP_NSSRC(dev->ctrl.cap) : 0;

	if (dev->subsystem &&
	    (readl(dev->bar + NVME_REG_CSTS) & NVME_CSTS_NSSRO))
		writel(NVME_CSTS_NSSRO, dev->bar + NVME_REG_CSTS);

	result = nvme_disable_ctrl(&dev->ctrl, dev->ctrl.cap);
	if (result < 0)
		return result;

	result = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
	if (result)
		return result;

	nvmeq = &dev->queues[0];
	aqa = nvmeq->q_depth - 1;
	aqa |= aqa << 16;

	writel(aqa, dev->bar + NVME_REG_AQA);
	lo_hi_writeq(nvmeq->sq_dma_addr, dev->bar + NVME_REG_ASQ);
	lo_hi_writeq(nvmeq->cq_dma_addr, dev->bar + NVME_REG_ACQ);

	result = nvme_enable_ctrl(&dev->ctrl, dev->ctrl.cap);
	if (result)
		return result;

	nvmeq->cq_vector = 0;
	nvme_init_queue(nvmeq, 0);
	result = queue_request_irq(nvmeq);
	if (result) {
		nvmeq->cq_vector = -1;
		return result;
	}

	return result;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
101
36.86%
10
34.48%
Matthew Wilcox
81
29.56%
8
27.59%
Sagi Grimberg
26
9.49%
3
10.34%
Xu Yu
23
8.39%
1
3.45%
Christoph Hellwig
15
5.47%
2
6.90%
Matias Björling
10
3.65%
1
3.45%
Jon Derrick
8
2.92%
1
3.45%
Jens Axboe
6
2.19%
1
3.45%
Stephan Günther
2
0.73%
1
3.45%
Gabriel Krisman Bertazi
2
0.73%
1
3.45%
Total
274
100.00%
29
100.00%



static int nvme_create_io_queues(struct nvme_dev *dev)
{
	unsigned i, max;
	int ret = 0;

	for (i = dev->ctrl.queue_count; i <= dev->max_qid; i++) {
		if (nvme_alloc_queue(dev, i, dev->q_depth)) {
			ret = -ENOMEM;
			break;
		}
	}

	max = min(dev->max_qid, dev->ctrl.queue_count - 1);
	for (i = dev->online_queues; i <= max; i++) {
		ret = nvme_create_queue(&dev->queues[i], i);
		if (ret)
			break;
	}

	/*
         * Ignore failing Create SQ/CQ commands, we can continue with less
         * than the desired amount of queues, and even a controller without
         * I/O queues can still be used to issue admin commands.  This might
         * be useful to upgrade a buggy firmware for example.
         */
	return ret >= 0 ? 0 : ret;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Christoph Hellwig
64
50.39%
2
11.76%
Keith Busch
30
23.62%
6
35.29%
Guilherme G. Piccoli
15
11.81%
1
5.88%
Matthew Wilcox
11
8.66%
4
23.53%
Sagi Grimberg
5
3.94%
2
11.76%
Matias Björling
1
0.79%
1
5.88%
Minwoo Im
1
0.79%
1
5.88%
Total
127
100.00%
17
100.00%



static ssize_t nvme_cmb_show(struct device *dev,
			     struct device_attribute *attr,
			     char *buf)
{
	struct nvme_dev *ndev = to_nvme_dev(dev_get_drvdata(dev));

	return scnprintf(buf, PAGE_SIZE, "cmbloc : x%08x\ncmbsz  : x%08x\n",
		       ndev->cmbloc, ndev->cmbsz);
}
Contributors
Person
Tokens
Prop
Commits
CommitProp
Stephen Bates
51
100.00%
2
100.00%
Total
51
100.00%
2
100.00%

static DEVICE_ATTR(cmb, S_IRUGO, nvme_cmb_show, NULL);



static u64 nvme_cmb_size_unit(struct nvme_dev *dev)
{
	u8 szu = (dev->cmbsz >> NVME_CMBSZ_SZU_SHIFT) & NVME_CMBSZ_SZU_MASK;

	return 1ULL << (12 + 4 * szu);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Christoph Hellwig
35
100.00%
1
100.00%
Total
35
100.00%
1
100.00%



static u32 nvme_cmb_size(struct nvme_dev *dev)
{
	return (dev->cmbsz >> NVME_CMBSZ_SZ_SHIFT) & NVME_CMBSZ_SZ_MASK;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Christoph Hellwig
22
100.00%
1
100.00%
Total
22
100.00%
1
100.00%



static void nvme_map_cmb(struct nvme_dev *dev)
{
	u64 size, offset;
	resource_size_t bar_size;
	struct pci_dev *pdev = to_pci_dev(dev->dev);
	int bar;

	dev->cmbsz = readl(dev->bar + NVME_REG_CMBSZ);
	if (!dev->cmbsz)
		return;
	dev->cmbloc = readl(dev->bar + NVME_REG_CMBLOC);

	if (!use_cmb_sqes)
		return;

	size = nvme_cmb_size_unit(dev) * nvme_cmb_size(dev);
	offset = nvme_cmb_size_unit(dev) * NVME_CMB_OFST(dev->cmbloc);
	bar = NVME_CMB_BIR(dev->cmbloc);
	bar_size = pci_resource_len(pdev, bar);

	if (offset > bar_size)
		return;

	/*
         * Controllers may support a CMB size larger than their BAR,
         * for example, due to being behind a bridge. Reduce the CMB to
         * the reported size of the BAR
         */
	if (size > bar_size - offset)
		size = bar_size - offset;

	dev->cmb = ioremap_wc(pci_resource_start(pdev, bar) + offset, size);
	if (!dev->cmb)
		return;
	dev->cmb_bus_addr = pci_bus_address(pdev, bar) + offset;
	dev->cmb_size = size;

	if (sysfs_add_file_to_group(&dev->ctrl.device->kobj,
				    &dev_attr_cmb.attr, NULL))
		dev_warn(dev->ctrl.device,
			 "failed to add sysfs attribute for CMB\n");
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Christoph Hellwig
133
61.29%
5
22.73%
Matias Björling
26
11.98%
1
4.55%
Keith Busch
24
11.06%
5
22.73%
Stephen Bates
11
5.07%
1
4.55%
Matthew Wilcox
11
5.07%
5
22.73%
Ramachandra Rao Gajula
5
2.30%
1
4.55%
Sathyavathi M
3
1.38%
1
4.55%
Linus Torvalds
2
0.92%
1
4.55%
Jon Derrick
1
0.46%
1
4.55%
Jens Axboe
1
0.46%
1
4.55%
Total
217
100.00%
22
100.00%



static inline void nvme_release_cmb(struct nvme_dev *dev)
{
	if (dev->cmb) {
		iounmap(dev->cmb);
		dev->cmb = NULL;
		sysfs_remove_file_from_group(&dev->ctrl.device->kobj,
					     &dev_attr_cmb.attr, NULL);
		dev->cmbsz = 0;
	}
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Jon Derrick
26
44.83%
1
16.67%
Christoph Hellwig
19
32.76%
1
16.67%
Matias Björling
6
10.34%
1
16.67%
Matthew Wilcox
4
6.90%
1
16.67%
Keith Busch
3
5.17%
2
33.33%
Total
58
100.00%
6
100.00%



static int nvme_set_host_mem(struct nvme_dev *dev, u32 bits)
{
	u64 dma_addr = dev->host_mem_descs_dma;
	struct nvme_command c;
	int ret;

	memset(&c, 0, sizeof(c));
	c.features.opcode	= nvme_admin_set_features;
	c.features.fid		= cpu_to_le32(NVME_FEAT_HOST_MEM_BUF);
	c.features.dword11	= cpu_to_le32(bits);
	c.features.dword12	= cpu_to_le32(dev->host_mem_size >>
					      ilog2(dev->ctrl.page_size));
	c.features.dword13	= cpu_to_le32(lower_32_bits(dma_addr));
	c.features.dword14	= cpu_to_le32(upper_32_bits(dma_addr));
	c.features.dword15	= cpu_to_le32(dev->nr_host_mem_descs);

	ret = nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0);
	if (ret) {
		dev_warn(dev->ctrl.device,
			 "failed to set host mem (err %d, flags %#x).\n",
			 ret, bits);
	}
	return ret;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Christoph Hellwig
147
83.52%
3
33.33%
Matthew Wilcox
13
7.39%
2
22.22%
Keith Busch
12
6.82%
3
33.33%
Jens Axboe
4
2.27%
1
11.11%
Total
176
100.00%
9
100.00%



static void nvme_free_host_mem(struct nvme_dev *dev)
{
	int i;

	for (i = 0; i < dev->nr_host_mem_descs; i++) {
		struct nvme_host_mem_buf_desc *desc = &dev->host_mem_descs[i];
		size_t size = le32_to_cpu(desc->size) * dev->ctrl.page_size;

		dma_free_coherent(dev->dev, size, dev->host_mem_desc_bufs[i],
				le64_to_cpu(desc->addr));
	}

	kfree(dev->host_mem_desc_bufs);
	dev->host_mem_desc_bufs = NULL;
	dma_free_coherent(dev->dev,
			dev->nr_host_mem_descs * sizeof(*dev->host_mem_descs),
			dev->host_mem_descs, dev->host_mem_descs_dma);
	dev->host_mem_descs = NULL;
	dev->nr_host_mem_descs = 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Christoph Hellwig
129
95.56%
2
66.67%
Minwoo Im
6
4.44%
1
33.33%
Total
135
100.00%
3
100.00%



static int __nvme_alloc_host_mem(struct nvme_dev *dev, u64 preferred,
		u32 chunk_size)
{
	struct nvme_host_mem_buf_desc *descs;
	u32 max_entries, len;
	dma_addr_t descs_dma;
	int i = 0;
	void **bufs;
	u64 size, tmp;

	tmp = (preferred + chunk_size - 1);
	do_div(tmp, chunk_size);
	max_entries = tmp;

	if (dev->ctrl.hmmaxd && dev->ctrl.hmmaxd < max_entries)
		max_entries = dev->ctrl.hmmaxd;

	descs = dma_zalloc_coherent(dev->dev, max_entries * sizeof(*descs),
			&descs_dma, GFP_KERNEL);
	if (!descs)
		goto out;

	bufs = kcalloc(max_entries, sizeof(*bufs), GFP_KERNEL);
	if (!bufs)
		goto out_free_descs;

	for (size = 0; size < preferred && i < max_entries; size += len) {
		dma_addr_t dma_addr;

		len = min_t(u64, chunk_size, preferred - size);
		bufs[i] = dma_alloc_attrs(dev->dev, len, &dma_addr, GFP_KERNEL,
				DMA_ATTR_NO_KERNEL_MAPPING | DMA_ATTR_NO_WARN);
		if (!bufs[i])
			break;

		descs[i].addr = cpu_to_le64(dma_addr);
		descs[i].size = cpu_to_le32(len / dev->ctrl.page_size);
		i++;
	}

	if (!size)
		goto out_free_bufs;

	dev->nr_host_mem_descs = i;
	dev->host_mem_size = size;
	dev->host_mem_descs = descs;
	dev->host_mem_descs_dma = descs_dma;
	dev->host_mem_desc_bufs = bufs;
	return 0;

out_free_bufs:
	while (--i >= 0) {
		size_t size = le32_to_cpu(descs[i].size) * dev->ctrl.page_size;

		dma_free_coherent(dev->dev, size, bufs[i],
				le64_to_cpu(descs[i].addr));
	}

	kfree(bufs);
out_free_descs:
	dma_free_coherent(dev->dev, max_entries * sizeof(*descs), descs,
			descs_dma);
out:
	dev->host_mem_descs = NULL;
	return -ENOMEM;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Christoph Hellwig
371
98.41%
5
71.43%
Minwoo Im
4
1.06%
1
14.29%
Dan Carpenter
2
0.53%
1
14.29%
Total
377
100.00%
7
100.00%



static int nvme_alloc_host_mem(struct nvme_dev *dev, u64 min, u64 preferred)
{
	u32 chunk_size;

	/* start big and work our way down */
	for (chunk_size = min_t(u64, preferred, PAGE_SIZE * MAX_ORDER_NR_PAGES);
	     chunk_size >= max_t(u32, dev->ctrl.hmminds * 4096, PAGE_SIZE * 2);
	     chunk_size /= 2) {
		if (!__nvme_alloc_host_mem(dev, preferred, chunk_size)) {
			if (!min || dev->host_mem_size >= min)
				return 0;
			nvme_free_host_mem(dev);
		}
	}

	return -ENOMEM;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Christoph Hellwig
92
93.88%
4
57.14%
Matias Björling
3
3.06%
1
14.29%
Akinobu Mita
2
2.04%
1
14.29%
Jon Derrick
1
1.02%
1
14.29%
Total
98
100.00%
7
100.00%



static int nvme_setup_host_mem(struct nvme_dev *dev)
{
	u64 max = (u64)max_host_mem_size_mb * SZ_1M;
	u64 preferred = (u64)dev->ctrl.hmpre * 4096;
	u64 min = (u64)dev->ctrl.hmmin * 4096;
	u32 enable_bits = NVME_HOST_MEM_ENABLE;
	int ret;

	preferred = min(preferred, max);
	if (min > max) {
		dev_warn(dev->ctrl.device,
			"min host memory (%lld MiB) above limit (%d MiB).\n",
			min >> ilog2(SZ_1M), max_host_mem_size_mb);
		nvme_free_host_mem(dev);
		return 0;
	}

	/*
         * If we already have a buffer allocated check if we can reuse it.
         */
	if (dev->host_mem_descs) {
		if (dev->host_mem_size >= min)
			enable_bits |= NVME_HOST_MEM_RETURN;
		else
			nvme_free_host_mem(dev);
	}

	if (!dev->host_mem_descs) {
		if (nvme_alloc_host_mem(dev, min, preferred)) {
			dev_warn(dev->ctrl.device,
				"failed to allocate host memory buffer.\n");
			return 0; /* controller must work without HMB */
		}

		dev_info(dev->ctrl.device,
			"allocated %lld MiB host memory buffer.\n",
			dev->host_mem_size >> ilog2(SZ_1M));
	}

	ret = nvme_set_host_mem(dev, enable_bits);
	if (ret)
		nvme_free_host_mem(dev);
	return ret;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Christoph Hellwig
182
87.92%
4
40.00%
Jon Derrick
17
8.21%
1
10.00%
Keith Busch
5
2.42%
3
30.00%
Matthew Wilcox
2
0.97%
1
10.00%
Matias Björling
1
0.48%
1
10.00%
Total
207
100.00%
10
100.00%



static int nvme_setup_io_queues(struct nvme_dev *dev)
{
	struct nvme_queue *adminq = &dev->queues[0];
	struct pci_dev *pdev = to_pci_dev(dev->dev);
	int result, nr_io_queues;
	unsigned long size;

	struct irq_affinity affd = {
		.pre_vectors = 1
	};

	nr_io_queues = num_possible_cpus();
	result = nvme_set_queue_count(&dev->ctrl, &nr_io_queues);
	if (result < 0)
		return result;

	if (nr_io_queues == 0)
		return 0;

	if (dev->cmb && (dev->cmbsz & NVME_CMBSZ_SQS)) {
		result = nvme_cmb_qdepth(dev, nr_io_queues,
				sizeof(struct nvme_command));
		if (result > 0)
			dev->q_depth = result;
		else
			nvme_release_cmb(dev);
	}

	do {
		size = db_bar_size(dev, nr_io_queues);
		result = nvme_remap_bar(dev, size);
		if (!result)
			break;
		if (!--nr_io_queues)
			return -ENOMEM;
	} while (1);
	adminq->q_db = dev->dbs;

	/* Deregister the admin queue's interrupt */
	pci_free_irq(pdev, 0, adminq);

	/*
         * If we enable msix early due to not intx, disable it again before
         * setting up the full range we need.
         */
	pci_free_irq_vectors(pdev);
	result = pci_alloc_irq_vectors_affinity(pdev, 1, nr_io_queues + 1,
			PCI_IRQ_ALL_TYPES | PCI_IRQ_AFFINITY, &affd);
	if (result <= 0)
		return -EIO;
	dev->num_vecs = result;
	dev->max_qid = max(result - 1, 1);

	/*
         * Should investigate if there's a performance win from allocating
         * more queues than interrupt vectors; it might allow the submission
         * path to scale better, even if the receive path is limited by the
         * number of interrupts.
         */

	result = queue_request_irq(adminq);
	if (result) {
		adminq->cq_vector = -1;
		return result;
	}
	return nvme_create_io_queues(dev);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Christoph Hellwig
142
49.65%
8
29.63%
Keith Busch
85
29.72%
8
29.63%
Matthew Wilcox
29
10.14%
5
18.52%
Jens Axboe
14
4.90%
2
7.41%
Xu Yu
10
3.50%
1
3.70%
Jon Derrick
4
1.40%
1
3.70%
Sagi Grimberg
1
0.35%
1
3.70%
Ming Lei
1
0.35%
1
3.70%
Total
286
100.00%
27
100.00%



static void nvme_del_queue_end(struct request *req, blk_status_t error)
{
	struct nvme_queue *nvmeq = req->end_io_data;

	blk_mq_free_request(req);
	complete(&nvmeq->dev->ioq_wait);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
35
92.11%
3
60.00%
Matias Björling
2
5.26%
1
20.00%
Christoph Hellwig
1
2.63%
1
20.00%
Total
38
100.00%
5
100.00%



static void nvme_del_cq_end(struct request *req, blk_status_t error)
{
	struct nvme_queue *nvmeq = req->end_io_data;
	u16 start, end;

	if (!error) {
		unsigned long flags;

		spin_lock_irqsave(&nvmeq->cq_lock, flags);
		nvme_process_cq(nvmeq, &start, &end, -1);
		spin_unlock_irqrestore(&nvmeq->cq_lock, flags);

		nvme_complete_cqes(nvmeq, start, end);
	}

	nvme_del_queue_end(req, error);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
59
66.29%
6
50.00%
Jens Axboe
25
28.09%
2
16.67%
Matias Björling
2
2.25%
1
8.33%
Christoph Hellwig
2
2.25%
2
16.67%
Matthew Wilcox
1
1.12%
1
8.33%
Total
89
100.00%
12
100.00%



static int nvme_delete_queue(struct nvme_queue *nvmeq, u8 opcode)
{
	struct request_queue *q = nvmeq->dev->ctrl.admin_q;
	struct request *req;
	struct nvme_command cmd;

	memset(&cmd, 0, sizeof(cmd));
	cmd.delete_queue.opcode = opcode;
	cmd.delete_queue.qid = cpu_to_le16(nvmeq->qid);

	req = nvme_alloc_request(q, &cmd, BLK_MQ_REQ_NOWAIT, NVME_QID_ANY);
	if (IS_ERR(req))
		return PTR_ERR(req);

	req->timeout = ADMIN_TIMEOUT;
	req->end_io_data = nvmeq;

	blk_execute_rq_nowait(q, NULL, req, false,
			opcode == nvme_admin_delete_cq ?
				nvme_del_cq_end : nvme_del_queue_end);
	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
122
93.13%
3
42.86%
Matthew Wilcox
6
4.58%
2
28.57%
Christoph Hellwig
3
2.29%
2
28.57%
Total
131
100.00%
7
100.00%



static void nvme_disable_io_queues(struct nvme_dev *dev)
{
	int pass, queues = dev->online_queues - 1;
	unsigned long timeout;
	u8 opcode = nvme_admin_delete_sq;

	for (pass = 0; pass < 2; pass++) {
		int sent = 0, i = queues;

		reinit_completion(&dev->ioq_wait);
 retry:
		timeout = ADMIN_TIMEOUT;
		for (; i > 0; i--, sent++)
			if (nvme_delete_queue(&dev->queues[i], opcode))
				break;

		while (sent--) {
			timeout = wait_for_completion_io_timeout(&dev->ioq_wait, timeout);
			if (timeout == 0)
				return;
			if (i)
				goto retry;
		}
		opcode = nvme_admin_delete_cq;
	}
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
111
82.22%
6
54.55%
Jens Axboe
13
9.63%
1
9.09%
Gabriel Krisman Bertazi
7
5.19%
1
9.09%
Matthew Wilcox
3
2.22%
2
18.18%
Sagi Grimberg
1
0.74%
1
9.09%
Total
135
100.00%
11
100.00%

/*
 * return error value only when tagset allocation failed
 */


static int nvme_dev_add(struct nvme_dev *dev)
{
	int ret;

	if (!dev->ctrl.tagset) {
		dev->tagset.ops = &nvme_mq_ops;
		dev->tagset.nr_hw_queues = dev->online_queues - 1;
		dev->tagset.timeout = NVME_IO_TIMEOUT;
		dev->tagset.numa_node = dev_to_node(dev->dev);
		dev->tagset.queue_depth =
				min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
		dev->tagset.cmd_size = nvme_pci_cmd_size(dev, false);
		if ((dev->ctrl.sgls & ((1 << 0) | (1 << 1))) && sgl_threshold) {
			dev->tagset.cmd_size = max(dev->tagset.cmd_size,
					nvme_pci_cmd_size(dev, true));
		}
		dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
		dev->tagset.driver_data = dev;

		ret = blk_mq_alloc_tag_set(&dev->tagset);
		if (ret) {
			dev_warn(dev->ctrl.device,
				"IO queues tagset allocation failed %d\n", ret);
			return ret;
		}
		dev->ctrl.tagset = &dev->tagset;

		nvme_dbbuf_set(dev);
	} else {
		blk_mq_update_nr_hw_queues(&dev->tagset, dev->online_queues - 1);

		/* Free previously allocated queues that are no longer usable */
		nvme_free_queues(dev, dev->online_queues);
	}

	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
136
55.97%
7
46.67%
Chaitanya Kulkarni
53
21.81%
1
6.67%
Jianchao Wang
25
10.29%
1
6.67%
Matthew Wilcox
21
8.64%
3
20.00%
Helen Mae Koike Fornazier
5
2.06%
1
6.67%
Jon Derrick
2
0.82%
1
6.67%
Matias Björling
1
0.41%
1
6.67%
Total
243
100.00%
15
100.00%



static int nvme_pci_enable(struct nvme_dev *dev)
{
	int result = -ENOMEM;
	struct pci_dev *pdev = to_pci_dev(dev->dev);

	if (pci_enable_device_mem(pdev))
		return result;

	pci_set_master(pdev);

	if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) &&
	    dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32)))
		goto disable;

	if (readl(dev->bar + NVME_REG_CSTS) == -1) {
		result = -ENODEV;
		goto disable;
	}

	/*
         * Some devices and/or platforms don't advertise or work with INTx
         * interrupts. Pre-enable a single MSIX or MSI vec for setup. We'll
         * adjust this later.
         */
	result = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
	if (result < 0)
		return result;

	dev->ctrl.cap = lo_hi_readq(dev->bar + NVME_REG_CAP);

	dev->q_depth = min_t(int, NVME_CAP_MQES(dev->ctrl.cap) + 1,
				io_queue_depth);
	dev->db_stride = 1 << NVME_CAP_STRIDE(dev->ctrl.cap);
	dev->dbs = dev->bar + 4096;

	/*
         * Temporary fix for the Apple controller found in the MacBook8,1 and
         * some MacBook7,1 to avoid controller resets and data loss.
         */
	if (pdev->vendor == PCI_VENDOR_ID_APPLE && pdev->device == 0x2001) {
		dev->q_depth = 2;
		dev_warn(dev->ctrl.device, "detected Apple NVMe controller, "
			"set queue depth=%u to work around controller resets\n",
			dev->q_depth);
	} else if (pdev->vendor == PCI_VENDOR_ID_SAMSUNG &&
		   (pdev->device == 0xa821 || pdev->device == 0xa822) &&
		   NVME_CAP_MQES(dev->ctrl.cap) == 0) {
		dev->q_depth = 64;
		dev_err(dev->ctrl.device, "detected PM1725 NVMe controller, "
                        "set queue depth=%u\n", dev->q_depth);
	}

	nvme_map_cmb(dev);

	pci_enable_pcie_error_reporting(pdev);
	pci_save_state(pdev);
	return 0;

 disable:
	pci_disable_device(pdev);
	return result;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
162
52.77%
10
43.48%
Martin K. Petersen
54
17.59%
1
4.35%
Christoph Hellwig
24
7.82%
4
17.39%
Linus Torvalds
23
7.49%
1
4.35%
Sagi Grimberg
16
5.21%
1
4.35%
Matthew Wilcox
11
3.58%
2
8.70%
Dan McLeran
9
2.93%
1
4.35%
Matias Björling
6
1.95%
1
4.35%
weiping zhang
1
0.33%
1
4.35%
Stephan Günther
1
0.33%
1
4.35%
Total
307
100.00%
23
100.00%



static void nvme_dev_unmap(struct nvme_dev *dev)
{
	if (dev->bar)
		iounmap(dev->bar);
	pci_release_mem_regions(to_pci_dev(dev->dev));
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
30
88.24%
6
66.67%
Johannes Thumshirn
2
5.88%
2
22.22%
Matthew Wilcox
2
5.88%
1
11.11%
Total
34
100.00%
9
100.00%



static void nvme_pci_disable(struct nvme_dev *dev)
{
	struct pci_dev *pdev = to_pci_dev(dev->dev);

	nvme_release_cmb(dev);
	pci_free_irq_vectors(pdev);

	if (pci_is_enabled(pdev)) {
		pci_disable_pcie_error_reporting(pdev);
		pci_disable_device(pdev);
	}
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
30
57.69%
6
46.15%
Matthew Wilcox
12
23.08%
3
23.08%
Jon Derrick
5
9.62%
1
7.69%
Christoph Hellwig
4
7.69%
2
15.38%
Quoc-Son Anh
1
1.92%
1
7.69%
Total
52
100.00%
13
100.00%



static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown)
{
	int i;
	bool dead = true;
	struct pci_dev *pdev = to_pci_dev(dev->dev);

	mutex_lock(&dev->shutdown_lock);
	if (pci_is_enabled(pdev)) {
		u32 csts = readl(dev->bar + NVME_REG_CSTS);

		if (dev->ctrl.state == NVME_CTRL_LIVE ||
		    dev->ctrl.state == NVME_CTRL_RESETTING)
			nvme_start_freeze(&dev->ctrl);
		dead = !!((csts & NVME_CSTS_CFS) || !(csts & NVME_CSTS_RDY) ||
			pdev->error_state  != pci_channel_io_normal);
	}

	/*
         * Give the controller a chance to complete all entered requests if
         * doing a safe shutdown.
         */
	if (!dead) {
		if (shutdown)
			nvme_wait_freeze_timeout(&dev->ctrl, NVME_IO_TIMEOUT);
	}

	nvme_stop_queues(&dev->ctrl);

	if (!dead && dev->ctrl.queue_count > 0) {
		nvme_disable_io_queues(dev);
		nvme_disable_admin_queue(dev, shutdown);
	}
	for (i = dev->ctrl.queue_count - 1; i >= 0; i--)
		nvme_suspend_queue(&dev->queues[i]);

	nvme_pci_disable(dev);

	blk_mq_tagset_busy_iter(&dev->tagset, nvme_cancel_request, &dev->ctrl);
	blk_mq_tagset_busy_iter(&dev->admin_tagset, nvme_cancel_request, &dev->ctrl);

	/*
         * The driver will not be starting up queues again if shutting down so
         * must flush all entered requests to their failed completion to avoid
         * deadlocking blk-mq hot-cpu notifier.
         */
	if (shutdown)
		nvme_start_queues(&dev->ctrl);
	mutex_unlock(&dev->shutdown_lock);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
200
77.82%
18
60.00%
Sagi Grimberg
20
7.78%
4
13.33%
Matthew Wilcox
12
4.67%
3
10.00%
Lin Ming
8
3.11%
1
3.33%
Christoph Hellwig
5
1.95%
1
3.33%
Gabriel Krisman Bertazi
4
1.56%
1
3.33%
Matias Björling
4
1.56%
1
3.33%
Indraneel Mukherjee
4
1.56%
1
3.33%
Total
257
100.00%
30
100.00%



static int nvme_setup_prp_pools(struct nvme_dev *dev)
{
	dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,
						PAGE_SIZE, PAGE_SIZE, 0);
	if (!dev->prp_page_pool)
		return -ENOMEM;

	/* Optimisation for I/Os between 4k and 128k */
	dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev,
						256, 256, 0);
	if (!dev->prp_small_pool) {
		dma_pool_destroy(dev->prp_page_pool);
		return -ENOMEM;
	}
	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
69
82.14%
4
44.44%
Matthew Wilcox
9
10.71%
4
44.44%
Christoph Hellwig
6
7.14%
1
11.11%
Total
84
100.00%
9
100.00%



static void nvme_release_prp_pools(struct nvme_dev *dev)
{
	dma_pool_destroy(dev->prp_page_pool);
	dma_pool_destroy(dev->prp_small_pool);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
19
76.00%
2
50.00%
Matthew Wilcox
6
24.00%
2
50.00%
Total
25
100.00%
4
100.00%



static void nvme_pci_free_ctrl(struct nvme_ctrl *ctrl)
{
	struct nvme_dev *dev = to_nvme_dev(ctrl);

	nvme_dbbuf_dma_free(dev);
	put_device(dev->dev);
	if (dev->tagset.tags)
		blk_mq_free_tag_set(&dev->tagset);
	if (dev->ctrl.admin_q)
		blk_put_queue(dev->ctrl.admin_q);
	kfree(dev->queues);
	free_opal_dev(dev->ctrl.opal_dev);
	mempool_destroy(dev->iod_mempool);
	kfree(dev);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
36
38.30%
7
41.18%
Christoph Hellwig
20
21.28%
4
23.53%
Matias Björling
14
14.89%
1
5.88%
Matthew Wilcox
11
11.70%
2
11.76%
Jens Axboe
7
7.45%
1
5.88%
Helen Mae Koike Fornazier
5
5.32%
1
5.88%
Scott Bauer
1
1.06%
1
5.88%
Total
94
100.00%
17
100.00%



static void nvme_remove_dead_ctrl(struct nvme_dev *dev, int status)
{
	dev_warn(dev->ctrl.device, "Removing after probe failure status: %d\n", status);

	nvme_get_ctrl(&dev->ctrl);
	nvme_dev_disable(dev, false);
	nvme_kill_queues(&dev->ctrl);
	if (!queue_work(nvme_wq, &dev->remove_work))
		nvme_put_ctrl(&dev->ctrl);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
56
78.87%
2
33.33%
Jianchao Wang
8
11.27%
1
16.67%
Linus Torvalds
3
4.23%
1
16.67%
Ming Lei
3
4.23%
1
16.67%
Christoph Hellwig
1
1.41%
1
16.67%
Total
71
100.00%
6
100.00%



static void nvme_reset_work(struct work_struct *work)
{
	struct nvme_dev *dev =
		container_of(work, struct nvme_dev, ctrl.reset_work);
	bool was_suspend = !!(dev->ctrl.ctrl_config & NVME_CC_SHN_NORMAL);
	int result = -ENODEV;
	enum nvme_ctrl_state new_state = NVME_CTRL_LIVE;

	if (WARN_ON(dev->ctrl.state != NVME_CTRL_RESETTING))
		goto out;

	/*
         * If we're called to reset a live controller first shut it down before
         * moving on.
         */
	if (dev->ctrl.ctrl_config & NVME_CC_ENABLE)
		nvme_dev_disable(dev, false);

	/*
         * Introduce CONNECTING state from nvme-fc/rdma transports to mark the
         * initializing procedure here.
         */
	if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_CONNECTING)) {
		dev_warn(dev->ctrl.device,
			"failed to mark controller CONNECTING\n");
		goto out;
	}

	result = nvme_pci_enable(dev);
	if (result)
		goto out;

	result = nvme_pci_configure_admin_queue(dev);
	if (result)
		goto out;

	result = nvme_alloc_admin_tags(dev);
	if (result)
		goto out;

	/*
         * Limit the max command size to prevent iod->sg allocations going
         * over a single page.
         */
	dev->ctrl.max_hw_sectors = NVME_MAX_KB_SZ << 1;
	dev->ctrl.max_segments = NVME_MAX_SEGS;

	result = nvme_init_identify(&dev->ctrl);
	if (result)
		goto out;

	if (dev->ctrl.oacs & NVME_CTRL_OACS_SEC_SUPP) {
		if (!dev->ctrl.opal_dev)
			dev->ctrl.opal_dev =
				init_opal_dev(&dev->ctrl, &nvme_sec_submit);
		else if (was_suspend)
			opal_unlock_from_suspend(dev->ctrl.opal_dev);
	} else {
		free_opal_dev(dev->ctrl.opal_dev);
		dev->ctrl.opal_dev = NULL;
	}

	if (dev->ctrl.oacs & NVME_CTRL_OACS_DBBUF_SUPP) {
		result = nvme_dbbuf_dma_alloc(dev);
		if (result)
			dev_warn(dev->dev,
				 "unable to allocate dma for dbbuf\n");
	}

	if (dev->ctrl.hmpre) {
		result = nvme_setup_host_mem(dev);
		if (result < 0)
			goto out;
	}

	result = nvme_setup_io_queues(dev);
	if (result)
		goto out;

	/*
         * Keep the controller around but remove all namespaces if we don't have
         * any working I/O queue.
         */
	if (dev->online_queues < 2) {
		dev_warn(dev->ctrl.device, "IO queues not created\n");
		nvme_kill_queues(&dev->ctrl);
		nvme_remove_namespaces(&dev->ctrl);
		new_state = NVME_CTRL_ADMIN_ONLY;
	} else {
		nvme_start_queues(&dev->ctrl);
		nvme_wait_freeze(&dev->ctrl);
		/* hit this only when allocate tagset fails */
		if (nvme_dev_add(dev))
			new_state = NVME_CTRL_ADMIN_ONLY;
		nvme_unfreeze(&dev->ctrl);
	}

	/*
         * If only admin queue live, keep it to do further investigation or
         * recovery.
         */
	if (!nvme_change_ctrl_state(&dev->ctrl, new_state)) {
		dev_warn(dev->ctrl.device,
			"failed to mark controller state %d\n", new_state);
		goto out;
	}

	nvme_start_ctrl(&dev->ctrl);
	return;

 out:
	nvme_remove_dead_ctrl(dev, result);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Christoph Hellwig
177
37.50%
14
36.84%
Keith Busch
80
16.95%
8
21.05%
Scott Bauer
72
15.25%
3
7.89%
Jianchao Wang
49
10.38%
2
5.26%
Helen Mae Koike Fornazier
32
6.78%
1
2.63%
Dan McLeran
20
4.24%
1
2.63%
Jens Axboe
19
4.03%
1
2.63%
Sagi Grimberg
8
1.69%
4
10.53%
Matthew Wilcox
7
1.48%
1
2.63%
Quoc-Son Anh
4
0.85%
1
2.63%
Max Gurtovoy
3
0.64%
1
2.63%
Rakesh Pandit
1
0.21%
1
2.63%
Total
472
100.00%
38
100.00%



static void nvme_remove_dead_ctrl_work(struct work_struct *work)
{
	struct nvme_dev *dev = container_of(work, struct nvme_dev, remove_work);
	struct pci_dev *pdev = to_pci_dev(dev->dev);

	if (pci_get_drvdata(pdev))
		device_release_driver(&pdev->dev);
	nvme_put_ctrl(&dev->ctrl);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
43
70.49%
3
50.00%
Christoph Hellwig
18
29.51%
3
50.00%
Total
61
100.00%
6
100.00%



static int nvme_pci_reg_read32(struct nvme_ctrl *ctrl, u32 off, u32 *val)
{
	*val = readl(to_nvme_dev(ctrl)->bar + off);
	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Christoph Hellwig
22
61.11%
1
50.00%
Keith Busch
14
38.89%
1
50.00%
Total
36
100.00%
2
100.00%



static int nvme_pci_reg_write32(struct nvme_ctrl *ctrl, u32 off, u32 val)
{
	writel(val, to_nvme_dev(ctrl)->bar + off);
	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Christoph Hellwig
26
76.47%
1
33.33%
Keith Busch
8
23.53%
2
66.67%
Total
34
100.00%
3
100.00%



static int nvme_pci_reg_read64(struct nvme_ctrl *ctrl, u32 off, u64 *val)
{
	*val = readq(to_nvme_dev(ctrl)->bar + off);
	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Christoph Hellwig
29
80.56%
1
50.00%
Keith Busch
7
19.44%
1
50.00%
Total
36
100.00%
2
100.00%



static int nvme_pci_get_address(struct nvme_ctrl *ctrl, char *buf, int size)
{
	struct pci_dev *pdev = to_pci_dev(to_nvme_dev(ctrl)->dev);

	return snprintf(buf, size, "%s", dev_name(&pdev->dev));
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
51
100.00%
1
100.00%
Total
51
100.00%
1
100.00%


static const struct nvme_ctrl_ops nvme_pci_ctrl_ops = {
	.name			= "pcie",
	.module			= THIS_MODULE,
	.flags			= NVME_F_METADATA_SUPPORTED,
	.reg_read32		= nvme_pci_reg_read32,
	.reg_write32		= nvme_pci_reg_write32,
	.reg_read64		= nvme_pci_reg_read64,
	.free_ctrl		= nvme_pci_free_ctrl,
	.submit_async_event	= nvme_pci_submit_async_event,
	.get_address		= nvme_pci_get_address,
};



static int nvme_dev_map(struct nvme_dev *dev)
{
	struct pci_dev *pdev = to_pci_dev(dev->dev);

	if (pci_request_mem_regions(pdev, "nvme"))
		return -ENODEV;

	if (nvme_remap_bar(dev, NVME_REG_DBS + 4096))
		goto release;

	return 0;
  release:
	pci_release_mem_regions(pdev);
	return -ENODEV;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
55
85.94%
1
33.33%
Xu Yu
7
10.94%
1
33.33%
Johannes Thumshirn
2
3.12%
1
33.33%
Total
64
100.00%
3
100.00%



static unsigned long check_vendor_combination_bug(struct pci_dev *pdev)
{
	if (pdev->vendor == 0x144d && pdev->device == 0xa802) {
		/*
                 * Several Samsung devices seem to drop off the PCIe bus
                 * randomly when APST is on and uses the deepest sleep state.
                 * This has been observed on a Samsung "SM951 NVMe SAMSUNG
                 * 256GB", a "PM951 NVMe SAMSUNG 512GB", and a "Samsung SSD
                 * 950 PRO 256GB", but it seems to be restricted to two Dell
                 * laptops.
                 */
		if (dmi_match(DMI_SYS_VENDOR, "Dell Inc.") &&
		    (dmi_match(DMI_PRODUCT_NAME, "XPS 15 9550") ||
		     dmi_match(DMI_PRODUCT_NAME, "Precision 5510")))
			return NVME_QUIRK_NO_DEEPEST_PS;
	} else if (pdev->vendor == 0x144d && pdev->device == 0xa804) {
		/*
                 * Samsung SSD 960 EVO drops off the PCIe bus after system
                 * suspend on a Ryzen board, ASUS PRIME B350M-A, as well as
                 * within few minutes after bootup on a Coffee Lake board -
                 * ASUS PRIME Z370-A
                 */
		if (dmi_match(DMI_BOARD_VENDOR, "ASUSTeK COMPUTER INC.") &&
		    (dmi_match(DMI_BOARD_NAME, "PRIME B350M-A") ||
		     dmi_match(DMI_BOARD_NAME, "PRIME Z370-A")))
			return NVME_QUIRK_NO_APST;
	}

	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Andrew Lutomirski
59
55.66%
1
33.33%
Kai-Heng Feng
37
34.91%
1
33.33%
Jarosław Janik
10
9.43%
1
33.33%
Total
106
100.00%
3
100.00%



static void nvme_async_probe(void *data, async_cookie_t cookie)
{
	struct nvme_dev *dev = data;

	nvme_reset_ctrl_sync(&dev->ctrl);
	flush_work(&dev->ctrl.scan_work);
	nvme_put_ctrl(&dev->ctrl);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
46
100.00%
2
100.00%
Total
46
100.00%
2
100.00%



static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
{
	int node, result = -ENOMEM;
	struct nvme_dev *dev;
	unsigned long quirks = id->driver_data;
	size_t alloc_size;

	node = dev_to_node(&pdev->dev);
	if (node == NUMA_NO_NODE)
		set_dev_node(&pdev->dev, first_memory_node);

	dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
	if (!dev)
		return -ENOMEM;

	dev->queues = kcalloc_node(num_possible_cpus() + 1,
			sizeof(struct nvme_queue), GFP_KERNEL, node);
	if (!dev->queues)
		goto free;

	dev->dev = get_device(&pdev->dev);
	pci_set_drvdata(pdev, dev);

	result = nvme_dev_map(dev);
	if (result)
		goto put_pci;

	INIT_WORK(&dev->ctrl.reset_work, nvme_reset_work);
	INIT_WORK(&dev->remove_work, nvme_remove_dead_ctrl_work);
	mutex_init(&dev->shutdown_lock);
	init_completion(&dev->ioq_wait);

	result = nvme_setup_prp_pools(dev);
	if (result)
		goto unmap;

	quirks |= check_vendor_combination_bug(pdev);

	/*
         * Double check that our mempool alloc size will cover the biggest
         * command we support.
         */
	alloc_size = nvme_pci_iod_alloc_size(dev, NVME_MAX_KB_SZ,
						NVME_MAX_SEGS, true);
	WARN_ON_ONCE(alloc_size > PAGE_SIZE);

	dev->iod_mempool = mempool_create_node(1, mempool_kmalloc,
						mempool_kfree,
						(void *) alloc_size,
						GFP_KERNEL, node);
	if (!dev->iod_mempool) {
		result = -ENOMEM;
		goto release_pools;
	}

	result = nvme_init_ctrl(&dev->ctrl, &pdev->dev, &nvme_pci_ctrl_ops,
			quirks);
	if (result)
		goto release_mempool;

	dev_info(dev->ctrl.device, "pci function %s\n", dev_name(&pdev->dev));

	nvme_get_ctrl(&dev->ctrl);
	async_schedule(nvme_async_probe, dev);

	return 0;

 release_mempool:
	mempool_destroy(dev->iod_mempool);
 release_pools:
	nvme_release_prp_pools(dev);
 unmap:
	nvme_dev_unmap(dev);
 put_pci:
	put_device(dev->dev);
 free:
	kfree(dev->queues);
	kfree(dev);
	return result;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Matthew Wilcox
109
28.02%
4
14.81%
Keith Busch
102
26.22%
11
40.74%
Jens Axboe
64
16.45%
1
3.70%
Christoph Hellwig
33
8.48%
4
14.81%
Matias Björling
33
8.48%
1
3.70%
Sagi Grimberg
23
5.91%
2
7.41%
Andrew Lutomirski
14
3.60%
1
3.70%
Christophe Jaillet
9
2.31%
1
3.70%
Masayoshi Mizuma
1
0.26%
1
3.70%
Kai-Heng Feng
1
0.26%
1
3.70%
Total
389
100.00%
27
100.00%



static void nvme_reset_prepare(struct pci_dev *pdev)
{
	struct nvme_dev *dev = pci_get_drvdata(pdev);
	nvme_dev_disable(dev, false);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
26
92.86%
2
66.67%
Christoph Hellwig
2
7.14%
1
33.33%
Total
28
100.00%
3
100.00%



static void nvme_reset_done(struct pci_dev *pdev)
{
	struct nvme_dev *dev = pci_get_drvdata(pdev);
	nvme_reset_ctrl_sync(&dev->ctrl);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Christoph Hellwig
17
58.62%
2
40.00%
Linus Torvalds
6
20.69%
1
20.00%
Keith Busch
5
17.24%
1
20.00%
Sagi Grimberg
1
3.45%
1
20.00%
Total
29
100.00%
5
100.00%



static void nvme_shutdown(struct pci_dev *pdev)
{
	struct nvme_dev *dev = pci_get_drvdata(pdev);
	nvme_dev_disable(dev, true);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
28
100.00%
2
100.00%
Total
28
100.00%
2
100.00%

/*
 * The driver's remove may be called on a device in a partially initialized
 * state. This function must not have any dependencies on the device state in
 * order to proceed.
 */


static void nvme_remove(struct pci_dev *pdev)
{
	struct nvme_dev *dev = pci_get_drvdata(pdev);

	nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DELETING);

	cancel_work_sync(&dev->ctrl.reset_work);
	pci_set_drvdata(pdev, NULL);

	if (!pci_device_is_present(pdev)) {
		nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DEAD);
		nvme_dev_disable(dev, true);
	}

	flush_work(&dev->ctrl.reset_work);
	nvme_stop_ctrl(&dev->ctrl);
	nvme_remove_namespaces(&dev->ctrl);
	nvme_dev_disable(dev, true);
	nvme_free_host_mem(dev);
	nvme_dev_remove_admin(dev);
	nvme_free_queues(dev, 0);
	nvme_uninit_ctrl(&dev->ctrl);
	nvme_release_prp_pools(dev);
	nvme_dev_unmap(dev);
	nvme_put_ctrl(&dev->ctrl);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
81
53.64%
13
65.00%
Matthew Wilcox
30
19.87%
1
5.00%
Sagi Grimberg
17
11.26%
1
5.00%
Christoph Hellwig
15
9.93%
4
20.00%
Rakesh Pandit
8
5.30%
1
5.00%
Total
151
100.00%
20
100.00%

#ifdef CONFIG_PM_SLEEP


static int nvme_suspend(struct device *dev)
{
	struct pci_dev *pdev = to_pci_dev(dev);
	struct nvme_dev *ndev = pci_get_drvdata(pdev);

	nvme_dev_disable(ndev, true);
	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
40
97.56%
2
66.67%
Matthew Wilcox
1
2.44%
1
33.33%
Total
41
100.00%
3
100.00%



static int nvme_resume(struct device *dev)
{
	struct pci_dev *pdev = to_pci_dev(dev);
	struct nvme_dev *ndev = pci_get_drvdata(pdev);

	nvme_reset_ctrl(&ndev->ctrl);
	return 0;
}
Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
37
88.10%
2
50.00%
Christoph Hellwig
4
9.52%
1
25.00%
Matthew Wilcox
1
2.38%
1
25.00%
Total
42
100.00%
4
100.00%

#endif

static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);



static pci_ers_result_t nvme_error_detected(struct pci_dev *pdev,
						pci_channel_state_t state)
{
	struct nvme_dev *dev = pci_get_drvdata(pdev);

	/*
         * A frozen channel requires a reset. When detected, this method will
         * shutdown the controller to quiesce. The controller will be restarted
         * after the slot reset through driver's slot_reset callback.
         */
	switch (state) {
	case pci_channel_io_normal:
		return PCI_ERS_RESULT_CAN_RECOVER;
	case pci_channel_io_frozen:
		dev_warn(dev->ctrl.device,
			"frozen state error detected, reset controller\n");
		nvme_dev_disable(dev, false);
		return PCI_ERS_RESULT_NEED_RESET;
	case pci_channel_io_perm_failure:
		dev_warn(dev->ctrl.device,
			"failure state error detected, request disconnect\n");
		return PCI_ERS_RESULT_DISCONNECT;
	}
	return PCI_ERS_RESULT_NEED_RESET;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
81
100.00%
4
100.00%
Total
81
100.00%
4
100.00%



static pci_ers_result_t nvme_slot_reset(struct pci_dev *pdev)
{
	struct nvme_dev *dev = pci_get_drvdata(pdev);

	dev_info(dev->ctrl.device, "restart after slot reset\n");
	pci_restore_state(pdev);
	nvme_reset_ctrl(&dev->ctrl);
	return PCI_ERS_RESULT_RECOVERED;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
40
83.33%
2
50.00%
Sagi Grimberg
4
8.33%
1
25.00%
Christoph Hellwig
4
8.33%
1
25.00%
Total
48
100.00%
4
100.00%



static void nvme_error_resume(struct pci_dev *pdev)
{
	struct nvme_dev *dev = pci_get_drvdata(pdev);

	flush_work(&dev->ctrl.reset_work);
	pci_cleanup_aer_uncorrect_error_status(pdev);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
36
100.00%
3
100.00%
Total
36
100.00%
3
100.00%


static const struct pci_error_handlers nvme_err_handler = {
	.error_detected	= nvme_error_detected,
	.slot_reset	= nvme_slot_reset,
	.resume		= nvme_error_resume,
	.reset_prepare	= nvme_reset_prepare,
	.reset_done	= nvme_reset_done,
};


static const struct pci_device_id nvme_id_table[] = {
	{ PCI_VDEVICE(INTEL, 0x0953),
		.driver_data = NVME_QUIRK_STRIPE_SIZE |
				NVME_QUIRK_DEALLOCATE_ZEROES, },
	{ PCI_VDEVICE(INTEL, 0x0a53),
		.driver_data = NVME_QUIRK_STRIPE_SIZE |
				NVME_QUIRK_DEALLOCATE_ZEROES, },
	{ PCI_VDEVICE(INTEL, 0x0a54),
		.driver_data = NVME_QUIRK_STRIPE_SIZE |
				NVME_QUIRK_DEALLOCATE_ZEROES, },
	{ PCI_VDEVICE(INTEL, 0x0a55),
		.driver_data = NVME_QUIRK_STRIPE_SIZE |
				NVME_QUIRK_DEALLOCATE_ZEROES, },
	{ PCI_VDEVICE(INTEL, 0xf1a5),	/* Intel 600P/P3100 */
		.driver_data = NVME_QUIRK_NO_DEEPEST_PS |
				NVME_QUIRK_MEDIUM_PRIO_SQ },
	{ PCI_VDEVICE(INTEL, 0x5845),	/* Qemu emulated controller */
		.driver_data = NVME_QUIRK_IDENTIFY_CNS, },
	{ PCI_DEVICE(0x1bb1, 0x0100),   /* Seagate Nytro Flash Storage */
		.driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
	{ PCI_DEVICE(0x1c58, 0x0003),	/* HGST adapter */
		.driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
	{ PCI_DEVICE(0x1c58, 0x0023),	/* WDC SN200 adapter */
		.driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
	{ PCI_DEVICE(0x1c5f, 0x0540),	/* Memblaze Pblaze4 adapter */
		.driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
	{ PCI_DEVICE(0x144d, 0xa821),   /* Samsung PM1725 */
		.driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
	{ PCI_DEVICE(0x144d, 0xa822),   /* Samsung PM1725a */
		.driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
	{ PCI_DEVICE(0x1d1d, 0x1f1f),	/* LighNVM qemu device */
		.driver_data = NVME_QUIRK_LIGHTNVM, },
	{ PCI_DEVICE(0x1d1d, 0x2807),	/* CNEX WL */
		.driver_data = NVME_QUIRK_LIGHTNVM, },
	{ PCI_DEVICE(0x1d1d, 0x2601),	/* CNEX Granby */
		.driver_data = NVME_QUIRK_LIGHTNVM, },
	{ PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
	{ PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2001) },
	{ PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2003) },
	{ 0, }
};
MODULE_DEVICE_TABLE(pci, nvme_id_table);


static struct pci_driver nvme_driver = {
	.name		= "nvme",
	.id_table	= nvme_id_table,
	.probe		= nvme_probe,
	.remove		= nvme_remove,
	.shutdown	= nvme_shutdown,
	.driver		= {
		.pm	= &nvme_dev_pm_ops,
        },
	.sriov_configure = pci_sriov_configure_simple,
	.err_handler	= &nvme_err_handler,
};



static int __init nvme_init(void)
{
	return pci_register_driver(&nvme_driver);
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Matthew Wilcox
15
93.75%
1
50.00%
Dan McLeran
1
6.25%
1
50.00%
Total
16
100.00%
2
100.00%



static void __exit nvme_exit(void)
{
	pci_unregister_driver(&nvme_driver);
	flush_workqueue(nvme_wq);
	_nvme_check_size();
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
Matthew Wilcox
18
78.26%
2
66.67%
Ming Lei
5
21.74%
1
33.33%
Total
23
100.00%
3
100.00%

MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
MODULE_LICENSE("GPL");
MODULE_VERSION("1.0");
module_init(nvme_init);
module_exit(nvme_exit);
Overall Contributors
Person
Tokens
Prop
Commits
CommitProp
Keith Busch
4086
29.43%
128
33.42%
Christoph Hellwig
3203
23.07%
77
20.10%
Matthew Wilcox
1730
12.46%
55
14.36%
Chaitanya Kulkarni
769
5.54%
1
0.26%
Matias Björling
721
5.19%
2
0.52%
Helen Mae Koike Fornazier
718
5.17%
1
0.26%
Jens Axboe
611
4.40%
13
3.39%
Jon Derrick
306
2.20%
7
1.83%
Sagi Grimberg
294
2.12%
16
4.18%
Xu Yu
187
1.35%
1
0.26%
Minwoo Im
124
0.89%
5
1.31%
Jianchao Wang
123
0.89%
5
1.31%
weiping zhang
119
0.86%
1
0.26%
Shane Michael Matthews
105
0.76%
1
0.26%
Andrew Lutomirski
91
0.66%
2
0.52%
Martin K. Petersen
85
0.61%
2
0.52%
Stephen Bates
77
0.55%
2
0.52%
Scott Bauer
76
0.55%
3
0.78%
Marta Rybczynska
43
0.31%
1
0.26%
Kai-Heng Feng
38
0.27%
1
0.26%
Linus Torvalds
35
0.25%
5
1.31%
Dan McLeran
32
0.23%
2
0.52%
Guilherme G. Piccoli
30
0.22%
2
0.52%
Wendy Xiong
19
0.14%
1
0.26%
David Wayne Fugate
16
0.12%
1
0.26%
Wei Xu
15
0.11%
1
0.26%
Wenbo Wang
15
0.11%
1
0.26%
Jeff Lien
15
0.11%
1
0.26%
Micah Parrish
15
0.11%
1
0.26%
Vishal Verma
14
0.10%
2
0.52%
Gabriel Krisman Bertazi
13
0.09%
2
0.52%
Stephan Günther
12
0.09%
2
0.52%
Ming Lei
10
0.07%
3
0.78%
Jarosław Janik
10
0.07%
1
0.26%
Ming Lin
9
0.06%
3
0.78%
Rakesh Pandit
9
0.06%
1
0.26%
Christophe Jaillet
9
0.06%
1
0.26%
Daniel Roschka
9
0.06%
1
0.26%
Lin Ming
8
0.06%
1
0.26%
Jan H. Schönherr
8
0.06%
1
0.26%
Greg Kroah-Hartman
7
0.05%
1
0.26%
Ramachandra Rao Gajula
7
0.05%
1
0.26%
Murali Iyer
7
0.05%
1
0.26%
Johannes Thumshirn
6
0.04%
3
0.78%
Quoc-Son Anh
5
0.04%
1
0.26%
Dan J Williams
5
0.04%
2
0.52%
Jingoo Han
5
0.04%
1
0.26%
Max Gurtovoy
4
0.03%
1
0.26%
Haiyan Hu
4
0.03%
1
0.26%
Indraneel Mukherjee
4
0.03%
1
0.26%
Santosh Yaraganavi
3
0.02%
1
0.26%
Mauricio Faria de Oliveira
3
0.02%
1
0.26%
Sathyavathi M
3
0.02%
1
0.26%
Nisheeth Bhat
2
0.01%
1
0.26%
Eric Biggers
2
0.01%
1
0.26%
Akinobu Mita
2
0.01%
1
0.26%
Dan Carpenter
2
0.01%
1
0.26%
Sunad Bhandary
1
0.01%
1
0.26%
Joe Perches
1
0.01%
1
0.26%
kaoudis
1
0.01%
1
0.26%
Stephen Hemminger
1
0.01%
1
0.26%
Masayoshi Mizuma
1
0.01%
1
0.26%
Alexander Duyck
1
0.01%
1
0.26%
Total
13886
100.00%
383
100.00%
Directory: drivers/nvme/host

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