Author | Tokens | Token Proportion | Commits | Commit Proportion |
---|---|---|---|---|
H. Peter Anvin | 1117 | 96.13% | 5 | 38.46% |
Pavel Machek | 23 | 1.98% | 1 | 7.69% |
Michal Januszewski | 8 | 0.69% | 2 | 15.38% |
Jordan Borgner | 6 | 0.52% | 1 | 7.69% |
Vivek Goyal | 3 | 0.26% | 1 | 7.69% |
Roel Kluin | 2 | 0.17% | 1 | 7.69% |
Akinobu Mita | 2 | 0.17% | 1 | 7.69% |
Américo Wang | 1 | 0.09% | 1 | 7.69% |
Total | 1162 | 13 |
/* -*- linux-c -*- ------------------------------------------------------- * * * Copyright (C) 1991, 1992 Linus Torvalds * Copyright 2007 rPath, Inc. - All Rights Reserved * Copyright 2009 Intel Corporation; author H. Peter Anvin * * This file is part of the Linux kernel, and is made available under * the terms of the GNU General Public License version 2. * * ----------------------------------------------------------------------- */ /* * VESA text modes */ #include "boot.h" #include "video.h" #include "vesa.h" #include "string.h" /* VESA information */ static struct vesa_general_info vginfo; static struct vesa_mode_info vminfo; static __videocard video_vesa; #ifndef _WAKEUP static void vesa_store_mode_params_graphics(void); #else /* _WAKEUP */ static inline void vesa_store_mode_params_graphics(void) {} #endif /* _WAKEUP */ static int vesa_probe(void) { struct biosregs ireg, oreg; u16 mode; addr_t mode_ptr; struct mode_info *mi; int nmodes = 0; video_vesa.modes = GET_HEAP(struct mode_info, 0); initregs(&ireg); ireg.ax = 0x4f00; ireg.di = (size_t)&vginfo; intcall(0x10, &ireg, &oreg); if (oreg.ax != 0x004f || vginfo.signature != VESA_MAGIC || vginfo.version < 0x0102) return 0; /* Not present */ set_fs(vginfo.video_mode_ptr.seg); mode_ptr = vginfo.video_mode_ptr.off; while ((mode = rdfs16(mode_ptr)) != 0xffff) { mode_ptr += 2; if (!heap_free(sizeof(struct mode_info))) break; /* Heap full, can't save mode info */ if (mode & ~0x1ff) continue; memset(&vminfo, 0, sizeof(vminfo)); /* Just in case... */ ireg.ax = 0x4f01; ireg.cx = mode; ireg.di = (size_t)&vminfo; intcall(0x10, &ireg, &oreg); if (oreg.ax != 0x004f) continue; if ((vminfo.mode_attr & 0x15) == 0x05) { /* Text Mode, TTY BIOS supported, supported by hardware */ mi = GET_HEAP(struct mode_info, 1); mi->mode = mode + VIDEO_FIRST_VESA; mi->depth = 0; /* text */ mi->x = vminfo.h_res; mi->y = vminfo.v_res; nmodes++; } else if ((vminfo.mode_attr & 0x99) == 0x99 && (vminfo.memory_layout == 4 || vminfo.memory_layout == 6) && vminfo.memory_planes == 1) { #ifdef CONFIG_FB_BOOT_VESA_SUPPORT /* Graphics mode, color, linear frame buffer supported. Only register the mode if if framebuffer is configured, however, otherwise the user will be left without a screen. */ mi = GET_HEAP(struct mode_info, 1); mi->mode = mode + VIDEO_FIRST_VESA; mi->depth = vminfo.bpp; mi->x = vminfo.h_res; mi->y = vminfo.v_res; nmodes++; #endif } } return nmodes; } static int vesa_set_mode(struct mode_info *mode) { struct biosregs ireg, oreg; int is_graphic; u16 vesa_mode = mode->mode - VIDEO_FIRST_VESA; memset(&vminfo, 0, sizeof(vminfo)); /* Just in case... */ initregs(&ireg); ireg.ax = 0x4f01; ireg.cx = vesa_mode; ireg.di = (size_t)&vminfo; intcall(0x10, &ireg, &oreg); if (oreg.ax != 0x004f) return -1; if ((vminfo.mode_attr & 0x15) == 0x05) { /* It's a supported text mode */ is_graphic = 0; #ifdef CONFIG_FB_BOOT_VESA_SUPPORT } else if ((vminfo.mode_attr & 0x99) == 0x99) { /* It's a graphics mode with linear frame buffer */ is_graphic = 1; vesa_mode |= 0x4000; /* Request linear frame buffer */ #endif } else { return -1; /* Invalid mode */ } initregs(&ireg); ireg.ax = 0x4f02; ireg.bx = vesa_mode; intcall(0x10, &ireg, &oreg); if (oreg.ax != 0x004f) return -1; graphic_mode = is_graphic; if (!is_graphic) { /* Text mode */ force_x = mode->x; force_y = mode->y; do_restore = 1; } else { /* Graphics mode */ vesa_store_mode_params_graphics(); } return 0; } #ifndef _WAKEUP /* Switch DAC to 8-bit mode */ static void vesa_dac_set_8bits(void) { struct biosregs ireg, oreg; u8 dac_size = 6; /* If possible, switch the DAC to 8-bit mode */ if (vginfo.capabilities & 1) { initregs(&ireg); ireg.ax = 0x4f08; ireg.bh = 0x08; intcall(0x10, &ireg, &oreg); if (oreg.ax == 0x004f) dac_size = oreg.bh; } /* Set the color sizes to the DAC size, and offsets to 0 */ boot_params.screen_info.red_size = dac_size; boot_params.screen_info.green_size = dac_size; boot_params.screen_info.blue_size = dac_size; boot_params.screen_info.rsvd_size = dac_size; boot_params.screen_info.red_pos = 0; boot_params.screen_info.green_pos = 0; boot_params.screen_info.blue_pos = 0; boot_params.screen_info.rsvd_pos = 0; } /* Save the VESA protected mode info */ static void vesa_store_pm_info(void) { struct biosregs ireg, oreg; initregs(&ireg); ireg.ax = 0x4f0a; intcall(0x10, &ireg, &oreg); if (oreg.ax != 0x004f) return; boot_params.screen_info.vesapm_seg = oreg.es; boot_params.screen_info.vesapm_off = oreg.di; } /* * Save video mode parameters for graphics mode */ static void vesa_store_mode_params_graphics(void) { /* Tell the kernel we're in VESA graphics mode */ boot_params.screen_info.orig_video_isVGA = VIDEO_TYPE_VLFB; /* Mode parameters */ boot_params.screen_info.vesa_attributes = vminfo.mode_attr; boot_params.screen_info.lfb_linelength = vminfo.logical_scan; boot_params.screen_info.lfb_width = vminfo.h_res; boot_params.screen_info.lfb_height = vminfo.v_res; boot_params.screen_info.lfb_depth = vminfo.bpp; boot_params.screen_info.pages = vminfo.image_planes; boot_params.screen_info.lfb_base = vminfo.lfb_ptr; memcpy(&boot_params.screen_info.red_size, &vminfo.rmask, 8); /* General parameters */ boot_params.screen_info.lfb_size = vginfo.total_memory; if (vminfo.bpp <= 8) vesa_dac_set_8bits(); vesa_store_pm_info(); } /* * Save EDID information for the kernel; this is invoked, separately, * after mode-setting. */ void vesa_store_edid(void) { #ifdef CONFIG_FIRMWARE_EDID struct biosregs ireg, oreg; /* Apparently used as a nonsense token... */ memset(&boot_params.edid_info, 0x13, sizeof(boot_params.edid_info)); if (vginfo.version < 0x0200) return; /* EDID requires VBE 2.0+ */ initregs(&ireg); ireg.ax = 0x4f15; /* VBE DDC */ /* ireg.bx = 0x0000; */ /* Report DDC capabilities */ /* ireg.cx = 0; */ /* Controller 0 */ ireg.es = 0; /* ES:DI must be 0 by spec */ intcall(0x10, &ireg, &oreg); if (oreg.ax != 0x004f) return; /* No EDID */ /* BH = time in seconds to transfer EDD information */ /* BL = DDC level supported */ ireg.ax = 0x4f15; /* VBE DDC */ ireg.bx = 0x0001; /* Read EDID */ /* ireg.cx = 0; */ /* Controller 0 */ /* ireg.dx = 0; */ /* EDID block number */ ireg.es = ds(); ireg.di =(size_t)&boot_params.edid_info; /* (ES:)Pointer to block */ intcall(0x10, &ireg, &oreg); #endif /* CONFIG_FIRMWARE_EDID */ } #endif /* not _WAKEUP */ static __videocard video_vesa = { .card_name = "VESA", .probe = vesa_probe, .set_mode = vesa_set_mode, .xmode_first = VIDEO_FIRST_VESA, .xmode_n = 0x200, };
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