Release 4.7 drivers/clk/clk-mux.c
/*
* Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
* Copyright (C) 2011 Richard Zhao, Linaro <richard.zhao@linaro.org>
* Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Simple multiplexer clock implementation
*/
#include <linux/clk-provider.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/err.h>
/*
* DOC: basic adjustable multiplexer clock that cannot gate
*
* Traits of this clock:
* prepare - clk_prepare only ensures that parents are prepared
* enable - clk_enable only ensures that parents are enabled
* rate - rate is only affected by parent switching. No clk_set_rate support
* parent - parent is adjustable through clk_set_parent
*/
static u8 clk_mux_get_parent(struct clk_hw *hw)
{
struct clk_mux *mux = to_clk_mux(hw);
int num_parents = clk_hw_get_num_parents(hw);
u32 val;
/*
* FIXME need a mux-specific flag to determine if val is bitwise or numeric
* e.g. sys_clkin_ck's clksel field is 3 bits wide, but ranges from 0x1
* to 0x7 (index starts at one)
* OTOH, pmd_trace_clk_mux_ck uses a separate bit for each clock, so
* val = 0x4 really means "bit 2, index starts at bit 0"
*/
val = clk_readl(mux->reg) >> mux->shift;
val &= mux->mask;
if (mux->table) {
int i;
for (i = 0; i < num_parents; i++)
if (mux->table[i] == val)
return i;
return -EINVAL;
}
if (val && (mux->flags & CLK_MUX_INDEX_BIT))
val = ffs(val) - 1;
if (val && (mux->flags & CLK_MUX_INDEX_ONE))
val--;
if (val >= num_parents)
return -EINVAL;
return val;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
michael turquette | michael turquette | 90 | 62.94% | 1 | 25.00% |
peter de schrijver | peter de schrijver | 51 | 35.66% | 1 | 25.00% |
gerhard sittig | gerhard sittig | 1 | 0.70% | 1 | 25.00% |
stephen boyd | stephen boyd | 1 | 0.70% | 1 | 25.00% |
| Total | 143 | 100.00% | 4 | 100.00% |
static int clk_mux_set_parent(struct clk_hw *hw, u8 index)
{
struct clk_mux *mux = to_clk_mux(hw);
u32 val;
unsigned long flags = 0;
if (mux->table) {
index = mux->table[index];
} else {
if (mux->flags & CLK_MUX_INDEX_BIT)
index = 1 << index;
if (mux->flags & CLK_MUX_INDEX_ONE)
index++;
}
if (mux->lock)
spin_lock_irqsave(mux->lock, flags);
else
__acquire(mux->lock);
if (mux->flags & CLK_MUX_HIWORD_MASK) {
val = mux->mask << (mux->shift + 16);
} else {
val = clk_readl(mux->reg);
val &= ~(mux->mask << mux->shift);
}
val |= index << mux->shift;
clk_writel(val, mux->reg);
if (mux->lock)
spin_unlock_irqrestore(mux->lock, flags);
else
__release(mux->lock);
return 0;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
michael turquette | michael turquette | 127 | 65.80% | 1 | 16.67% |
haojian zhuang | haojian zhuang | 27 | 13.99% | 1 | 16.67% |
peter de schrijver | peter de schrijver | 19 | 9.84% | 1 | 16.67% |
stephen boyd | stephen boyd | 16 | 8.29% | 1 | 16.67% |
masahiro yamada | masahiro yamada | 2 | 1.04% | 1 | 16.67% |
gerhard sittig | gerhard sittig | 2 | 1.04% | 1 | 16.67% |
| Total | 193 | 100.00% | 6 | 100.00% |
const struct clk_ops clk_mux_ops = {
.get_parent = clk_mux_get_parent,
.set_parent = clk_mux_set_parent,
.determine_rate = __clk_mux_determine_rate,
};
EXPORT_SYMBOL_GPL(clk_mux_ops);
const struct clk_ops clk_mux_ro_ops = {
.get_parent = clk_mux_get_parent,
};
EXPORT_SYMBOL_GPL(clk_mux_ro_ops);
struct clk_hw *clk_hw_register_mux_table(struct device *dev, const char *name,
const char * const *parent_names, u8 num_parents,
unsigned long flags,
void __iomem *reg, u8 shift, u32 mask,
u8 clk_mux_flags, u32 *table, spinlock_t *lock)
{
struct clk_mux *mux;
struct clk_hw *hw;
struct clk_init_data init;
u8 width = 0;
int ret;
if (clk_mux_flags & CLK_MUX_HIWORD_MASK) {
width = fls(mask) - ffs(mask) + 1;
if (width + shift > 16) {
pr_err("mux value exceeds LOWORD field\n");
return ERR_PTR(-EINVAL);
}
}
/* allocate the mux */
mux = kzalloc(sizeof(struct clk_mux), GFP_KERNEL);
if (!mux) {
pr_err("%s: could not allocate mux clk\n", __func__);
return ERR_PTR(-ENOMEM);
}
init.name = name;
if (clk_mux_flags & CLK_MUX_READ_ONLY)
init.ops = &clk_mux_ro_ops;
else
init.ops = &clk_mux_ops;
init.flags = flags | CLK_IS_BASIC;
init.parent_names = parent_names;
init.num_parents = num_parents;
/* struct clk_mux assignments */
mux->reg = reg;
mux->shift = shift;
mux->mask = mask;
mux->flags = clk_mux_flags;
mux->lock = lock;
mux->table = table;
mux->hw.init = &init;
hw = &mux->hw;
ret = clk_hw_register(dev, hw);
if (ret) {
kfree(mux);
hw = ERR_PTR(ret);
}
return hw;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
michael turquette | michael turquette | 128 | 45.07% | 3 | 25.00% |
haojian zhuang | haojian zhuang | 49 | 17.25% | 1 | 8.33% |
stephen boyd | stephen boyd | 39 | 13.73% | 1 | 8.33% |
saravana kannan | saravana kannan | 35 | 12.32% | 1 | 8.33% |
tomasz figa | tomasz figa | 14 | 4.93% | 1 | 8.33% |
peter de schrijver | peter de schrijver | 14 | 4.93% | 1 | 8.33% |
rajendra nayak | rajendra nayak | 2 | 0.70% | 1 | 8.33% |
mark brown | mark brown | 1 | 0.35% | 1 | 8.33% |
sascha hauer | sascha hauer | 1 | 0.35% | 1 | 8.33% |
shawn guo | shawn guo | 1 | 0.35% | 1 | 8.33% |
| Total | 284 | 100.00% | 12 | 100.00% |
EXPORT_SYMBOL_GPL(clk_hw_register_mux_table);
struct clk *clk_register_mux_table(struct device *dev, const char *name,
const char * const *parent_names, u8 num_parents,
unsigned long flags,
void __iomem *reg, u8 shift, u32 mask,
u8 clk_mux_flags, u32 *table, spinlock_t *lock)
{
struct clk_hw *hw;
hw = clk_hw_register_mux_table(dev, name, parent_names, num_parents,
flags, reg, shift, mask, clk_mux_flags,
table, lock);
if (IS_ERR(hw))
return ERR_CAST(hw);
return hw->clk;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
stephen boyd | stephen boyd | 89 | 86.41% | 1 | 33.33% |
michael turquette | michael turquette | 14 | 13.59% | 2 | 66.67% |
| Total | 103 | 100.00% | 3 | 100.00% |
EXPORT_SYMBOL_GPL(clk_register_mux_table);
struct clk *clk_register_mux(struct device *dev, const char *name,
const char * const *parent_names, u8 num_parents,
unsigned long flags,
void __iomem *reg, u8 shift, u8 width,
u8 clk_mux_flags, spinlock_t *lock)
{
u32 mask = BIT(width) - 1;
return clk_register_mux_table(dev, name, parent_names, num_parents,
flags, reg, shift, mask, clk_mux_flags,
NULL, lock);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
peter de schrijver | peter de schrijver | 84 | 98.82% | 1 | 50.00% |
sascha hauer | sascha hauer | 1 | 1.18% | 1 | 50.00% |
| Total | 85 | 100.00% | 2 | 100.00% |
EXPORT_SYMBOL_GPL(clk_register_mux);
struct clk_hw *clk_hw_register_mux(struct device *dev, const char *name,
const char * const *parent_names, u8 num_parents,
unsigned long flags,
void __iomem *reg, u8 shift, u8 width,
u8 clk_mux_flags, spinlock_t *lock)
{
u32 mask = BIT(width) - 1;
return clk_hw_register_mux_table(dev, name, parent_names, num_parents,
flags, reg, shift, mask, clk_mux_flags,
NULL, lock);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
stephen boyd | stephen boyd | 85 | 100.00% | 1 | 100.00% |
| Total | 85 | 100.00% | 1 | 100.00% |
EXPORT_SYMBOL_GPL(clk_hw_register_mux);
void clk_unregister_mux(struct clk *clk)
{
struct clk_mux *mux;
struct clk_hw *hw;
hw = __clk_get_hw(clk);
if (!hw)
return;
mux = to_clk_mux(hw);
clk_unregister(clk);
kfree(mux);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
krzysztof kozlowski | krzysztof kozlowski | 50 | 100.00% | 1 | 100.00% |
| Total | 50 | 100.00% | 1 | 100.00% |
EXPORT_SYMBOL_GPL(clk_unregister_mux);
void clk_hw_unregister_mux(struct clk_hw *hw)
{
struct clk_mux *mux;
mux = to_clk_mux(hw);
clk_hw_unregister(hw);
kfree(mux);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
stephen boyd | stephen boyd | 32 | 100.00% | 1 | 100.00% |
| Total | 32 | 100.00% | 1 | 100.00% |
EXPORT_SYMBOL_GPL(clk_hw_unregister_mux);
Overall Contributors
| Person | Tokens | Prop | Commits | CommitProp |
michael turquette | michael turquette | 407 | 38.18% | 4 | 20.00% |
stephen boyd | stephen boyd | 277 | 25.98% | 3 | 15.00% |
peter de schrijver | peter de schrijver | 168 | 15.76% | 1 | 5.00% |
haojian zhuang | haojian zhuang | 76 | 7.13% | 1 | 5.00% |
krzysztof kozlowski | krzysztof kozlowski | 55 | 5.16% | 1 | 5.00% |
saravana kannan | saravana kannan | 35 | 3.28% | 1 | 5.00% |
tomasz figa | tomasz figa | 31 | 2.91% | 1 | 5.00% |
james hogan | james hogan | 5 | 0.47% | 1 | 5.00% |
gerhard sittig | gerhard sittig | 3 | 0.28% | 1 | 5.00% |
rajendra nayak | rajendra nayak | 2 | 0.19% | 1 | 5.00% |
sascha hauer | sascha hauer | 2 | 0.19% | 1 | 5.00% |
shawn guo | shawn guo | 2 | 0.19% | 2 | 10.00% |
masahiro yamada | masahiro yamada | 2 | 0.19% | 1 | 5.00% |
mark brown | mark brown | 1 | 0.09% | 1 | 5.00% |
| Total | 1066 | 100.00% | 20 | 100.00% |
Information contained on this website is for historical information purposes only and does not indicate or represent copyright ownership.