Release 4.7 drivers/i2c/busses/i2c-pxa.c

/*
 *  i2c_adap_pxa.c
 *
 *  I2C adapter for the PXA I2C bus access.
 *
 *  Copyright (C) 2002 Intrinsyc Software Inc.
 *  Copyright (C) 2004-2005 Deep Blue Solutions Ltd.
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License version 2 as
 *  published by the Free Software Foundation.
 *
 *  History:
 *    Apr 2002: Initial version [CS]
 *    Jun 2002: Properly separated algo/adap [FB]
 *    Jan 2003: Fixed several bugs concerning interrupt handling [Kai-Uwe Bloem]
 *    Jan 2003: added limited signal handling [Kai-Uwe Bloem]
 *    Sep 2004: Major rework to ensure efficient bus handling [RMK]
 *    Dec 2004: Added support for PXA27x and slave device probing [Liam Girdwood]
 *    Feb 2005: Rework slave mode handling [RMK]
 */
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/time.h>
#include <linux/sched.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <linux/i2c-pxa.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/i2c/pxa-i2c.h>

#include <asm/irq.h>


struct pxa_reg_layout {
	
u32 ibmr;
	
u32 idbr;
	
u32 icr;
	
u32 isr;
	
u32 isar;
	
u32 ilcr;
	
u32 iwcr;
};


enum pxa_i2c_types {
	
REGS_PXA2XX,
	
REGS_PXA3XX,
	
REGS_CE4100,
	
REGS_PXA910,
};

/*
 * I2C registers definitions
 */

static struct pxa_reg_layout pxa_reg_layout[] = {
	[REGS_PXA2XX] = {
		.ibmr =	0x00,
		.idbr =	0x08,
		.icr =	0x10,
		.isr =	0x18,
		.isar =	0x20,
        },
	[REGS_PXA3XX] = {
		.ibmr =	0x00,
		.idbr =	0x04,
		.icr =	0x08,
		.isr =	0x0c,
		.isar =	0x10,
        },
	[REGS_CE4100] = {
		.ibmr =	0x14,
		.idbr =	0x0c,
		.icr =	0x00,
		.isr =	0x04,
		/* no isar register */
	},
	[REGS_PXA910] = {
		.ibmr = 0x00,
		.idbr = 0x08,
		.icr =	0x10,
		.isr =	0x18,
		.isar = 0x20,
		.ilcr = 0x28,
		.iwcr = 0x30,
        },
};


static const struct platform_device_id i2c_pxa_id_table[] = {
	{ "pxa2xx-i2c",		REGS_PXA2XX },
	{ "pxa3xx-pwri2c",	REGS_PXA3XX },
	{ "ce4100-i2c",		REGS_CE4100 },
	{ "pxa910-i2c",		REGS_PXA910 },
	{ },
};
MODULE_DEVICE_TABLE(platform, i2c_pxa_id_table);

/*
 * I2C bit definitions
 */


#define ICR_START	(1 << 0)	   
/* start bit */

#define ICR_STOP	(1 << 1)	   
/* stop bit */

#define ICR_ACKNAK	(1 << 2)	   
/* send ACK(0) or NAK(1) */

#define ICR_TB		(1 << 3)	   
/* transfer byte bit */

#define ICR_MA		(1 << 4)	   
/* master abort */

#define ICR_SCLE	(1 << 5)	   
/* master clock enable */

#define ICR_IUE		(1 << 6)	   
/* unit enable */

#define ICR_GCD		(1 << 7)	   
/* general call disable */

#define ICR_ITEIE	(1 << 8)	   
/* enable tx interrupts */

#define ICR_IRFIE	(1 << 9)	   
/* enable rx interrupts */

#define ICR_BEIE	(1 << 10)	   
/* enable bus error ints */

#define ICR_SSDIE	(1 << 11)	   
/* slave STOP detected int enable */

#define ICR_ALDIE	(1 << 12)	   
/* enable arbitration interrupt */

#define ICR_SADIE	(1 << 13)	   
/* slave address detected int enable */

#define ICR_UR		(1 << 14)	   
/* unit reset */

#define ICR_FM		(1 << 15)	   
/* fast mode */

#define ICR_HS		(1 << 16)	   
/* High Speed mode */

#define ICR_GPIOEN	(1 << 19)	   
/* enable GPIO mode for SCL in HS */


#define ISR_RWM		(1 << 0)	   
/* read/write mode */

#define ISR_ACKNAK	(1 << 1)	   
/* ack/nak status */

#define ISR_UB		(1 << 2)	   
/* unit busy */

#define ISR_IBB		(1 << 3)	   
/* bus busy */

#define ISR_SSD		(1 << 4)	   
/* slave stop detected */

#define ISR_ALD		(1 << 5)	   
/* arbitration loss detected */

#define ISR_ITE		(1 << 6)	   
/* tx buffer empty */

#define ISR_IRF		(1 << 7)	   
/* rx buffer full */

#define ISR_GCAD	(1 << 8)	   
/* general call address detected */

#define ISR_SAD		(1 << 9)	   
/* slave address detected */

#define ISR_BED		(1 << 10)	   
/* bus error no ACK/NAK */

/* bit field shift & mask */

#define ILCR_SLV_SHIFT		0

#define ILCR_SLV_MASK		(0x1FF << ILCR_SLV_SHIFT)

#define ILCR_FLV_SHIFT		9

#define ILCR_FLV_MASK		(0x1FF << ILCR_FLV_SHIFT)

#define ILCR_HLVL_SHIFT		18

#define ILCR_HLVL_MASK		(0x1FF << ILCR_HLVL_SHIFT)

#define ILCR_HLVH_SHIFT		27

#define ILCR_HLVH_MASK		(0x1F << ILCR_HLVH_SHIFT)


#define IWCR_CNT_SHIFT		0

#define IWCR_CNT_MASK		(0x1F << IWCR_CNT_SHIFT)

#define IWCR_HS_CNT1_SHIFT	5

#define IWCR_HS_CNT1_MASK	(0x1F << IWCR_HS_CNT1_SHIFT)

#define IWCR_HS_CNT2_SHIFT	10

#define IWCR_HS_CNT2_MASK	(0x1F << IWCR_HS_CNT2_SHIFT)


struct pxa_i2c {
	
spinlock_t		lock;
	
wait_queue_head_t	wait;
	
struct i2c_msg		*msg;
	
unsigned int		msg_num;
	
unsigned int		msg_idx;
	
unsigned int		msg_ptr;
	
unsigned int		slave_addr;
	
unsigned int		req_slave_addr;

	
struct i2c_adapter	adap;
	
struct clk		*clk;
#ifdef CONFIG_I2C_PXA_SLAVE
	
struct i2c_slave_client *slave;
#endif

	
unsigned int		irqlogidx;
	
u32			isrlog[32];
	
u32			icrlog[32];

	
void __iomem		*reg_base;
	
void __iomem		*reg_ibmr;
	
void __iomem		*reg_idbr;
	
void __iomem		*reg_icr;
	
void __iomem		*reg_isr;
	
void __iomem		*reg_isar;
	
void __iomem		*reg_ilcr;
	
void __iomem		*reg_iwcr;

	
unsigned long		iobase;
	
unsigned long		iosize;

	
int			irq;
	
unsigned int		use_pio :1;
	
unsigned int		fast_mode :1;
	
unsigned int		high_mode:1;
	
unsigned char		master_code;
	
unsigned long		rate;
	
bool			highmode_enter;
};


#define _IBMR(i2c)	((i2c)->reg_ibmr)

#define _IDBR(i2c)	((i2c)->reg_idbr)

#define _ICR(i2c)	((i2c)->reg_icr)

#define _ISR(i2c)	((i2c)->reg_isr)

#define _ISAR(i2c)	((i2c)->reg_isar)

#define _ILCR(i2c)	((i2c)->reg_ilcr)

#define _IWCR(i2c)	((i2c)->reg_iwcr)

/*
 * I2C Slave mode address
 */

#define I2C_PXA_SLAVE_ADDR      0x1

#ifdef DEBUG


struct bits {
	
u32	mask;
	
const char *set;
	
const char *unset;
};

#define PXA_BIT(m, s, u)	{ .mask = m, .set = s, .unset = u }


static inline void

decode_bits(const char *prefix, const struct bits *bits, int num, u32 val)
{
	printk("%s %08x: ", prefix, val);
	while (num--) {
		const char *str = val & bits->mask ? bits->set : bits->unset;
		if (str)
			printk("%s ", str);
		bits++;
	}
}

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static const struct bits isr_bits[] = {
	PXA_BIT(ISR_RWM,	"RX",		"TX"),
	PXA_BIT(ISR_ACKNAK,	"NAK",		"ACK"),
	PXA_BIT(ISR_UB,		"Bsy",		"Rdy"),
	PXA_BIT(ISR_IBB,	"BusBsy",	"BusRdy"),
	PXA_BIT(ISR_SSD,	"SlaveStop",	NULL),
	PXA_BIT(ISR_ALD,	"ALD",		NULL),
	PXA_BIT(ISR_ITE,	"TxEmpty",	NULL),
	PXA_BIT(ISR_IRF,	"RxFull",	NULL),
	PXA_BIT(ISR_GCAD,	"GenCall",	NULL),
	PXA_BIT(ISR_SAD,	"SlaveAddr",	NULL),
	PXA_BIT(ISR_BED,	"BusErr",	NULL),
};



static void decode_ISR(unsigned int val)
{
	decode_bits(KERN_DEBUG "ISR", isr_bits, ARRAY_SIZE(isr_bits), val);
	printk("\n");
}

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static const struct bits icr_bits[] = {
	PXA_BIT(ICR_START,  "START",	NULL),
	PXA_BIT(ICR_STOP,   "STOP",	NULL),
	PXA_BIT(ICR_ACKNAK, "ACKNAK",	NULL),
	PXA_BIT(ICR_TB,     "TB",	NULL),
	PXA_BIT(ICR_MA,     "MA",	NULL),
	PXA_BIT(ICR_SCLE,   "SCLE",	"scle"),
	PXA_BIT(ICR_IUE,    "IUE",	"iue"),
	PXA_BIT(ICR_GCD,    "GCD",	NULL),
	PXA_BIT(ICR_ITEIE,  "ITEIE",	NULL),
	PXA_BIT(ICR_IRFIE,  "IRFIE",	NULL),
	PXA_BIT(ICR_BEIE,   "BEIE",	NULL),
	PXA_BIT(ICR_SSDIE,  "SSDIE",	NULL),
	PXA_BIT(ICR_ALDIE,  "ALDIE",	NULL),
	PXA_BIT(ICR_SADIE,  "SADIE",	NULL),
	PXA_BIT(ICR_UR,     "UR",		"ur"),
};

#ifdef CONFIG_I2C_PXA_SLAVE


static void decode_ICR(unsigned int val)
{
	decode_bits(KERN_DEBUG "ICR", icr_bits, ARRAY_SIZE(icr_bits), val);
	printk("\n");
}
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#endif


static unsigned int i2c_debug = DEBUG;



static void i2c_pxa_show_state(struct pxa_i2c *i2c, int lno, const char *fname)
{
	dev_dbg(&i2c->adap.dev, "state:%s:%d: ISR=%08x, ICR=%08x, IBMR=%02x\n", fname, lno,
		readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c)));
}

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#define show_state(i2c) i2c_pxa_show_state(i2c, __LINE__, __func__)



static void i2c_pxa_scream_blue_murder(struct pxa_i2c *i2c, const char *why)
{
	unsigned int i;
	struct device *dev = &i2c->adap.dev;

	dev_err(dev, "slave_0x%x error: %s\n",
		i2c->req_slave_addr >> 1, why);
	dev_err(dev, "msg_num: %d msg_idx: %d msg_ptr: %d\n",
		i2c->msg_num, i2c->msg_idx, i2c->msg_ptr);
	dev_err(dev, "IBMR: %08x IDBR: %08x ICR: %08x ISR: %08x\n",
		readl(_IBMR(i2c)), readl(_IDBR(i2c)), readl(_ICR(i2c)),
		readl(_ISR(i2c)));
	dev_dbg(dev, "log: ");
	for (i = 0; i < i2c->irqlogidx; i++)
		pr_debug("[%08x:%08x] ", i2c->isrlog[i], i2c->icrlog[i]);

	pr_debug("\n");
}

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#else /* ifdef DEBUG */


#define i2c_debug	0


#define show_state(i2c) do { } while (0)

#define decode_ISR(val) do { } while (0)

#define decode_ICR(val) do { } while (0)

#define i2c_pxa_scream_blue_murder(i2c, why) do { } while (0)

#endif /* ifdef DEBUG / else */

static void i2c_pxa_master_complete(struct pxa_i2c *i2c, int ret);
static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id);



static inline int i2c_pxa_is_slavemode(struct pxa_i2c *i2c)
{
	return !(readl(_ICR(i2c)) & ICR_SCLE);
}

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static void i2c_pxa_abort(struct pxa_i2c *i2c)
{
	int i = 250;

	if (i2c_pxa_is_slavemode(i2c)) {
		dev_dbg(&i2c->adap.dev, "%s: called in slave mode\n", __func__);
		return;
	}

	while ((i > 0) && (readl(_IBMR(i2c)) & 0x1) == 0) {
		unsigned long icr = readl(_ICR(i2c));

		icr &= ~ICR_START;
		icr |= ICR_ACKNAK | ICR_STOP | ICR_TB;

		writel(icr, _ICR(i2c));

		show_state(i2c);

		mdelay(1);
		i --;
	}

	writel(readl(_ICR(i2c)) & ~(ICR_MA | ICR_START | ICR_STOP),
	       _ICR(i2c));
}

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static int i2c_pxa_wait_bus_not_busy(struct pxa_i2c *i2c)
{
	int timeout = DEF_TIMEOUT;

	while (timeout-- && readl(_ISR(i2c)) & (ISR_IBB | ISR_UB)) {
		if ((readl(_ISR(i2c)) & ISR_SAD) != 0)
			timeout += 4;

		msleep(2);
		show_state(i2c);
	}

	if (timeout < 0)
		show_state(i2c);

	return timeout < 0 ? I2C_RETRY : 0;
}

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static int i2c_pxa_wait_master(struct pxa_i2c *i2c)
{
	unsigned long timeout = jiffies + HZ*4;

	while (time_before(jiffies, timeout)) {
		if (i2c_debug > 1)
			dev_dbg(&i2c->adap.dev, "%s: %ld: ISR=%08x, ICR=%08x, IBMR=%02x\n",
				__func__, (long)jiffies, readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c)));

		if (readl(_ISR(i2c)) & ISR_SAD) {
			if (i2c_debug > 0)
				dev_dbg(&i2c->adap.dev, "%s: Slave detected\n", __func__);
			goto out;
		}

		/* wait for unit and bus being not busy, and we also do a
                 * quick check of the i2c lines themselves to ensure they've
                 * gone high...
                 */
		if ((readl(_ISR(i2c)) & (ISR_UB | ISR_IBB)) == 0 && readl(_IBMR(i2c)) == 3) {
			if (i2c_debug > 0)
				dev_dbg(&i2c->adap.dev, "%s: done\n", __func__);
			return 1;
		}

		msleep(1);
	}

	if (i2c_debug > 0)
		dev_dbg(&i2c->adap.dev, "%s: did not free\n", __func__);
 out:
	return 0;
}

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static int i2c_pxa_set_master(struct pxa_i2c *i2c)
{
	if (i2c_debug)
		dev_dbg(&i2c->adap.dev, "setting to bus master\n");

	if ((readl(_ISR(i2c)) & (ISR_UB | ISR_IBB)) != 0) {
		dev_dbg(&i2c->adap.dev, "%s: unit is busy\n", __func__);
		if (!i2c_pxa_wait_master(i2c)) {
			dev_dbg(&i2c->adap.dev, "%s: error: unit busy\n", __func__);
			return I2C_RETRY;
		}
	}

	writel(readl(_ICR(i2c)) | ICR_SCLE, _ICR(i2c));
	return 0;
}

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#ifdef CONFIG_I2C_PXA_SLAVE


static int i2c_pxa_wait_slave(struct pxa_i2c *i2c)
{
	unsigned long timeout = jiffies + HZ*1;

	/* wait for stop */

	show_state(i2c);

	while (time_before(jiffies, timeout)) {
		if (i2c_debug > 1)
			dev_dbg(&i2c->adap.dev, "%s: %ld: ISR=%08x, ICR=%08x, IBMR=%02x\n",
				__func__, (long)jiffies, readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c)));

		if ((readl(_ISR(i2c)) & (ISR_UB|ISR_IBB)) == 0 ||
		    (readl(_ISR(i2c)) & ISR_SAD) != 0 ||
		    (readl(_ICR(i2c)) & ICR_SCLE) == 0) {
			if (i2c_debug > 1)
				dev_dbg(&i2c->adap.dev, "%s: done\n", __func__);
			return 1;
		}

		msleep(1);
	}

	if (i2c_debug > 0)
		dev_dbg(&i2c->adap.dev, "%s: did not free\n", __func__);
	return 0;
}

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/*
 * clear the hold on the bus, and take of anything else
 * that has been configured
 */


static void i2c_pxa_set_slave(struct pxa_i2c *i2c, int errcode)
{
	show_state(i2c);

	if (errcode < 0) {
		udelay(100);   /* simple delay */
	} else {
		/* we need to wait for the stop condition to end */

		/* if we where in stop, then clear... */
		if (readl(_ICR(i2c)) & ICR_STOP) {
			udelay(100);
			writel(readl(_ICR(i2c)) & ~ICR_STOP, _ICR(i2c));
		}

		if (!i2c_pxa_wait_slave(i2c)) {
			dev_err(&i2c->adap.dev, "%s: wait timedout\n",
				__func__);
			return;
		}
	}

	writel(readl(_ICR(i2c)) & ~(ICR_STOP|ICR_ACKNAK|ICR_MA), _ICR(i2c));
	writel(readl(_ICR(i2c)) & ~ICR_SCLE, _ICR(i2c));

	if (i2c_debug) {
		dev_dbg(&i2c->adap.dev, "ICR now %08x, ISR %08x\n", readl(_ICR(i2c)), readl(_ISR(i2c)));
		decode_ICR(readl(_ICR(i2c)));
	}
}
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#else

#define i2c_pxa_set_slave(i2c, err)	do { } while (0)
#endif



static void i2c_pxa_reset(struct pxa_i2c *i2c)
{
	pr_debug("Resetting I2C Controller Unit\n");

	/* abort any transfer currently under way */
	i2c_pxa_abort(i2c);

	/* reset according to 9.8 */
	writel(ICR_UR, _ICR(i2c));
	writel(I2C_ISR_INIT, _ISR(i2c));
	writel(readl(_ICR(i2c)) & ~ICR_UR, _ICR(i2c));

	if (i2c->reg_isar && IS_ENABLED(CONFIG_I2C_PXA_SLAVE))
		writel(i2c->slave_addr, _ISAR(i2c));

	/* set control register values */
	writel(I2C_ICR_INIT | (i2c->fast_mode ? ICR_FM : 0), _ICR(i2c));
	writel(readl(_ICR(i2c)) | (i2c->high_mode ? ICR_HS : 0), _ICR(i2c));

#ifdef CONFIG_I2C_PXA_SLAVE
	dev_info(&i2c->adap.dev, "Enabling slave mode\n");
	writel(readl(_ICR(i2c)) | ICR_SADIE | ICR_ALDIE | ICR_SSDIE, _ICR(i2c));
#endif

	i2c_pxa_set_slave(i2c, 0);

	/* enable unit */
	writel(readl(_ICR(i2c)) | ICR_IUE, _ICR(i2c));
	udelay(100);
}


Contributors
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guennadi liakhovetski
guennadi liakhovetski
80
39.60%
1
14.29%
russell king
russell king
75
37.13%
2
28.57%
leilei shang
leilei shang
26
12.87%
1
14.29%
jonathan cameron
jonathan cameron
10
4.95%
1
14.29%
sebastian andrzej siewior
sebastian andrzej siewior
6
2.97%
1
14.29%
vaibhav hiremath
vaibhav hiremath
5
2.48%
1
14.29%
Total
202
100.00%
7
100.00%

#ifdef CONFIG_I2C_PXA_SLAVE
/*
 * PXA I2C Slave mode
 */



static void i2c_pxa_slave_txempty(struct pxa_i2c *i2c, u32 isr)
{
	if (isr & ISR_BED) {
		/* what should we do here? */
	} else {
		int ret = 0;

		if (i2c->slave != NULL)
			ret = i2c->slave->read(i2c->slave->data);

		writel(ret, _IDBR(i2c));
		writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));   /* allow next byte */
	}
}

Contributors
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russell king
russell king
59
71.08%
2
66.67%
guennadi liakhovetski
guennadi liakhovetski
24
28.92%
1
33.33%
Total
83
100.00%
3
100.00%



static void i2c_pxa_slave_rxfull(struct pxa_i2c *i2c, u32 isr)
{
	unsigned int byte = readl(_IDBR(i2c));

	if (i2c->slave != NULL)
		i2c->slave->write(i2c->slave->data, byte);

	writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));
}

Contributors
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russell king
russell king
44
65.67%
1
50.00%
guennadi liakhovetski
guennadi liakhovetski
23
34.33%
1
50.00%
Total
67
100.00%
2
100.00%



static void i2c_pxa_slave_start(struct pxa_i2c *i2c, u32 isr)
{
	int timeout;

	if (i2c_debug > 0)
		dev_dbg(&i2c->adap.dev, "SAD, mode is slave-%cx\n",
		       (isr & ISR_RWM) ? 'r' : 't');

	if (i2c->slave != NULL)
		i2c->slave->event(i2c->slave->data,
				 (isr & ISR_RWM) ? I2C_SLAVE_EVENT_START_READ : I2C_SLAVE_EVENT_START_WRITE);

	/*
         * slave could interrupt in the middle of us generating a
         * start condition... if this happens, we'd better back off
         * and stop holding the poor thing up
         */
	writel(readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP), _ICR(i2c));
	writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));

	timeout = 0x10000;

	while (1) {
		if ((readl(_IBMR(i2c)) & 2) == 2)
			break;

		timeout--;

		if (timeout <= 0) {
			dev_err(&i2c->adap.dev, "timeout waiting for SCL high\n");
			break;
		}
	}

	writel(readl(_ICR(i2c)) & ~ICR_SCLE, _ICR(i2c));
}

Contributors
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russell king
russell king
133
70.74%
2
66.67%
guennadi liakhovetski
guennadi liakhovetski
55
29.26%
1
33.33%
Total
188
100.00%
3
100.00%



static void i2c_pxa_slave_stop(struct pxa_i2c *i2c)
{
	if (i2c_debug > 2)
		dev_dbg(&i2c->adap.dev, "ISR: SSD (Slave Stop)\n");

	if (i2c->slave != NULL)
		i2c->slave->event(i2c->slave->data, I2C_SLAVE_EVENT_STOP);

	if (i2c_debug > 2)
		dev_dbg(&i2c->adap.dev, "ISR: SSD (Slave Stop) acked\n");

	/*
         * If we have a master-mode message waiting,
         * kick it off now that the slave has completed.
         */
	if (i2c->msg)
		i2c_pxa_master_complete(i2c, I2C_RETRY);
}
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russell king
russell king
84
100.00%
2
100.00%
Total
84
100.00%
2
100.00%

#else


static void i2c_pxa_slave_txempty(struct pxa_i2c *i2c, u32 isr)
{
	if (isr & ISR_BED) {
		/* what should we do here? */
	} else {
		writel(0, _IDBR(i2c));
		writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));
	}
}

Contributors
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russell king
russell king
30
55.56%
1
50.00%
guennadi liakhovetski
guennadi liakhovetski
24
44.44%
1
50.00%
Total
54
100.00%
2
100.00%



static void i2c_pxa_slave_rxfull(struct pxa_i2c *i2c, u32 isr)
{
	writel(readl(_ICR(i2c)) | ICR_TB | ICR_ACKNAK, _ICR(i2c));
}

Contributors
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russell king
russell king
18
52.94%
1
50.00%
guennadi liakhovetski
guennadi liakhovetski
16
47.06%
1
50.00%
Total
34
100.00%
2
100.00%



static void i2c_pxa_slave_start(struct pxa_i2c *i2c, u32 isr)
{
	int timeout;

	/*
         * slave could interrupt in the middle of us generating a
         * start condition... if this happens, we'd better back off
         * and stop holding the poor thing up
         */
	writel(readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP), _ICR(i2c));
	writel(readl(_ICR(i2c)) | ICR_TB | ICR_ACKNAK, _ICR(i2c));

	timeout = 0x10000;

	while (1) {
		if ((readl(_IBMR(i2c)) & 2) == 2)
			break;

		timeout--;

		if (timeout <= 0) {
			dev_err(&i2c->adap.dev, "timeout waiting for SCL high\n");
			break;
		}
	}

	writel(readl(_ICR(i2c)) & ~ICR_SCLE, _ICR(i2c));
}

Contributors
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russell king
russell king
76
58.02%
2
66.67%
guennadi liakhovetski
guennadi liakhovetski
55
41.98%
1
33.33%
Total
131
100.00%
3
100.00%



static void i2c_pxa_slave_stop(struct pxa_i2c *i2c)
{
	if (i2c->msg)
		i2c_pxa_master_complete(i2c, I2C_RETRY);
}
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russell king
russell king
24
100.00%
1
100.00%
Total
24
100.00%
1
100.00%

#endif

/*
 * PXA I2C Master mode
 */



static inline unsigned int i2c_pxa_addr_byte(struct i2c_msg *msg)
{
	unsigned int addr = (msg->addr & 0x7f) << 1;

	if (msg->flags & I2C_M_RD)
		addr |= 1;

	return addr;
}

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russell king
russell king
42
100.00%
1
100.00%
Total
42
100.00%
1
100.00%



static inline void i2c_pxa_start_message(struct pxa_i2c *i2c)
{
	u32 icr;

	/*
         * Step 1: target slave address into IDBR
         */
	writel(i2c_pxa_addr_byte(i2c->msg), _IDBR(i2c));
	i2c->req_slave_addr = i2c_pxa_addr_byte(i2c->msg);

	/*
         * Step 2: initiate the write.
         */
	icr = readl(_ICR(i2c)) & ~(ICR_STOP | ICR_ALDIE);
	writel(icr | ICR_START | ICR_TB, _ICR(i2c));
}

Contributors
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russell king
russell king
40
54.05%
1
33.33%
guennadi liakhovetski
guennadi liakhovetski
23
31.08%
1
33.33%
vaibhav hiremath
vaibhav hiremath
11
14.86%
1
33.33%
Total
74
100.00%
3
100.00%



static inline void i2c_pxa_stop_message(struct pxa_i2c *i2c)
{
	u32 icr;

	/*
         * Clear the STOP and ACK flags
         */
	icr = readl(_ICR(i2c));
	icr &= ~(ICR_STOP | ICR_ACKNAK);
	writel(icr, _ICR(i2c));
}

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jean delvare
jean delvare
44
97.78%
1
50.00%
russell king
russell king
1
2.22%
1
50.00%
Total
45
100.00%
2
100.00%



static int i2c_pxa_pio_set_master(struct pxa_i2c *i2c)
{
	/* make timeout the same as for interrupt based functions */
	long timeout = 2 * DEF_TIMEOUT;

	/*
         * Wait for the bus to become free.
         */
	while (timeout-- && readl(_ISR(i2c)) & (ISR_IBB | ISR_UB)) {
		udelay(1000);
		show_state(i2c);
	}

	if (timeout < 0) {
		show_state(i2c);
		dev_err(&i2c->adap.dev,
			"i2c_pxa: timeout waiting for bus free\n");
		return I2C_RETRY;
	}

	/*
         * Set master mode.
         */
	writel(readl(_ICR(i2c)) | ICR_SCLE, _ICR(i2c));

	return 0;
}

Contributors
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mike rapoport
mike rapoport
100
99.01%
1
50.00%
roel kluin
roel kluin
1
0.99%
1
50.00%
Total
101
100.00%
2
100.00%

/*
 * PXA I2C send master code
 * 1. Load master code to IDBR and send it.
 *    Note for HS mode, set ICR [GPIOEN].
 * 2. Wait until win arbitration.
 */


static int i2c_pxa_send_mastercode(struct pxa_i2c *i2c)
{
	u32 icr;
	long timeout;

	spin_lock_irq(&i2c->lock);
	i2c->highmode_enter = true;
	writel(i2c->master_code, _IDBR(i2c));

	icr = readl(_ICR(i2c)) & ~(ICR_STOP | ICR_ALDIE);
	icr |= ICR_GPIOEN | ICR_START | ICR_TB | ICR_ITEIE;
	writel(icr, _ICR(i2c));

	spin_unlock_irq(&i2c->lock);
	timeout = wait_event_timeout(i2c->wait,
			i2c->highmode_enter == false, HZ * 1);

	i2c->highmode_enter = false;

	return (timeout == 0) ? I2C_RETRY : 0;
}

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leilei shang
leilei shang
124
100.00%
1
100.00%
Total
124
100.00%
1
100.00%



static int i2c_pxa_do_pio_xfer(struct pxa_i2c *i2c,
			       struct i2c_msg *msg, int num)
{
	unsigned long timeout = 500000; /* 5 seconds */
	int ret = 0;

	ret = i2c_pxa_pio_set_master(i2c);
	if (ret)
		goto out;

	i2c->msg = msg;
	i2c->msg_num = num;
	i2c->msg_idx = 0;
	i2c->msg_ptr = 0;
	i2c->irqlogidx = 0;

	i2c_pxa_start_message(i2c);

	while (i2c->msg_num > 0 && --timeout) {
		i2c_pxa_handler(0, i2c);
		udelay(10);
	}

	i2c_pxa_stop_message(i2c);

	/*
         * We place the return code in i2c->msg_idx.
         */
	ret = i2c->msg_idx;

out:
	if (timeout == 0) {
		i2c_pxa_scream_blue_murder(i2c, "timeout");
		ret = I2C_RETRY;
	}

	return ret;
}

Contributors
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mike rapoport
mike rapoport
132
93.62%
1
33.33%
wang shouming
wang shouming
6
4.26%
1
33.33%
roel kluin
roel kluin
3
2.13%
1
33.33%
Total
141
100.00%
3
100.00%

/*
 * We are protected by the adapter bus mutex.
 */


static int i2c_pxa_do_xfer(struct pxa_i2c *i2c, struct i2c_msg *msg, int num)
{
	long timeout;
	int ret;

	/*
         * Wait for the bus to become free.
         */
	ret = i2c_pxa_wait_bus_not_busy(i2c);
	if (ret) {
		dev_err(&i2c->adap.dev, "i2c_pxa: timeout waiting for bus free\n");
		goto out;
	}

	/*
         * Set master mode.
         */
	ret = i2c_pxa_set_master(i2c);
	if (ret) {
		dev_err(&i2c->adap.dev, "i2c_pxa_set_master: error %d\n", ret);
		goto out;
	}

	if (i2c->high_mode) {
		ret = i2c_pxa_send_mastercode(i2c);
		if (ret) {
			dev_err(&i2c->adap.dev, "i2c_pxa_send_mastercode timeout\n");
			goto out;
			}
	}

	spin_lock_irq(&i2c->lock);

	i2c->msg = msg;
	i2c->msg_num = num;
	i2c->msg_idx = 0;
	i2c->msg_ptr = 0;
	i2c->irqlogidx = 0;

	i2c_pxa_start_message(i2c);

	spin_unlock_irq(&i2c->lock);

	/*
         * The rest of the processing occurs in the interrupt handler.
         */
	timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
	i2c_pxa_stop_message(i2c);

	/*
         * We place the return code in i2c->msg_idx.
         */
	ret = i2c->msg_idx;

	if (!timeout && i2c->msg_num) {
		i2c_pxa_scream_blue_murder(i2c, "timeout");
		ret = I2C_RETRY;
	}

 out:
	return ret;
}

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russell king
russell king
179
77.49%
2
40.00%
leilei shang
leilei shang
36
15.58%
1
20.00%
sebastian andrzej siewior
sebastian andrzej siewior
11
4.76%
1
20.00%
jean delvare
jean delvare
5
2.16%
1
20.00%
Total
231
100.00%
5
100.00%



static int i2c_pxa_pio_xfer(struct i2c_adapter *adap,
			    struct i2c_msg msgs[], int num)
{
	struct pxa_i2c *i2c = adap->algo_data;
	int ret, i;

	/* If the I2C controller is disabled we need to reset it
          (probably due to a suspend/resume destroying state). We do
          this here as we can then avoid worrying about resuming the
          controller before its users. */
	if (!(readl(_ICR(i2c)) & ICR_IUE))
		i2c_pxa_reset(i2c);

	for (i = adap->retries; i >= 0; i--) {
		ret = i2c_pxa_do_pio_xfer(i2c, msgs, num);
		if (ret != I2C_RETRY)
			goto out;

		if (i2c_debug)
			dev_dbg(&adap->dev, "Retrying transmission\n");
		udelay(100);
	}
	i2c_pxa_scream_blue_murder(i2c, "exhausted retries");
	ret = -EREMOTEIO;
 out:
	i2c_pxa_set_slave(i2c, ret);
	return ret;
}

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mike rapoport
mike rapoport
134
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1
100.00%
Total
134
100.00%
1
100.00%

/*
 * i2c_pxa_master_complete - complete the message and wake up.
 */


static void i2c_pxa_master_complete(struct pxa_i2c *i2c, int ret)
{
	i2c->msg_ptr = 0;
	i2c->msg = NULL;
	i2c->msg_idx ++;
	i2c->msg_num = 0;
	if (ret)
		i2c->msg_idx = ret;
	if (!i2c->use_pio)
		wake_up(&i2c->wait);
}

Contributors
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russell king
russell king
55
88.71%
1
50.00%
mike rapoport
mike rapoport
7
11.29%
1
50.00%
Total
62
100.00%
2
100.00%



static void i2c_pxa_irq_txempty(struct pxa_i2c *i2c, u32 isr)
{
	u32 icr = readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP|ICR_ACKNAK|ICR_TB);

 again:
	/*
         * If ISR_ALD is set, we lost arbitration.
         */
	if (isr & ISR_ALD) {
		/*
                 * Do we need to do anything here?  The PXA docs
                 * are vague about what happens.
                 */
		i2c_pxa_scream_blue_murder(i2c, "ALD set");

		/*
                 * We ignore this error.  We seem to see spurious ALDs
                 * for seemingly no reason.  If we handle them as I think
                 * they should, we end up causing an I2C error, which
                 * is painful for some systems.
                 */
		return; /* ignore */
	}

	if ((isr & ISR_BED) &&
		(!((i2c->msg->flags & I2C_M_IGNORE_NAK) &&
			(isr & ISR_ACKNAK)))) {
		int ret = BUS_ERROR;

		/*
                 * I2C bus error - either the device NAK'd us, or
                 * something more serious happened.  If we were NAK'd
                 * on the initial address phase, we can retry.
                 */
		if (isr & ISR_ACKNAK) {
			if (i2c->msg_ptr == 0 && i2c->msg_idx == 0)
				ret = I2C_RETRY;
			else
				ret = XFER_NAKED;
		}
		i2c_pxa_master_complete(i2c, ret);
	} else if (isr & ISR_RWM) {
		/*
                 * Read mode.  We have just sent the address byte, and
                 * now we must initiate the transfer.
                 */
		if (i2c->msg_ptr == i2c->msg->len - 1 &&
		    i2c->msg_idx == i2c->msg_num - 1)
			icr |= ICR_STOP | ICR_ACKNAK;

		icr |= ICR_ALDIE | ICR_TB;
	} else if (i2c->msg_ptr < i2c->msg->len) {
		/*
                 * Write mode.  Write the next data byte.
                 */
		writel(i2c->msg->buf[i2c->msg_ptr++], _IDBR(i2c));

		icr |= ICR_ALDIE | ICR_TB;

		/*
                 * If this is the last byte of the last message or last byte
                 * of any message with I2C_M_STOP (e.g. SCCB), send a STOP.
                 */
		if ((i2c->msg_ptr == i2c->msg->len) &&
			((i2c->msg->flags & I2C_M_STOP) ||
			(i2c->msg_idx == i2c->msg_num - 1)))
				icr |= ICR_STOP;

	} else if (i2c->msg_idx < i2c->msg_num - 1) {
		/*
                 * Next segment of the message.
                 */
		i2c->msg_ptr = 0;
		i2c->msg_idx ++;
		i2c->msg++;

		/*
                 * If we aren't doing a repeated start and address,
                 * go back and try to send the next byte.  Note that
                 * we do not support switching the R/W direction here.
                 */
		if (i2c->msg->flags & I2C_M_NOSTART)
			goto again;

		/*
                 * Write the next address.
                 */
		writel(i2c_pxa_addr_byte(i2c->msg), _IDBR(i2c));
		i2c->req_slave_addr = i2c_pxa_addr_byte(i2c->msg);

		/*
                 * And trigger a repeated start, and send the byte.
                 */
		icr &= ~ICR_ALDIE;
		icr |= ICR_START | ICR_TB;
	} else {
		if (i2c->msg->len == 0) {
			/*
                         * Device probes have a message length of zero
                         * and need the bus to be reset before it can
                         * be used again.
                         */
			i2c_pxa_reset(i2c);
		}
		i2c_pxa_master_complete(i2c, 0);
	}

	i2c->icrlog[i2c->irqlogidx-1] = icr;

	writel(icr, _ICR(i2c));
	show_state(i2c);
}

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russell king
russell king
322
79.51%
1
25.00%
petr cvek
petr cvek
40
9.88%
1
25.00%
guennadi liakhovetski
guennadi liakhovetski
32
7.90%
1
25.00%
vaibhav hiremath
vaibhav hiremath
11
2.72%
1
25.00%
Total
405
100.00%
4
100.00%



static void i2c_pxa_irq_rxfull(struct pxa_i2c *i2c, u32 isr)
{
	u32 icr = readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP|ICR_ACKNAK|ICR_TB);

	/*
         * Read the byte.
         */
	i2c->msg->buf[i2c->msg_ptr++] = readl(_IDBR(i2c));

	if (i2c->msg_ptr < i2c->msg->len) {
		/*
                 * If this is the last byte of the last
                 * message, send a STOP.
                 */
		if (i2c->msg_ptr == i2c->msg->len - 1)
			icr |= ICR_STOP | ICR_ACKNAK;

		icr |= ICR_ALDIE | ICR_TB;
	} else {
		i2c_pxa_master_complete(i2c, 0);
	}

	i2c->icrlog[i2c->irqlogidx-1] = icr;

	writel(icr, _ICR(i2c));
}

Contributors
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russell king
russell king
109
83.21%
1
50.00%
guennadi liakhovetski
guennadi liakhovetski
22
16.79%
1
50.00%
Total
131
100.00%
2
100.00%


#define VALID_INT_SOURCE	(ISR_SSD | ISR_ALD | ISR_ITE | ISR_IRF | \
                                ISR_SAD | ISR_BED)


static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id)
{
	struct pxa_i2c *i2c = dev_id;
	u32 isr = readl(_ISR(i2c));

	if (!(isr & VALID_INT_SOURCE))
		return IRQ_NONE;

	if (i2c_debug > 2 && 0) {
		dev_dbg(&i2c->adap.dev, "%s: ISR=%08x, ICR=%08x, IBMR=%02x\n",
			__func__, isr, readl(_ICR(i2c)), readl(_IBMR(i2c)));
		decode_ISR(isr);
	}

	if (i2c->irqlogidx < ARRAY_SIZE(i2c->isrlog))
		i2c->isrlog[i2c->irqlogidx++] = isr;

	show_state(i2c);

	/*
         * Always clear all pending IRQs.
         */
	writel(isr & VALID_INT_SOURCE, _ISR(i2c));

	if (isr & ISR_SAD)
		i2c_pxa_slave_start(i2c, isr);
	if (isr & ISR_SSD)
		i2c_pxa_slave_stop(i2c);

	if (i2c_pxa_is_slavemode(i2c)) {
		if (isr & ISR_ITE)
			i2c_pxa_slave_txempty(i2c, isr);
		if (isr & ISR_IRF)
			i2c_pxa_slave_rxfull(i2c, isr);
	} else if (i2c->msg && (!i2c->highmode_enter)) {
		if (isr & ISR_ITE)
			i2c_pxa_irq_txempty(i2c, isr);
		if (isr & ISR_IRF)
			i2c_pxa_irq_rxfull(i2c, isr);
	} else if ((isr & ISR_ITE) && i2c->highmode_enter) {
		i2c->highmode_enter = false;
		wake_up(&i2c->wait);
	} else {
		i2c_pxa_scream_blue_murder(i2c, "spurious irq");
	}

	return IRQ_HANDLED;
}


Contributors
Person
Tokens
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CommitProp
russell king
russell king
196
71.01%
2
28.57%
leilei shang
leilei shang
36
13.04%
1
14.29%
guennadi liakhovetski
guennadi liakhovetski
29
10.51%
1
14.29%
sebastian andrzej siewior
sebastian andrzej siewior
8
2.90%
1
14.29%
vasily khoruzhick
vasily khoruzhick
6
2.17%
1
14.29%
tobias klauser
tobias klauser
1
0.36%
1
14.29%
Total
276
100.00%
7
100.00%



static int i2c_pxa_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
{
	struct pxa_i2c *i2c = adap->algo_data;
	int ret, i;

	for (i = adap->retries; i >= 0; i--) {
		ret = i2c_pxa_do_xfer(i2c, msgs, num);
		if (ret != I2C_RETRY)
			goto out;

		if (i2c_debug)
			dev_dbg(&adap->dev, "Retrying transmission\n");
		udelay(100);
	}
	i2c_pxa_scream_blue_murder(i2c, "exhausted retries");
	ret = -EREMOTEIO;
 out:
	i2c_pxa_set_slave(i2c, ret);
	return ret;
}

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russell king
russell king
113
100.00%
2
100.00%
Total
113
100.00%
2
100.00%



static u32 i2c_pxa_functionality(struct i2c_adapter *adap)
{
	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
		I2C_FUNC_PROTOCOL_MANGLING | I2C_FUNC_NOSTART;
}

Contributors
Person
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russell king
russell king
16
80.00%
1
50.00%
petr cvek
petr cvek
4
20.00%
1
50.00%
Total
20
100.00%
2
100.00%


static const struct i2c_algorithm i2c_pxa_algorithm = {
	.master_xfer	= i2c_pxa_xfer,
	.functionality	= i2c_pxa_functionality,
};


static const struct i2c_algorithm i2c_pxa_pio_algorithm = {
	.master_xfer	= i2c_pxa_pio_xfer,
	.functionality	= i2c_pxa_functionality,
};


static const struct of_device_id i2c_pxa_dt_ids[] = {
	{ .compatible = "mrvl,pxa-i2c", .data = (void *)REGS_PXA2XX },
	{ .compatible = "mrvl,pwri2c", .data = (void *)REGS_PXA3XX },
	{ .compatible = "mrvl,mmp-twsi", .data = (void *)REGS_PXA910 },
	{}
};
MODULE_DEVICE_TABLE(of, i2c_pxa_dt_ids);



static int i2c_pxa_probe_dt(struct platform_device *pdev, struct pxa_i2c *i2c,
			    enum pxa_i2c_types *i2c_types)
{
	struct device_node *np = pdev->dev.of_node;
	const struct of_device_id *of_id =
			of_match_device(i2c_pxa_dt_ids, &pdev->dev);

	if (!of_id)
		return 1;

	/* For device tree we always use the dynamic or alias-assigned ID */
	i2c->adap.nr = -1;

	if (of_get_property(np, "mrvl,i2c-polling", NULL))
		i2c->use_pio = 1;
	if (of_get_property(np, "mrvl,i2c-fast-mode", NULL))
		i2c->fast_mode = 1;

	*i2c_types = (enum pxa_i2c_types)(of_id->data);

	return 0;
}

Contributors
Person
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haojian zhuang
haojian zhuang
89
76.72%
1
16.67%
russell king
russell king
11
9.48%
2
33.33%
douglas anderson
douglas anderson
7
6.03%
1
16.67%
yipeng yao
yipeng yao
6
5.17%
1
16.67%
guennadi liakhovetski
guennadi liakhovetski
3
2.59%
1
16.67%
Total
116
100.00%
6
100.00%



static int i2c_pxa_probe_pdata(struct platform_device *pdev,
			       struct pxa_i2c *i2c,
			       enum pxa_i2c_types *i2c_types)
{
	struct i2c_pxa_platform_data *plat = dev_get_platdata(&pdev->dev);
	const struct platform_device_id *id = platform_get_device_id(pdev);

	*i2c_types = id->driver_data;
	if (plat) {
		i2c->use_pio = plat->use_pio;
		i2c->fast_mode = plat->fast_mode;
		i2c->high_mode = plat->high_mode;
		i2c->master_code = plat->master_code;
		if (!i2c->master_code)
			i2c->master_code = 0xe;
		i2c->rate = plat->rate;
	}
	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
haojian zhuang
haojian zhuang
55
48.25%
1
14.29%
leilei shang
leilei shang
37
32.46%
1
14.29%
eric miao
eric miao
9
7.89%
1
14.29%
russell king
russell king
8
7.02%
2
28.57%
jingoo han
jingoo han
4
3.51%
1
14.29%
marc kleine-budde
marc kleine-budde
1
0.88%
1
14.29%
Total
114
100.00%
7
100.00%



static int i2c_pxa_probe(struct platform_device *dev)
{
	struct i2c_pxa_platform_data *plat = dev_get_platdata(&dev->dev);
	enum pxa_i2c_types i2c_type;
	struct pxa_i2c *i2c;
	struct resource *res = NULL;
	int ret, irq;

	i2c = devm_kzalloc(&dev->dev, sizeof(struct pxa_i2c), GFP_KERNEL);
	if (!i2c)
		return -ENOMEM;

	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
	i2c->reg_base = devm_ioremap_resource(&dev->dev, res);
	if (IS_ERR(i2c->reg_base))
		return PTR_ERR(i2c->reg_base);

	irq = platform_get_irq(dev, 0);
	if (irq < 0) {
		dev_err(&dev->dev, "no irq resource: %d\n", irq);
		return irq;
	}

	/* Default adapter num to device id; i2c_pxa_probe_dt can override. */
	i2c->adap.nr = dev->id;

	ret = i2c_pxa_probe_dt(dev, i2c, &i2c_type);
	if (ret > 0)
		ret = i2c_pxa_probe_pdata(dev, i2c, &i2c_type);
	if (ret < 0)
		return ret;

	i2c->adap.owner   = THIS_MODULE;
	i2c->adap.retries = 5;

	spin_lock_init(&i2c->lock);
	init_waitqueue_head(&i2c->wait);

	strlcpy(i2c->adap.name, "pxa_i2c-i2c", sizeof(i2c->adap.name));

	i2c->clk = devm_clk_get(&dev->dev, NULL);
	if (IS_ERR(i2c->clk)) {
		dev_err(&dev->dev, "failed to get the clk: %ld\n", PTR_ERR(i2c->clk));
		return PTR_ERR(i2c->clk);
	}

	i2c->reg_ibmr = i2c->reg_base + pxa_reg_layout[i2c_type].ibmr;
	i2c->reg_idbr = i2c->reg_base + pxa_reg_layout[i2c_type].idbr;
	i2c->reg_icr = i2c->reg_base + pxa_reg_layout[i2c_type].icr;
	i2c->reg_isr = i2c->reg_base + pxa_reg_layout[i2c_type].isr;
	if (i2c_type != REGS_CE4100)
		i2c->reg_isar = i2c->reg_base + pxa_reg_layout[i2c_type].isar;

	if (i2c_type == REGS_PXA910) {
		i2c->reg_ilcr = i2c->reg_base + pxa_reg_layout[i2c_type].ilcr;
		i2c->reg_iwcr = i2c->reg_base + pxa_reg_layout[i2c_type].iwcr;
	}

	i2c->iobase = res->start;
	i2c->iosize = resource_size(res);

	i2c->irq = irq;

	i2c->slave_addr = I2C_PXA_SLAVE_ADDR;
	i2c->highmode_enter = false;

	if (plat) {
#ifdef CONFIG_I2C_PXA_SLAVE
		i2c->slave_addr = plat->slave_addr;
		i2c->slave = plat->slave;
#endif
		i2c->adap.class = plat->class;
	}

	if (i2c->high_mode) {
		if (i2c->rate) {
			clk_set_rate(i2c->clk, i2c->rate);
			pr_info("i2c: <%s> set rate to %ld\n",
				i2c->adap.name, clk_get_rate(i2c->clk));
		} else
			pr_warn("i2c: <%s> clock rate not set\n",
				i2c->adap.name);
	}

	clk_prepare_enable(i2c->clk);

	if (i2c->use_pio) {
		i2c->adap.algo = &i2c_pxa_pio_algorithm;
	} else {
		i2c->adap.algo = &i2c_pxa_algorithm;
		ret = devm_request_irq(&dev->dev, irq, i2c_pxa_handler,
				IRQF_SHARED | IRQF_NO_SUSPEND,
				dev_name(&dev->dev), i2c);
		if (ret) {
			dev_err(&dev->dev, "failed to request irq: %d\n", ret);
			goto ereqirq;
		}
	}

	i2c_pxa_reset(i2c);

	i2c->adap.algo_data = i2c;
	i2c->adap.dev.parent = &dev->dev;
#ifdef CONFIG_OF
	i2c->adap.dev.of_node = dev->dev.of_node;
#endif

	ret = i2c_add_numbered_adapter(&i2c->adap);
	if (ret < 0) {
		dev_err(&dev->dev, "failed to add bus: %d\n", ret);
		goto ereqirq;
	}

	platform_set_drvdata(dev, i2c);

#ifdef CONFIG_I2C_PXA_SLAVE
	dev_info(&i2c->adap.dev, " PXA I2C adapter, slave address %d\n",
		i2c->slave_addr);
#else
	dev_info(&i2c->adap.dev, " PXA I2C adapter\n");
#endif
	return 0;

ereqirq:
	clk_disable_unprepare(i2c->clk);
	return ret;
}

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vaibhav hiremath
vaibhav hiremath
172
22.45%
2
7.69%
russell king
russell king
168
21.93%
4
15.38%
sebastian andrzej siewior
sebastian andrzej siewior
101
13.19%
4
15.38%
haojian zhuang
haojian zhuang
95
12.40%
1
3.85%
leilei shang
leilei shang
65
8.49%
2
7.69%
guennadi liakhovetski
guennadi liakhovetski
56
7.31%
1
3.85%
mike rapoport
mike rapoport
45
5.87%
2
7.69%
enrico scholz
enrico scholz
21
2.74%
1
3.85%
douglas anderson
douglas anderson
20
2.61%
1
3.85%
wolfram sang
wolfram sang
9
1.17%
1
3.85%
jean delvare
jean delvare
4
0.52%
1
3.85%
jingoo han
jingoo han
4
0.52%
1
3.85%
daniel drake
daniel drake
2
0.26%
1
3.85%
jonathan cameron
jonathan cameron
1
0.13%
1
3.85%
eric miao
eric miao
1
0.13%
1
3.85%
linus walleij
linus walleij
1
0.13%
1
3.85%
rodolfo giometti
rodolfo giometti
1
0.13%
1
3.85%
Total
766
100.00%
26
100.00%



static int i2c_pxa_remove(struct platform_device *dev)
{
	struct pxa_i2c *i2c = platform_get_drvdata(dev);

	i2c_del_adapter(&i2c->adap);

	clk_disable_unprepare(i2c->clk);

	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
russell king
russell king
37
94.87%
3
60.00%
daniel drake
daniel drake
1
2.56%
1
20.00%
guennadi liakhovetski
guennadi liakhovetski
1
2.56%
1
20.00%
Total
39
100.00%
5
100.00%

#ifdef CONFIG_PM


static int i2c_pxa_suspend_noirq(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct pxa_i2c *i2c = platform_get_drvdata(pdev);

	clk_disable(i2c->clk);

	return 0;
}

Contributors
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russell king
russell king
28
68.29%
1
50.00%
magnus damm
magnus damm
13
31.71%
1
50.00%
Total
41
100.00%
2
100.00%



static int i2c_pxa_resume_noirq(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct pxa_i2c *i2c = platform_get_drvdata(pdev);

	clk_enable(i2c->clk);
	i2c_pxa_reset(i2c);

	return 0;
}

Contributors
Person
Tokens
Prop
Commits
CommitProp
russell king
russell king
33
71.74%
1
50.00%
magnus damm
magnus damm
13
28.26%
1
50.00%
Total
46
100.00%
2
100.00%


static const struct dev_pm_ops i2c_pxa_dev_pm_ops = {
	.suspend_noirq = i2c_pxa_suspend_noirq,
	.resume_noirq = i2c_pxa_resume_noirq,
};


#define I2C_PXA_DEV_PM_OPS (&i2c_pxa_dev_pm_ops)
#else

#define I2C_PXA_DEV_PM_OPS NULL
#endif


static struct platform_driver i2c_pxa_driver = {
	.probe		= i2c_pxa_probe,
	.remove		= i2c_pxa_remove,
	.driver		= {
		.name	= "pxa2xx-i2c",
		.pm	= I2C_PXA_DEV_PM_OPS,
		.of_match_table = i2c_pxa_dt_ids,
        },
	.id_table	= i2c_pxa_id_table,
};



static int __init i2c_adap_pxa_init(void)
{
	return platform_driver_register(&i2c_pxa_driver);
}

Contributors
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russell king
russell king
16
100.00%
2
100.00%
Total
16
100.00%
2
100.00%



static void __exit i2c_adap_pxa_exit(void)
{
	platform_driver_unregister(&i2c_pxa_driver);
}

Contributors
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russell king
russell king
13
86.67%
2
50.00%
holger schurig
holger schurig
1
6.67%
1
25.00%
wolfram sang
wolfram sang
1
6.67%
1
25.00%
Total
15
100.00%
4
100.00%

MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:pxa2xx-i2c");


subsys_initcall(i2c_adap_pxa_init);

module_exit(i2c_adap_pxa_exit);
Overall Contributors
Person
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russell king
russell king
3344
51.53%
10
15.62%
guennadi liakhovetski
guennadi liakhovetski
769
11.85%
1
1.56%
mike rapoport
mike rapoport
440
6.78%
2
3.12%
vaibhav hiremath
vaibhav hiremath
392
6.04%
4
6.25%
leilei shang
leilei shang
352
5.42%
2
3.12%
haojian zhuang
haojian zhuang
314
4.84%
1
1.56%
sebastian andrzej siewior
sebastian andrzej siewior
291
4.48%
6
9.38%
eric miao
eric miao
178
2.74%
2
3.12%
wolfram sang
wolfram sang
77
1.19%
2
3.12%
jean delvare
jean delvare
55
0.85%
4
6.25%
magnus damm
magnus damm
51
0.79%
1
1.56%
petr cvek
petr cvek
44
0.68%
1
1.56%
douglas anderson
douglas anderson
27
0.42%
1
1.56%
jiri slaby
jiri slaby
27
0.42%
1
1.56%
enrico scholz
enrico scholz
21
0.32%
1
1.56%
jonathan cameron
jonathan cameron
20
0.31%
1
1.56%
vasily khoruzhick
vasily khoruzhick
14
0.22%
2
3.12%
dmitry eremin-baryshkov
dmitry eremin-baryshkov
12
0.18%
1
1.56%
jingoo han
jingoo han
9
0.14%
2
3.12%
wang shouming
wang shouming
6
0.09%
1
1.56%
roel kluin
roel kluin
6
0.09%
2
3.12%
holger schurig
holger schurig
6
0.09%
1
1.56%
yipeng yao
yipeng yao
6
0.09%
1
1.56%
kay sievers
kay sievers
5
0.08%
1
1.56%
richard purdie
richard purdie
5
0.08%
1
1.56%
frank seidel
frank seidel
3
0.05%
1
1.56%
tejun heo
tejun heo
3
0.05%
1
1.56%
daniel drake
daniel drake
3
0.05%
1
1.56%
harvey harrison
harvey harrison
1
0.02%
1
1.56%
tobias klauser
tobias klauser
1
0.02%
1
1.56%
marc kleine-budde
marc kleine-budde
1
0.02%
1
1.56%
rodolfo giometti
rodolfo giometti
1
0.02%
1
1.56%
alexey dobriyan
alexey dobriyan
1
0.02%
1
1.56%
h hartley sweeten
h hartley sweeten
1
0.02%
1
1.56%
daniel mack
daniel mack
1
0.02%
1
1.56%
uli luckas
uli luckas
1
0.02%
1
1.56%
linus walleij
linus walleij
1
0.02%
1
1.56%
Total
6489
100.00%
64
100.00%
  
Directory: drivers/i2c/busses

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