Release 4.7 drivers/irqchip/irq-sa11x0.c
/*
* Copyright (C) 2015 Dmitry Eremin-Solenikov
* Copyright (C) 1999-2001 Nicolas Pitre
*
* Generic IRQ handling for the SA11x0.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/syscore_ops.h>
#include <linux/irqchip/irq-sa11x0.h>
#include <soc/sa1100/pwer.h>
#include <asm/exception.h>
#define ICIP 0x00
/* IC IRQ Pending reg. */
#define ICMR 0x04
/* IC Mask Reg. */
#define ICLR 0x08
/* IC Level Reg. */
#define ICCR 0x0C
/* IC Control Reg. */
#define ICFP 0x10
/* IC FIQ Pending reg. */
#define ICPR 0x20
/* IC Pending Reg. */
static void __iomem *iobase;
/*
* We don't need to ACK IRQs on the SA1100 unless they're GPIOs
* this is for internal IRQs i.e. from IRQ LCD to RTCAlrm.
*/
static void sa1100_mask_irq(struct irq_data *d)
{
u32 reg;
reg = readl_relaxed(iobase + ICMR);
reg &= ~BIT(d->hwirq);
writel_relaxed(reg, iobase + ICMR);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
dmitry eremin-baryshkov | dmitry eremin-baryshkov | 26 | 61.90% | 3 | 60.00% |
linus torvalds | linus torvalds | 10 | 23.81% | 1 | 20.00% |
lennert buytenhek | lennert buytenhek | 6 | 14.29% | 1 | 20.00% |
| Total | 42 | 100.00% | 5 | 100.00% |
static void sa1100_unmask_irq(struct irq_data *d)
{
u32 reg;
reg = readl_relaxed(iobase + ICMR);
reg |= BIT(d->hwirq);
writel_relaxed(reg, iobase + ICMR);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
dmitry eremin-baryshkov | dmitry eremin-baryshkov | 26 | 63.41% | 3 | 60.00% |
linus torvalds | linus torvalds | 9 | 21.95% | 1 | 20.00% |
lennert buytenhek | lennert buytenhek | 6 | 14.63% | 1 | 20.00% |
| Total | 41 | 100.00% | 5 | 100.00% |
static int sa1100_set_wake(struct irq_data *d, unsigned int on)
{
return sa11x0_sc_set_wake(d->hwirq, on);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
dmitry eremin-baryshkov | dmitry eremin-baryshkov | 10 | 40.00% | 3 | 60.00% |
russell king | russell king | 9 | 36.00% | 1 | 20.00% |
lennert buytenhek | lennert buytenhek | 6 | 24.00% | 1 | 20.00% |
| Total | 25 | 100.00% | 5 | 100.00% |
static struct irq_chip sa1100_normal_chip = {
.name = "SC",
.irq_ack = sa1100_mask_irq,
.irq_mask = sa1100_mask_irq,
.irq_unmask = sa1100_unmask_irq,
.irq_set_wake = sa1100_set_wake,
};
static int sa1100_normal_irqdomain_map(struct irq_domain *d,
unsigned int irq, irq_hw_number_t hwirq)
{
irq_set_chip_and_handler(irq, &sa1100_normal_chip,
handle_level_irq);
return 0;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
dmitry eremin-baryshkov | dmitry eremin-baryshkov | 31 | 100.00% | 2 | 100.00% |
| Total | 31 | 100.00% | 2 | 100.00% |
static const struct irq_domain_ops sa1100_normal_irqdomain_ops = {
.map = sa1100_normal_irqdomain_map,
.xlate = irq_domain_xlate_onetwocell,
};
static struct irq_domain *sa1100_normal_irqdomain;
static struct sa1100irq_state {
unsigned int saved;
unsigned int icmr;
unsigned int iclr;
unsigned int iccr;
}
sa1100irq_state;
static int sa1100irq_suspend(void)
{
struct sa1100irq_state *st = &sa1100irq_state;
st->saved = 1;
st->icmr = readl_relaxed(iobase + ICMR);
st->iclr = readl_relaxed(iobase + ICLR);
st->iccr = readl_relaxed(iobase + ICCR);
/*
* Disable all GPIO-based interrupts.
*/
writel_relaxed(st->icmr & 0xfffff000, iobase + ICMR);
return 0;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
russell king | russell king | 41 | 56.94% | 1 | 25.00% |
dmitry eremin-baryshkov | dmitry eremin-baryshkov | 26 | 36.11% | 1 | 25.00% |
patrick mochel | patrick mochel | 4 | 5.56% | 1 | 25.00% |
rafael j. wysocki | rafael j. wysocki | 1 | 1.39% | 1 | 25.00% |
| Total | 72 | 100.00% | 4 | 100.00% |
static void sa1100irq_resume(void)
{
struct sa1100irq_state *st = &sa1100irq_state;
if (st->saved) {
writel_relaxed(st->iccr, iobase + ICCR);
writel_relaxed(st->iclr, iobase + ICLR);
writel_relaxed(st->icmr, iobase + ICMR);
}
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
russell king | russell king | 31 | 54.39% | 1 | 25.00% |
dmitry eremin-baryshkov | dmitry eremin-baryshkov | 21 | 36.84% | 1 | 25.00% |
patrick mochel | patrick mochel | 3 | 5.26% | 1 | 25.00% |
rafael j. wysocki | rafael j. wysocki | 2 | 3.51% | 1 | 25.00% |
| Total | 57 | 100.00% | 4 | 100.00% |
static struct syscore_ops sa1100irq_syscore_ops = {
.suspend = sa1100irq_suspend,
.resume = sa1100irq_resume,
};
static int __init sa1100irq_init_devicefs(void)
{
register_syscore_ops(&sa1100irq_syscore_ops);
return 0;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
russell king | russell king | 15 | 83.33% | 1 | 50.00% |
rafael j. wysocki | rafael j. wysocki | 3 | 16.67% | 1 | 50.00% |
| Total | 18 | 100.00% | 2 | 100.00% |
device_initcall(sa1100irq_init_devicefs);
static asmlinkage void __exception_irq_entry
sa1100_handle_irq(struct pt_regs *regs)
{
uint32_t icip, icmr, mask;
do {
icip = readl_relaxed(iobase + ICIP);
icmr = readl_relaxed(iobase + ICMR);
mask = icip & icmr;
if (mask == 0)
break;
handle_domain_irq(sa1100_normal_irqdomain,
ffs(mask) - 1, regs);
} while (1);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
dmitry eremin-baryshkov | dmitry eremin-baryshkov | 73 | 100.00% | 3 | 100.00% |
| Total | 73 | 100.00% | 3 | 100.00% |
void __init sa11x0_init_irq_nodt(int irq_start, resource_size_t io_start)
{
iobase = ioremap(io_start, SZ_64K);
if (WARN_ON(!iobase))
return;
/* disable all IRQs */
writel_relaxed(0, iobase + ICMR);
/* all IRQs are IRQ, not FIQ */
writel_relaxed(0, iobase + ICLR);
/*
* Whatever the doc says, this has to be set for the wait-on-irq
* instruction to work... on a SA1100 rev 9 at least.
*/
writel_relaxed(1, iobase + ICCR);
sa1100_normal_irqdomain = irq_domain_add_simple(NULL,
32, irq_start,
&sa1100_normal_irqdomain_ops, NULL);
set_handle_irq(sa1100_handle_irq);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
dmitry eremin-baryshkov | dmitry eremin-baryshkov | 55 | 67.90% | 6 | 66.67% |
linus torvalds | linus torvalds | 22 | 27.16% | 2 | 22.22% |
russell king | russell king | 4 | 4.94% | 1 | 11.11% |
| Total | 81 | 100.00% | 9 | 100.00% |
Overall Contributors
| Person | Tokens | Prop | Commits | CommitProp |
dmitry eremin-baryshkov | dmitry eremin-baryshkov | 341 | 55.99% | 11 | 40.74% |
russell king | russell king | 158 | 25.94% | 6 | 22.22% |
linus torvalds | linus torvalds | 57 | 9.36% | 2 | 7.41% |
lennert buytenhek | lennert buytenhek | 22 | 3.61% | 1 | 3.70% |
patrick mochel | patrick mochel | 9 | 1.48% | 1 | 3.70% |
rafael j. wysocki | rafael j. wysocki | 9 | 1.48% | 1 | 3.70% |
david brownell | david brownell | 5 | 0.82% | 1 | 3.70% |
thomas gleixner | thomas gleixner | 4 | 0.66% | 1 | 3.70% |
rob herring | rob herring | 2 | 0.33% | 1 | 3.70% |
kay sievers | kay sievers | 1 | 0.16% | 1 | 3.70% |
krzysztof kozlowski | krzysztof kozlowski | 1 | 0.16% | 1 | 3.70% |
| Total | 609 | 100.00% | 27 | 100.00% |
Information contained on this website is for historical information purposes only and does not indicate or represent copyright ownership.