Release 4.7 drivers/watchdog/max63xx_wdt.c
/*
* drivers/char/watchdog/max63xx_wdt.c
*
* Driver for max63{69,70,71,72,73,74} watchdog timers
*
* Copyright (C) 2009 Marc Zyngier <maz@misterjones.org>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*
* This driver assumes the watchdog pins are memory mapped (as it is
* the case for the Arcom Zeus). Should it be connected over GPIOs or
* another interface, some abstraction will have to be introduced.
*/
#include <linux/err.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/watchdog.h>
#include <linux/bitops.h>
#include <linux/platform_device.h>
#include <linux/spinlock.h>
#include <linux/io.h>
#include <linux/slab.h>
#define DEFAULT_HEARTBEAT 60
#define MAX_HEARTBEAT 60
static unsigned int heartbeat = DEFAULT_HEARTBEAT;
static bool nowayout = WATCHDOG_NOWAYOUT;
/*
* Memory mapping: a single byte, 3 first lower bits to select bit 3
* to ping the watchdog.
*/
#define MAX6369_WDSET (7 << 0)
#define MAX6369_WDI (1 << 3)
#define MAX6369_WDSET_DISABLED 3
static int nodelay;
struct max63xx_wdt {
struct watchdog_device wdd;
const struct max63xx_timeout *timeout;
/* memory mapping */
void __iomem *base;
spinlock_t lock;
/* WDI and WSET bits write access routines */
void (*ping)(struct max63xx_wdt *wdt);
void (*set)(struct max63xx_wdt *wdt, u8 set);
};
/*
* The timeout values used are actually the absolute minimum the chip
* offers. Typical values on my board are slightly over twice as long
* (10s setting ends up with a 25s timeout), and can be up to 3 times
* the nominal setting (according to the datasheet). So please take
* these values with a grain of salt. Same goes for the initial delay
* "feature". Only max6373/74 have a few settings without this initial
* delay (selected with the "nodelay" parameter).
*
* I also decided to remove from the tables any timeout smaller than a
* second, as it looked completly overkill...
*/
/* Timeouts in second */
struct max63xx_timeout {
const u8 wdset;
const u8 tdelay;
const u8 twd;
};
static const struct max63xx_timeout max6369_table[] = {
{ 5, 1, 1 },
{ 6, 10, 10 },
{ 7, 60, 60 },
{ },
};
static const struct max63xx_timeout max6371_table[] = {
{ 6, 60, 3 },
{ 7, 60, 60 },
{ },
};
static const struct max63xx_timeout max6373_table[] = {
{ 2, 60, 1 },
{ 5, 0, 1 },
{ 1, 3, 3 },
{ 7, 60, 10 },
{ 6, 0, 10 },
{ },
};
static struct max63xx_timeout *
max63xx_select_timeout(struct max63xx_timeout *table, int value)
{
while (table->twd) {
if (value <= table->twd) {
if (nodelay && table->tdelay == 0)
return table;
if (!nodelay)
return table;
}
table++;
}
return NULL;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
marc zyngier | marc zyngier | 61 | 100.00% | 1 | 100.00% |
| Total | 61 | 100.00% | 1 | 100.00% |
static int max63xx_wdt_ping(struct watchdog_device *wdd)
{
struct max63xx_wdt *wdt = watchdog_get_drvdata(wdd);
wdt->ping(wdt);
return 0;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
vivien didelot | vivien didelot | 12 | 38.71% | 1 | 33.33% |
marc zyngier | marc zyngier | 11 | 35.48% | 1 | 33.33% |
axel lin | axel lin | 8 | 25.81% | 1 | 33.33% |
| Total | 31 | 100.00% | 3 | 100.00% |
static int max63xx_wdt_start(struct watchdog_device *wdd)
{
struct max63xx_wdt *wdt = watchdog_get_drvdata(wdd);
wdt->set(wdt, wdt->timeout->wdset);
/* check for a edge triggered startup */
if (wdt->timeout->tdelay == 0)
wdt->ping(wdt);
return 0;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
marc zyngier | marc zyngier | 21 | 38.18% | 1 | 33.33% |
vivien didelot | vivien didelot | 17 | 30.91% | 1 | 33.33% |
axel lin | axel lin | 17 | 30.91% | 1 | 33.33% |
| Total | 55 | 100.00% | 3 | 100.00% |
static int max63xx_wdt_stop(struct watchdog_device *wdd)
{
struct max63xx_wdt *wdt = watchdog_get_drvdata(wdd);
wdt->set(wdt, MAX6369_WDSET_DISABLED);
return 0;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
marc zyngier | marc zyngier | 14 | 42.42% | 2 | 50.00% |
vivien didelot | vivien didelot | 13 | 39.39% | 1 | 25.00% |
axel lin | axel lin | 6 | 18.18% | 1 | 25.00% |
| Total | 33 | 100.00% | 4 | 100.00% |
static const struct watchdog_ops max63xx_wdt_ops = {
.owner = THIS_MODULE,
.start = max63xx_wdt_start,
.stop = max63xx_wdt_stop,
.ping = max63xx_wdt_ping,
};
static const struct watchdog_info max63xx_wdt_info = {
.options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
.identity = "max63xx Watchdog",
};
static void max63xx_mmap_ping(struct max63xx_wdt *wdt)
{
u8 val;
spin_lock(&wdt->lock);
val = __raw_readb(wdt->base);
__raw_writeb(val | MAX6369_WDI, wdt->base);
__raw_writeb(val & ~MAX6369_WDI, wdt->base);
spin_unlock(&wdt->lock);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
vivien didelot | vivien didelot | 51 | 82.26% | 1 | 50.00% |
marc zyngier | marc zyngier | 11 | 17.74% | 1 | 50.00% |
| Total | 62 | 100.00% | 2 | 100.00% |
static void max63xx_mmap_set(struct max63xx_wdt *wdt, u8 set)
{
u8 val;
spin_lock(&wdt->lock);
val = __raw_readb(wdt->base);
val &= ~MAX6369_WDSET;
val |= set & MAX6369_WDSET;
__raw_writeb(val, wdt->base);
spin_unlock(&wdt->lock);
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
vivien didelot | vivien didelot | 62 | 100.00% | 1 | 100.00% |
| Total | 62 | 100.00% | 1 | 100.00% |
static int max63xx_mmap_init(struct platform_device *p, struct max63xx_wdt *wdt)
{
struct resource *mem = platform_get_resource(p, IORESOURCE_MEM, 0);
wdt->base = devm_ioremap_resource(&p->dev, mem);
if (IS_ERR(wdt->base))
return PTR_ERR(wdt->base);
spin_lock_init(&wdt->lock);
wdt->ping = max63xx_mmap_ping;
wdt->set = max63xx_mmap_set;
return 0;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
vivien didelot | vivien didelot | 84 | 100.00% | 1 | 100.00% |
| Total | 84 | 100.00% | 1 | 100.00% |
static int max63xx_wdt_probe(struct platform_device *pdev)
{
struct max63xx_wdt *wdt;
struct max63xx_timeout *table;
int err;
wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
if (!wdt)
return -ENOMEM;
table = (struct max63xx_timeout *)pdev->id_entry->driver_data;
if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT)
heartbeat = DEFAULT_HEARTBEAT;
wdt->timeout = max63xx_select_timeout(table, heartbeat);
if (!wdt->timeout) {
dev_err(&pdev->dev, "unable to satisfy %ds heartbeat request\n",
heartbeat);
return -EINVAL;
}
err = max63xx_mmap_init(pdev, wdt);
if (err)
return err;
platform_set_drvdata(pdev, &wdt->wdd);
watchdog_set_drvdata(&wdt->wdd, wdt);
wdt->wdd.parent = &pdev->dev;
wdt->wdd.timeout = wdt->timeout->twd;
wdt->wdd.info = &max63xx_wdt_info;
wdt->wdd.ops = &max63xx_wdt_ops;
watchdog_set_nowayout(&wdt->wdd, nowayout);
err = watchdog_register_device(&wdt->wdd);
if (err)
return err;
dev_info(&pdev->dev, "using %ds heartbeat with %ds initial delay\n",
wdt->timeout->twd, wdt->timeout->tdelay);
return 0;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
vivien didelot | vivien didelot | 165 | 67.90% | 1 | 33.33% |
marc zyngier | marc zyngier | 64 | 26.34% | 1 | 33.33% |
axel lin | axel lin | 14 | 5.76% | 1 | 33.33% |
| Total | 243 | 100.00% | 3 | 100.00% |
static int max63xx_wdt_remove(struct platform_device *pdev)
{
struct watchdog_device *wdd = platform_get_drvdata(pdev);
watchdog_unregister_device(wdd);
return 0;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
marc zyngier | marc zyngier | 17 | 58.62% | 1 | 33.33% |
vivien didelot | vivien didelot | 11 | 37.93% | 1 | 33.33% |
axel lin | axel lin | 1 | 3.45% | 1 | 33.33% |
| Total | 29 | 100.00% | 3 | 100.00% |
static const struct platform_device_id max63xx_id_table[] = {
{ "max6369_wdt", (kernel_ulong_t)max6369_table, },
{ "max6370_wdt", (kernel_ulong_t)max6369_table, },
{ "max6371_wdt", (kernel_ulong_t)max6371_table, },
{ "max6372_wdt", (kernel_ulong_t)max6371_table, },
{ "max6373_wdt", (kernel_ulong_t)max6373_table, },
{ "max6374_wdt", (kernel_ulong_t)max6373_table, },
{ },
};
MODULE_DEVICE_TABLE(platform, max63xx_id_table);
static struct platform_driver max63xx_wdt_driver = {
.probe = max63xx_wdt_probe,
.remove = max63xx_wdt_remove,
.id_table = max63xx_id_table,
.driver = {
.name = "max63xx_wdt",
},
};
module_platform_driver(max63xx_wdt_driver);
MODULE_AUTHOR("Marc Zyngier <maz@misterjones.org>");
MODULE_DESCRIPTION("max63xx Watchdog Driver");
module_param(heartbeat, int, 0);
MODULE_PARM_DESC(heartbeat,
"Watchdog heartbeat period in seconds from 1 to "
__MODULE_STRING(MAX_HEARTBEAT) ", default "
__MODULE_STRING(DEFAULT_HEARTBEAT));
module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
module_param(nodelay, int, 0);
MODULE_PARM_DESC(nodelay,
"Force selection of a timeout setting without initial delay "
"(max6373/74 only, default=0)");
MODULE_LICENSE("GPL v2");
Overall Contributors
| Person | Tokens | Prop | Commits | CommitProp |
marc zyngier | marc zyngier | 604 | 52.48% | 2 | 20.00% |
vivien didelot | vivien didelot | 482 | 41.88% | 1 | 10.00% |
axel lin | axel lin | 57 | 4.95% | 2 | 20.00% |
thierry reding | thierry reding | 3 | 0.26% | 1 | 10.00% |
wim van sebroeck | wim van sebroeck | 2 | 0.17% | 1 | 10.00% |
uwe kleine-koenig | uwe kleine-koenig | 1 | 0.09% | 1 | 10.00% |
krzysztof kozlowski | krzysztof kozlowski | 1 | 0.09% | 1 | 10.00% |
tejun heo | tejun heo | 1 | 0.09% | 1 | 10.00% |
| Total | 1151 | 100.00% | 10 | 100.00% |
Information contained on this website is for historical information purposes only and does not indicate or represent copyright ownership.