cregit-Linux how code gets into the kernel

Release 4.7 include/uapi/linux/i2c.h

/* ------------------------------------------------------------------------- */
/*                                                                           */
/* i2c.h - definitions for the i2c-bus interface                             */
/*                                                                           */
/* ------------------------------------------------------------------------- */
/*   Copyright (C) 1995-2000 Simon G. Vogl

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
    MA 02110-1301 USA.                                                       */
/* ------------------------------------------------------------------------- */

/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and
   Frodo Looijaard <frodol@dds.nl> */

#ifndef _UAPI_LINUX_I2C_H

#define _UAPI_LINUX_I2C_H

#include <linux/types.h>

/**
 * struct i2c_msg - an I2C transaction segment beginning with START
 * @addr: Slave address, either seven or ten bits.  When this is a ten
 *      bit address, I2C_M_TEN must be set in @flags and the adapter
 *      must support I2C_FUNC_10BIT_ADDR.
 * @flags: I2C_M_RD is handled by all adapters.  No other flags may be
 *      provided unless the adapter exported the relevant I2C_FUNC_*
 *      flags through i2c_check_functionality().
 * @len: Number of data bytes in @buf being read from or written to the
 *      I2C slave address.  For read transactions where I2C_M_RECV_LEN
 *      is set, the caller guarantees that this buffer can hold up to
 *      32 bytes in addition to the initial length byte sent by the
 *      slave (plus, if used, the SMBus PEC); and this value will be
 *      incremented by the number of block data bytes received.
 * @buf: The buffer into which data is read, or from which it's written.
 *
 * An i2c_msg is the low level representation of one segment of an I2C
 * transaction.  It is visible to drivers in the @i2c_transfer() procedure,
 * to userspace from i2c-dev, and to I2C adapter drivers through the
 * @i2c_adapter.@master_xfer() method.
 *
 * Except when I2C "protocol mangling" is used, all I2C adapters implement
 * the standard rules for I2C transactions.  Each transaction begins with a
 * START.  That is followed by the slave address, and a bit encoding read
 * versus write.  Then follow all the data bytes, possibly including a byte
 * with SMBus PEC.  The transfer terminates with a NAK, or when all those
 * bytes have been transferred and ACKed.  If this is the last message in a
 * group, it is followed by a STOP.  Otherwise it is followed by the next
 * @i2c_msg transaction segment, beginning with a (repeated) START.
 *
 * Alternatively, when the adapter supports I2C_FUNC_PROTOCOL_MANGLING then
 * passing certain @flags may have changed those standard protocol behaviors.
 * Those flags are only for use with broken/nonconforming slaves, and with
 * adapters which are known to support the specific mangling options they
 * need (one or more of IGNORE_NAK, NO_RD_ACK, NOSTART, and REV_DIR_ADDR).
 */

struct i2c_msg {
	
__u16 addr;	/* slave address                        */
	
__u16 flags;

#define I2C_M_RD		0x0001	/* read data, from slave to master */
					/* I2C_M_RD is guaranteed to be 0x0001! */

#define I2C_M_TEN		0x0010	/* this is a ten bit chip address */

#define I2C_M_RECV_LEN		0x0400	/* length will be first received byte */

#define I2C_M_NO_RD_ACK		0x0800	/* if I2C_FUNC_PROTOCOL_MANGLING */

#define I2C_M_IGNORE_NAK	0x1000	/* if I2C_FUNC_PROTOCOL_MANGLING */

#define I2C_M_REV_DIR_ADDR	0x2000	/* if I2C_FUNC_PROTOCOL_MANGLING */

#define I2C_M_NOSTART		0x4000	/* if I2C_FUNC_NOSTART */

#define I2C_M_STOP		0x8000	/* if I2C_FUNC_PROTOCOL_MANGLING */
	
__u16 len;		/* msg length                           */
	
__u8 *buf;		/* pointer to msg data                  */
};

/* To determine what functionality is present */


#define I2C_FUNC_I2C			0x00000001

#define I2C_FUNC_10BIT_ADDR		0x00000002

#define I2C_FUNC_PROTOCOL_MANGLING	0x00000004 
/* I2C_M_IGNORE_NAK etc. */

#define I2C_FUNC_SMBUS_PEC		0x00000008

#define I2C_FUNC_NOSTART		0x00000010 
/* I2C_M_NOSTART */

#define I2C_FUNC_SLAVE			0x00000020

#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL	0x00008000 
/* SMBus 2.0 */

#define I2C_FUNC_SMBUS_QUICK		0x00010000

#define I2C_FUNC_SMBUS_READ_BYTE	0x00020000

#define I2C_FUNC_SMBUS_WRITE_BYTE	0x00040000

#define I2C_FUNC_SMBUS_READ_BYTE_DATA	0x00080000

#define I2C_FUNC_SMBUS_WRITE_BYTE_DATA	0x00100000

#define I2C_FUNC_SMBUS_READ_WORD_DATA	0x00200000

#define I2C_FUNC_SMBUS_WRITE_WORD_DATA	0x00400000

#define I2C_FUNC_SMBUS_PROC_CALL	0x00800000

#define I2C_FUNC_SMBUS_READ_BLOCK_DATA	0x01000000

#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000

#define I2C_FUNC_SMBUS_READ_I2C_BLOCK	0x04000000 
/* I2C-like block xfer  */

#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK	0x08000000 
/* w/ 1-byte reg. addr. */


#define I2C_FUNC_SMBUS_BYTE		(I2C_FUNC_SMBUS_READ_BYTE | \
                                         I2C_FUNC_SMBUS_WRITE_BYTE)

#define I2C_FUNC_SMBUS_BYTE_DATA	(I2C_FUNC_SMBUS_READ_BYTE_DATA | \
                                         I2C_FUNC_SMBUS_WRITE_BYTE_DATA)

#define I2C_FUNC_SMBUS_WORD_DATA	(I2C_FUNC_SMBUS_READ_WORD_DATA | \
                                         I2C_FUNC_SMBUS_WRITE_WORD_DATA)

#define I2C_FUNC_SMBUS_BLOCK_DATA	(I2C_FUNC_SMBUS_READ_BLOCK_DATA | \
                                         I2C_FUNC_SMBUS_WRITE_BLOCK_DATA)

#define I2C_FUNC_SMBUS_I2C_BLOCK	(I2C_FUNC_SMBUS_READ_I2C_BLOCK | \
                                         I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)


#define I2C_FUNC_SMBUS_EMUL		(I2C_FUNC_SMBUS_QUICK | \
                                         I2C_FUNC_SMBUS_BYTE | \
                                         I2C_FUNC_SMBUS_BYTE_DATA | \
                                         I2C_FUNC_SMBUS_WORD_DATA | \
                                         I2C_FUNC_SMBUS_PROC_CALL | \
                                         I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | \
                                         I2C_FUNC_SMBUS_I2C_BLOCK | \
                                         I2C_FUNC_SMBUS_PEC)

/*
 * Data for SMBus Messages
 */

#define I2C_SMBUS_BLOCK_MAX	32	
/* As specified in SMBus standard */

union i2c_smbus_data {
	
__u8 byte;
	
__u16 word;
	
__u8 block[I2C_SMBUS_BLOCK_MAX + 2]; /* block[0] is used for length */
			       /* and one more for user-space compatibility */
};

/* i2c_smbus_xfer read or write markers */

#define I2C_SMBUS_READ	1

#define I2C_SMBUS_WRITE	0

/* SMBus transaction types (size parameter in the above functions)
   Note: these no longer correspond to the (arbitrary) PIIX4 internal codes! */

#define I2C_SMBUS_QUICK		    0

#define I2C_SMBUS_BYTE		    1

#define I2C_SMBUS_BYTE_DATA	    2

#define I2C_SMBUS_WORD_DATA	    3

#define I2C_SMBUS_PROC_CALL	    4

#define I2C_SMBUS_BLOCK_DATA	    5

#define I2C_SMBUS_I2C_BLOCK_BROKEN  6

#define I2C_SMBUS_BLOCK_PROC_CALL   7		
/* SMBus 2.0 */

#define I2C_SMBUS_I2C_BLOCK_DATA    8

#endif /* _UAPI_LINUX_I2C_H */

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