Release 4.9 arch/arm/mach-iop32x/include/mach/uncompress.h
/*
* arch/arm/mach-iop32x/include/mach/uncompress.h
*/
#include <asm/types.h>
#include <asm/mach-types.h>
#include <linux/serial_reg.h>
#include <mach/hardware.h>
volatile u8 *uart_base;
#define TX_DONE (UART_LSR_TEMT | UART_LSR_THRE)
static inline void putc(char c)
{
while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE)
barrier();
uart_base[UART_TX] = c;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
linus torvalds | linus torvalds | 21 | 63.64% | 1 | 25.00% |
dave jiang | dave jiang | 5 | 15.15% | 1 | 25.00% |
russell king | russell king | 4 | 12.12% | 1 | 25.00% |
lennert buytenhek | lennert buytenhek | 3 | 9.09% | 1 | 25.00% |
| Total | 33 | 100.00% | 4 | 100.00% |
static inline void flush(void)
{
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
linus torvalds | linus torvalds | 4 | 50.00% | 1 | 50.00% |
russell king | russell king | 4 | 50.00% | 1 | 50.00% |
| Total | 8 | 100.00% | 2 | 100.00% |
static __inline__ void __arch_decomp_setup(unsigned long arch_id)
{
if (machine_is_iq80321())
uart_base = (volatile u8 *)IQ80321_UART;
else if (machine_is_iq31244() || machine_is_em7210())
uart_base = (volatile u8 *)IQ31244_UART;
else
uart_base = (volatile u8 *)0xfe800000;
}
Contributors
| Person | Tokens | Prop | Commits | CommitProp |
dave jiang | dave jiang | 44 | 83.02% | 1 | 33.33% |
lennert buytenhek | lennert buytenhek | 6 | 11.32% | 1 | 33.33% |
arnaud patard | arnaud patard | 3 | 5.66% | 1 | 33.33% |
| Total | 53 | 100.00% | 3 | 100.00% |
/*
* nothing to do
*/
#define arch_decomp_setup() __arch_decomp_setup(arch_id)
Overall Contributors
| Person | Tokens | Prop | Commits | CommitProp |
dave jiang | dave jiang | 62 | 50.82% | 1 | 11.11% |
linus torvalds | linus torvalds | 30 | 24.59% | 1 | 11.11% |
russell king | russell king | 12 | 9.84% | 3 | 33.33% |
lennert buytenhek | lennert buytenhek | 12 | 9.84% | 2 | 22.22% |
eli carter | eli carter | 3 | 2.46% | 1 | 11.11% |
arnaud patard | arnaud patard | 3 | 2.46% | 1 | 11.11% |
| Total | 122 | 100.00% | 9 | 100.00% |