#ifndef __ARCH_ARM_FAULT_H #define __ARCH_ARM_FAULT_H /* * Fault status register encodings. We steal bit 31 for our own purposes. */ #define FSR_LNX_PF (1 << 31) #define FSR_WRITE (1 << 11) #define FSR_FS4 (1 << 10) #define FSR_FS3_0 (15) #define FSR_FS5_0 (0x3f) #ifdef CONFIG_ARM_LPAE
static inline int fsr_fs(unsigned int fsr) { return fsr & FSR_FS5_0; }Contributors
Person | Tokens | Prop | Commits | CommitProp | |
catalin marinas | catalin marinas | 16 | 100.00% | 1 | 100.00% |
Total | 16 | 100.00% | 1 | 100.00% |
Person | Tokens | Prop | Commits | CommitProp | |
catalin marinas | catalin marinas | 26 | 100.00% | 1 | 100.00% |
Total | 26 | 100.00% | 1 | 100.00% |
Person | Tokens | Prop | Commits | CommitProp | |
catalin marinas | catalin marinas | 79 | 77.45% | 2 | 50.00% |
russell king | russell king | 17 | 16.67% | 1 | 25.00% |
lucas stach | lucas stach | 6 | 5.88% | 1 | 25.00% |
Total | 102 | 100.00% | 4 | 100.00% |