/* * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ #ifndef __NVKM_SECBOOT_ACR_R370_H__ #define __NVKM_SECBOOT_ACR_R370_H__ #include "priv.h" struct hsf_load_header; /* Same as acr_r361_flcn_bl_desc, plus argc/argv */ struct acr_r370_flcn_bl_desc { u32 reserved[4]; u32 signature[4]; u32 ctx_dma; struct flcn_u64 code_dma_base; u32 non_sec_code_off; u32 non_sec_code_size; u32 sec_code_off; u32 sec_code_size; u32 code_entry_point; struct flcn_u64 data_dma_base; u32 data_size; u32 argc; u32 argv; }; void acr_r370_generate_hs_bl_desc(const struct hsf_load_header *, void *, u64); extern const struct acr_r352_ls_func acr_r370_ls_fecs_func; extern const struct acr_r352_ls_func acr_r370_ls_gpccs_func; #endif