| Author | Tokens | Token Proportion | Commits | Commit Proportion |
|---|---|---|---|---|
| Ben Hutchings | 10473 | 64.29% | 153 | 53.50% |
| Edward Cree | 1890 | 11.60% | 24 | 8.39% |
| Jon Cooper | 1204 | 7.39% | 12 | 4.20% |
| Bert Kenward | 649 | 3.98% | 12 | 4.20% |
| Alexandre Rames | 491 | 3.01% | 6 | 2.10% |
| Shradha Shah | 391 | 2.40% | 9 | 3.15% |
| Andrew Rybchenko | 317 | 1.95% | 5 | 1.75% |
| Steve Hodgson | 276 | 1.69% | 12 | 4.20% |
| Daniel Pieczko | 187 | 1.15% | 7 | 2.45% |
| Peter Dunning | 80 | 0.49% | 2 | 0.70% |
| Stuart Hodgson | 72 | 0.44% | 4 | 1.40% |
| Stephen Hemminger | 64 | 0.39% | 5 | 1.75% |
| Neil Turton | 45 | 0.28% | 1 | 0.35% |
| Alexander Gordeev | 28 | 0.17% | 1 | 0.35% |
| Rusty Russell | 24 | 0.15% | 2 | 0.70% |
| Mateusz Wrzesinski | 20 | 0.12% | 1 | 0.35% |
| Martin Habets | 16 | 0.10% | 1 | 0.35% |
| David S. Miller | 14 | 0.09% | 3 | 1.05% |
| Eric Dumazet | 9 | 0.06% | 3 | 1.05% |
| Benoit Taine | 6 | 0.04% | 1 | 0.35% |
| Kees Cook | 4 | 0.02% | 1 | 0.35% |
| Jiri Pirko | 4 | 0.02% | 2 | 0.70% |
| Tejun Heo | 3 | 0.02% | 1 | 0.35% |
| Wilfried Klaebe | 3 | 0.02% | 1 | 0.35% |
| Mike Travis | 3 | 0.02% | 1 | 0.35% |
| Mark Rutland | 2 | 0.01% | 1 | 0.35% |
| Lance Roy | 1 | 0.01% | 1 | 0.35% |
| Johannes Berg | 1 | 0.01% | 1 | 0.35% |
| Benjamin Herrenschmidt | 1 | 0.01% | 1 | 0.35% |
| Fengguang Wu | 1 | 0.01% | 1 | 0.35% |
| Joe Perches | 1 | 0.01% | 1 | 0.35% |
| Danny Kukawka | 1 | 0.01% | 1 | 0.35% |
| Christoph Hellwig | 1 | 0.01% | 1 | 0.35% |
| Colin Ian King | 1 | 0.01% | 1 | 0.35% |
| Michał Mirosław | 1 | 0.01% | 1 | 0.35% |
| Bartosz Golaszewski | 1 | 0.01% | 1 | 0.35% |
| Russell King | 1 | 0.01% | 1 | 0.35% |
| Dan Carpenter | 1 | 0.01% | 1 | 0.35% |
| Wei Yongjun | 1 | 0.01% | 1 | 0.35% |
| Li Zefan | 1 | 0.01% | 1 | 0.35% |
| Julia Lawall | 1 | 0.01% | 1 | 0.35% |
| Total | 16290 | 286 |
/**************************************************************************** * Driver for Solarflare network controllers and boards * Copyright 2005-2006 Fen Systems Ltd. * Copyright 2005-2013 Solarflare Communications Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published * by the Free Software Foundation, incorporated herein by reference. */ #include <linux/module.h> #include <linux/pci.h> #include <linux/netdevice.h> #include <linux/etherdevice.h> #include <linux/delay.h> #include <linux/notifier.h> #include <linux/ip.h> #include <linux/tcp.h> #include <linux/in.h> #include <linux/ethtool.h> #include <linux/topology.h> #include <linux/gfp.h> #include <linux/aer.h> #include <linux/interrupt.h> #include "net_driver.h" #include <net/gre.h> #include <net/udp_tunnel.h> #include "efx.h" #include "nic.h" #include "io.h" #include "selftest.h" #include "sriov.h" #include "mcdi.h" #include "mcdi_pcol.h" #include "workarounds.h" /************************************************************************** * * Type name strings * ************************************************************************** */ /* Loopback mode names (see LOOPBACK_MODE()) */ const unsigned int efx_loopback_mode_max = LOOPBACK_MAX; const char *const efx_loopback_mode_names[] = { [LOOPBACK_NONE] = "NONE", [LOOPBACK_DATA] = "DATAPATH", [LOOPBACK_GMAC] = "GMAC", [LOOPBACK_XGMII] = "XGMII", [LOOPBACK_XGXS] = "XGXS", [LOOPBACK_XAUI] = "XAUI", [LOOPBACK_GMII] = "GMII", [LOOPBACK_SGMII] = "SGMII", [LOOPBACK_XGBR] = "XGBR", [LOOPBACK_XFI] = "XFI", [LOOPBACK_XAUI_FAR] = "XAUI_FAR", [LOOPBACK_GMII_FAR] = "GMII_FAR", [LOOPBACK_SGMII_FAR] = "SGMII_FAR", [LOOPBACK_XFI_FAR] = "XFI_FAR", [LOOPBACK_GPHY] = "GPHY", [LOOPBACK_PHYXS] = "PHYXS", [LOOPBACK_PCS] = "PCS", [LOOPBACK_PMAPMD] = "PMA/PMD", [LOOPBACK_XPORT] = "XPORT", [LOOPBACK_XGMII_WS] = "XGMII_WS", [LOOPBACK_XAUI_WS] = "XAUI_WS", [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR", [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR", [LOOPBACK_GMII_WS] = "GMII_WS", [LOOPBACK_XFI_WS] = "XFI_WS", [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR", [LOOPBACK_PHYXS_WS] = "PHYXS_WS", }; const unsigned int efx_reset_type_max = RESET_TYPE_MAX; const char *const efx_reset_type_names[] = { [RESET_TYPE_INVISIBLE] = "INVISIBLE", [RESET_TYPE_ALL] = "ALL", [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL", [RESET_TYPE_WORLD] = "WORLD", [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE", [RESET_TYPE_DATAPATH] = "DATAPATH", [RESET_TYPE_MC_BIST] = "MC_BIST", [RESET_TYPE_DISABLE] = "DISABLE", [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG", [RESET_TYPE_INT_ERROR] = "INT_ERROR", [RESET_TYPE_DMA_ERROR] = "DMA_ERROR", [RESET_TYPE_TX_SKIP] = "TX_SKIP", [RESET_TYPE_MC_FAILURE] = "MC_FAILURE", [RESET_TYPE_MCDI_TIMEOUT] = "MCDI_TIMEOUT (FLR)", }; /* UDP tunnel type names */ static const char *const efx_udp_tunnel_type_names[] = { [TUNNEL_ENCAP_UDP_PORT_ENTRY_VXLAN] = "vxlan", [TUNNEL_ENCAP_UDP_PORT_ENTRY_GENEVE] = "geneve", }; void efx_get_udp_tunnel_type_name(u16 type, char *buf, size_t buflen) { if (type < ARRAY_SIZE(efx_udp_tunnel_type_names) && efx_udp_tunnel_type_names[type] != NULL) snprintf(buf, buflen, "%s", efx_udp_tunnel_type_names[type]); else snprintf(buf, buflen, "type %d", type); } /* Reset workqueue. If any NIC has a hardware failure then a reset will be * queued onto this work queue. This is not a per-nic work queue, because * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised. */ static struct workqueue_struct *reset_workqueue; /* How often and how many times to poll for a reset while waiting for a * BIST that another function started to complete. */ #define BIST_WAIT_DELAY_MS 100 #define BIST_WAIT_DELAY_COUNT 100 /************************************************************************** * * Configurable values * *************************************************************************/ /* * Use separate channels for TX and RX events * * Set this to 1 to use separate channels for TX and RX. It allows us * to control interrupt affinity separately for TX and RX. * * This is only used in MSI-X interrupt mode */ bool efx_separate_tx_channels; module_param(efx_separate_tx_channels, bool, 0444); MODULE_PARM_DESC(efx_separate_tx_channels, "Use separate channels for TX and RX"); /* This is the weight assigned to each of the (per-channel) virtual * NAPI devices. */ static int napi_weight = 64; /* This is the time (in jiffies) between invocations of the hardware * monitor. * On Falcon-based NICs, this will: * - Check the on-board hardware monitor; * - Poll the link state and reconfigure the hardware as necessary. * On Siena-based NICs for power systems with EEH support, this will give EEH a * chance to start. */ static unsigned int efx_monitor_interval = 1 * HZ; /* Initial interrupt moderation settings. They can be modified after * module load with ethtool. * * The default for RX should strike a balance between increasing the * round-trip latency and reducing overhead. */ static unsigned int rx_irq_mod_usec = 60; /* Initial interrupt moderation settings. They can be modified after * module load with ethtool. * * This default is chosen to ensure that a 10G link does not go idle * while a TX queue is stopped after it has become full. A queue is * restarted when it drops below half full. The time this takes (assuming * worst case 3 descriptors per packet and 1024 descriptors) is * 512 / 3 * 1.2 = 205 usec. */ static unsigned int tx_irq_mod_usec = 150; /* This is the first interrupt mode to try out of: * 0 => MSI-X * 1 => MSI * 2 => legacy */ static unsigned int interrupt_mode; /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS), * i.e. the number of CPUs among which we may distribute simultaneous * interrupt handling. * * Cards without MSI-X will only target one CPU via legacy or MSI interrupt. * The default (0) means to assign an interrupt to each core. */ static unsigned int rss_cpus; module_param(rss_cpus, uint, 0444); MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling"); static bool phy_flash_cfg; module_param(phy_flash_cfg, bool, 0644); MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially"); static unsigned irq_adapt_low_thresh = 8000; module_param(irq_adapt_low_thresh, uint, 0644); MODULE_PARM_DESC(irq_adapt_low_thresh, "Threshold score for reducing IRQ moderation"); static unsigned irq_adapt_high_thresh = 16000; module_param(irq_adapt_high_thresh, uint, 0644); MODULE_PARM_DESC(irq_adapt_high_thresh, "Threshold score for increasing IRQ moderation"); static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP | NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR | NETIF_MSG_HW); module_param(debug, uint, 0); MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value"); /************************************************************************** * * Utility functions and prototypes * *************************************************************************/ static int efx_soft_enable_interrupts(struct efx_nic *efx); static void efx_soft_disable_interrupts(struct efx_nic *efx); static void efx_remove_channel(struct efx_channel *channel); static void efx_remove_channels(struct efx_nic *efx); static const struct efx_channel_type efx_default_channel_type; static void efx_remove_port(struct efx_nic *efx); static void efx_init_napi_channel(struct efx_channel *channel); static void efx_fini_napi(struct efx_nic *efx); static void efx_fini_napi_channel(struct efx_channel *channel); static void efx_fini_struct(struct efx_nic *efx); static void efx_start_all(struct efx_nic *efx); static void efx_stop_all(struct efx_nic *efx); #define EFX_ASSERT_RESET_SERIALISED(efx) \ do { \ if ((efx->state == STATE_READY) || \ (efx->state == STATE_RECOVERY) || \ (efx->state == STATE_DISABLED)) \ ASSERT_RTNL(); \ } while (0) static int efx_check_disabled(struct efx_nic *efx) { if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) { netif_err(efx, drv, efx->net_dev, "device is disabled due to earlier errors\n"); return -EIO; } return 0; } /************************************************************************** * * Event queue processing * *************************************************************************/ /* Process channel's event queue * * This function is responsible for processing the event queue of a * single channel. The caller must guarantee that this function will * never be concurrently called more than once on the same channel, * though different channels may be being processed concurrently. */ static int efx_process_channel(struct efx_channel *channel, int budget) { struct efx_tx_queue *tx_queue; struct list_head rx_list; int spent; if (unlikely(!channel->enabled)) return 0; /* Prepare the batch receive list */ EFX_WARN_ON_PARANOID(channel->rx_list != NULL); INIT_LIST_HEAD(&rx_list); channel->rx_list = &rx_list; efx_for_each_channel_tx_queue(tx_queue, channel) { tx_queue->pkts_compl = 0; tx_queue->bytes_compl = 0; } spent = efx_nic_process_eventq(channel, budget); if (spent && efx_channel_has_rx_queue(channel)) { struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel); efx_rx_flush_packet(channel); efx_fast_push_rx_descriptors(rx_queue, true); } /* Update BQL */ efx_for_each_channel_tx_queue(tx_queue, channel) { if (tx_queue->bytes_compl) { netdev_tx_completed_queue(tx_queue->core_txq, tx_queue->pkts_compl, tx_queue->bytes_compl); } } /* Receive any packets we queued up */ netif_receive_skb_list(channel->rx_list); channel->rx_list = NULL; return spent; } /* NAPI poll handler * * NAPI guarantees serialisation of polls of the same device, which * provides the guarantee required by efx_process_channel(). */ static void efx_update_irq_mod(struct efx_nic *efx, struct efx_channel *channel) { int step = efx->irq_mod_step_us; if (channel->irq_mod_score < irq_adapt_low_thresh) { if (channel->irq_moderation_us > step) { channel->irq_moderation_us -= step; efx->type->push_irq_moderation(channel); } } else if (channel->irq_mod_score > irq_adapt_high_thresh) { if (channel->irq_moderation_us < efx->irq_rx_moderation_us) { channel->irq_moderation_us += step; efx->type->push_irq_moderation(channel); } } channel->irq_count = 0; channel->irq_mod_score = 0; } static int efx_poll(struct napi_struct *napi, int budget) { struct efx_channel *channel = container_of(napi, struct efx_channel, napi_str); struct efx_nic *efx = channel->efx; int spent; netif_vdbg(efx, intr, efx->net_dev, "channel %d NAPI poll executing on CPU %d\n", channel->channel, raw_smp_processor_id()); spent = efx_process_channel(channel, budget); if (spent < budget) { if (efx_channel_has_rx_queue(channel) && efx->irq_rx_adaptive && unlikely(++channel->irq_count == 1000)) { efx_update_irq_mod(efx, channel); } #ifdef CONFIG_RFS_ACCEL /* Perhaps expire some ARFS filters */ schedule_work(&channel->filter_work); #endif /* There is no race here; although napi_disable() will * only wait for napi_complete(), this isn't a problem * since efx_nic_eventq_read_ack() will have no effect if * interrupts have already been disabled. */ if (napi_complete_done(napi, spent)) efx_nic_eventq_read_ack(channel); } return spent; } /* Create event queue * Event queue memory allocations are done only once. If the channel * is reset, the memory buffer will be reused; this guards against * errors during channel reset and also simplifies interrupt handling. */ static int efx_probe_eventq(struct efx_channel *channel) { struct efx_nic *efx = channel->efx; unsigned long entries; netif_dbg(efx, probe, efx->net_dev, "chan %d create event queue\n", channel->channel); /* Build an event queue with room for one event per tx and rx buffer, * plus some extra for link state events and MCDI completions. */ entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128); EFX_WARN_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE); channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1; return efx_nic_probe_eventq(channel); } /* Prepare channel's event queue */ static int efx_init_eventq(struct efx_channel *channel) { struct efx_nic *efx = channel->efx; int rc; EFX_WARN_ON_PARANOID(channel->eventq_init); netif_dbg(efx, drv, efx->net_dev, "chan %d init event queue\n", channel->channel); rc = efx_nic_init_eventq(channel); if (rc == 0) { efx->type->push_irq_moderation(channel); channel->eventq_read_ptr = 0; channel->eventq_init = true; } return rc; } /* Enable event queue processing and NAPI */ void efx_start_eventq(struct efx_channel *channel) { netif_dbg(channel->efx, ifup, channel->efx->net_dev, "chan %d start event queue\n", channel->channel); /* Make sure the NAPI handler sees the enabled flag set */ channel->enabled = true; smp_wmb(); napi_enable(&channel->napi_str); efx_nic_eventq_read_ack(channel); } /* Disable event queue processing and NAPI */ void efx_stop_eventq(struct efx_channel *channel) { if (!channel->enabled) return; napi_disable(&channel->napi_str); channel->enabled = false; } static void efx_fini_eventq(struct efx_channel *channel) { if (!channel->eventq_init) return; netif_dbg(channel->efx, drv, channel->efx->net_dev, "chan %d fini event queue\n", channel->channel); efx_nic_fini_eventq(channel); channel->eventq_init = false; } static void efx_remove_eventq(struct efx_channel *channel) { netif_dbg(channel->efx, drv, channel->efx->net_dev, "chan %d remove event queue\n", channel->channel); efx_nic_remove_eventq(channel); } /************************************************************************** * * Channel handling * *************************************************************************/ /* Allocate and initialise a channel structure. */ static struct efx_channel * efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel) { struct efx_channel *channel; struct efx_rx_queue *rx_queue; struct efx_tx_queue *tx_queue; int j; channel = kzalloc(sizeof(*channel), GFP_KERNEL); if (!channel) return NULL; channel->efx = efx; channel->channel = i; channel->type = &efx_default_channel_type; for (j = 0; j < EFX_TXQ_TYPES; j++) { tx_queue = &channel->tx_queue[j]; tx_queue->efx = efx; tx_queue->queue = i * EFX_TXQ_TYPES + j; tx_queue->channel = channel; } #ifdef CONFIG_RFS_ACCEL INIT_WORK(&channel->filter_work, efx_filter_rfs_expire); #endif rx_queue = &channel->rx_queue; rx_queue->efx = efx; timer_setup(&rx_queue->slow_fill, efx_rx_slow_fill, 0); return channel; } /* Allocate and initialise a channel structure, copying parameters * (but not resources) from an old channel structure. */ static struct efx_channel * efx_copy_channel(const struct efx_channel *old_channel) { struct efx_channel *channel; struct efx_rx_queue *rx_queue; struct efx_tx_queue *tx_queue; int j; channel = kmalloc(sizeof(*channel), GFP_KERNEL); if (!channel) return NULL; *channel = *old_channel; channel->napi_dev = NULL; INIT_HLIST_NODE(&channel->napi_str.napi_hash_node); channel->napi_str.napi_id = 0; channel->napi_str.state = 0; memset(&channel->eventq, 0, sizeof(channel->eventq)); for (j = 0; j < EFX_TXQ_TYPES; j++) { tx_queue = &channel->tx_queue[j]; if (tx_queue->channel) tx_queue->channel = channel; tx_queue->buffer = NULL; memset(&tx_queue->txd, 0, sizeof(tx_queue->txd)); } rx_queue = &channel->rx_queue; rx_queue->buffer = NULL; memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd)); timer_setup(&rx_queue->slow_fill, efx_rx_slow_fill, 0); #ifdef CONFIG_RFS_ACCEL INIT_WORK(&channel->filter_work, efx_filter_rfs_expire); #endif return channel; } static int efx_probe_channel(struct efx_channel *channel) { struct efx_tx_queue *tx_queue; struct efx_rx_queue *rx_queue; int rc; netif_dbg(channel->efx, probe, channel->efx->net_dev, "creating channel %d\n", channel->channel); rc = channel->type->pre_probe(channel); if (rc) goto fail; rc = efx_probe_eventq(channel); if (rc) goto fail; efx_for_each_channel_tx_queue(tx_queue, channel) { rc = efx_probe_tx_queue(tx_queue); if (rc) goto fail; } efx_for_each_channel_rx_queue(rx_queue, channel) { rc = efx_probe_rx_queue(rx_queue); if (rc) goto fail; } channel->rx_list = NULL; return 0; fail: efx_remove_channel(channel); return rc; } static void efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len) { struct efx_nic *efx = channel->efx; const char *type; int number; number = channel->channel; if (efx->tx_channel_offset == 0) { type = ""; } else if (channel->channel < efx->tx_channel_offset) { type = "-rx"; } else { type = "-tx"; number -= efx->tx_channel_offset; } snprintf(buf, len, "%s%s-%d", efx->name, type, number); } static void efx_set_channel_names(struct efx_nic *efx) { struct efx_channel *channel; efx_for_each_channel(channel, efx) channel->type->get_name(channel, efx->msi_context[channel->channel].name, sizeof(efx->msi_context[0].name)); } static int efx_probe_channels(struct efx_nic *efx) { struct efx_channel *channel; int rc; /* Restart special buffer allocation */ efx->next_buffer_table = 0; /* Probe channels in reverse, so that any 'extra' channels * use the start of the buffer table. This allows the traffic * channels to be resized without moving them or wasting the * entries before them. */ efx_for_each_channel_rev(channel, efx) { rc = efx_probe_channel(channel); if (rc) { netif_err(efx, probe, efx->net_dev, "failed to create channel %d\n", channel->channel); goto fail; } } efx_set_channel_names(efx); return 0; fail: efx_remove_channels(efx); return rc; } /* Channels are shutdown and reinitialised whilst the NIC is running * to propagate configuration changes (mtu, checksum offload), or * to clear hardware error conditions */ static void efx_start_datapath(struct efx_nic *efx) { netdev_features_t old_features = efx->net_dev->features; bool old_rx_scatter = efx->rx_scatter; struct efx_tx_queue *tx_queue; struct efx_rx_queue *rx_queue; struct efx_channel *channel; size_t rx_buf_len; /* Calculate the rx buffer allocation parameters required to * support the current MTU, including padding for header * alignment and overruns. */ efx->rx_dma_len = (efx->rx_prefix_size + EFX_MAX_FRAME_LEN(efx->net_dev->mtu) + efx->type->rx_buffer_padding); rx_buf_len = (sizeof(struct efx_rx_page_state) + efx->rx_ip_align + efx->rx_dma_len); if (rx_buf_len <= PAGE_SIZE) { efx->rx_scatter = efx->type->always_rx_scatter; efx->rx_buffer_order = 0; } else if (efx->type->can_rx_scatter) { BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES); BUILD_BUG_ON(sizeof(struct efx_rx_page_state) + 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE, EFX_RX_BUF_ALIGNMENT) > PAGE_SIZE); efx->rx_scatter = true; efx->rx_dma_len = EFX_RX_USR_BUF_SIZE; efx->rx_buffer_order = 0; } else { efx->rx_scatter = false; efx->rx_buffer_order = get_order(rx_buf_len); } efx_rx_config_page_split(efx); if (efx->rx_buffer_order) netif_dbg(efx, drv, efx->net_dev, "RX buf len=%u; page order=%u batch=%u\n", efx->rx_dma_len, efx->rx_buffer_order, efx->rx_pages_per_batch); else netif_dbg(efx, drv, efx->net_dev, "RX buf len=%u step=%u bpp=%u; page batch=%u\n", efx->rx_dma_len, efx->rx_page_buf_step, efx->rx_bufs_per_page, efx->rx_pages_per_batch); /* Restore previously fixed features in hw_features and remove * features which are fixed now */ efx->net_dev->hw_features |= efx->net_dev->features; efx->net_dev->hw_features &= ~efx->fixed_features; efx->net_dev->features |= efx->fixed_features; if (efx->net_dev->features != old_features) netdev_features_change(efx->net_dev); /* RX filters may also have scatter-enabled flags */ if (efx->rx_scatter != old_rx_scatter) efx->type->filter_update_rx_scatter(efx); /* We must keep at least one descriptor in a TX ring empty. * We could avoid this when the queue size does not exactly * match the hardware ring size, but it's not that important. * Therefore we stop the queue when one more skb might fill * the ring completely. We wake it when half way back to * empty. */ efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx); efx->txq_wake_thresh = efx->txq_stop_thresh / 2; /* Initialise the channels */ efx_for_each_channel(channel, efx) { efx_for_each_channel_tx_queue(tx_queue, channel) { efx_init_tx_queue(tx_queue); atomic_inc(&efx->active_queues); } efx_for_each_channel_rx_queue(rx_queue, channel) { efx_init_rx_queue(rx_queue); atomic_inc(&efx->active_queues); efx_stop_eventq(channel); efx_fast_push_rx_descriptors(rx_queue, false); efx_start_eventq(channel); } WARN_ON(channel->rx_pkt_n_frags); } efx_ptp_start_datapath(efx); if (netif_device_present(efx->net_dev)) netif_tx_wake_all_queues(efx->net_dev); } static void efx_stop_datapath(struct efx_nic *efx) { struct efx_channel *channel; struct efx_tx_queue *tx_queue; struct efx_rx_queue *rx_queue; int rc; EFX_ASSERT_RESET_SERIALISED(efx); BUG_ON(efx->port_enabled); efx_ptp_stop_datapath(efx); /* Stop RX refill */ efx_for_each_channel(channel, efx) { efx_for_each_channel_rx_queue(rx_queue, channel) rx_queue->refill_enabled = false; } efx_for_each_channel(channel, efx) { /* RX packet processing is pipelined, so wait for the * NAPI handler to complete. At least event queue 0 * might be kept active by non-data events, so don't * use napi_synchronize() but actually disable NAPI * temporarily. */ if (efx_channel_has_rx_queue(channel)) { efx_stop_eventq(channel); efx_start_eventq(channel); } } rc = efx->type->fini_dmaq(efx); if (rc) { netif_err(efx, drv, efx->net_dev, "failed to flush queues\n"); } else { netif_dbg(efx, drv, efx->net_dev, "successfully flushed all queues\n"); } efx_for_each_channel(channel, efx) { efx_for_each_channel_rx_queue(rx_queue, channel) efx_fini_rx_queue(rx_queue); efx_for_each_possible_channel_tx_queue(tx_queue, channel) efx_fini_tx_queue(tx_queue); } } static void efx_remove_channel(struct efx_channel *channel) { struct efx_tx_queue *tx_queue; struct efx_rx_queue *rx_queue; netif_dbg(channel->efx, drv, channel->efx->net_dev, "destroy chan %d\n", channel->channel); efx_for_each_channel_rx_queue(rx_queue, channel) efx_remove_rx_queue(rx_queue); efx_for_each_possible_channel_tx_queue(tx_queue, channel) efx_remove_tx_queue(tx_queue); efx_remove_eventq(channel); channel->type->post_remove(channel); } static void efx_remove_channels(struct efx_nic *efx) { struct efx_channel *channel; efx_for_each_channel(channel, efx) efx_remove_channel(channel); } int efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries) { struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel; u32 old_rxq_entries, old_txq_entries; unsigned i, next_buffer_table = 0; int rc, rc2; rc = efx_check_disabled(efx); if (rc) return rc; /* Not all channels should be reallocated. We must avoid * reallocating their buffer table entries. */ efx_for_each_channel(channel, efx) { struct efx_rx_queue *rx_queue; struct efx_tx_queue *tx_queue; if (channel->type->copy) continue; next_buffer_table = max(next_buffer_table, channel->eventq.index + channel->eventq.entries); efx_for_each_channel_rx_queue(rx_queue, channel) next_buffer_table = max(next_buffer_table, rx_queue->rxd.index + rx_queue->rxd.entries); efx_for_each_channel_tx_queue(tx_queue, channel) next_buffer_table = max(next_buffer_table, tx_queue->txd.index + tx_queue->txd.entries); } efx_device_detach_sync(efx); efx_stop_all(efx); efx_soft_disable_interrupts(efx); /* Clone channels (where possible) */ memset(other_channel, 0, sizeof(other_channel)); for (i = 0; i < efx->n_channels; i++) { channel = efx->channel[i]; if (channel->type->copy) channel = channel->type->copy(channel); if (!channel) { rc = -ENOMEM; goto out; } other_channel[i] = channel; } /* Swap entry counts and channel pointers */ old_rxq_entries = efx->rxq_entries; old_txq_entries = efx->txq_entries; efx->rxq_entries = rxq_entries; efx->txq_entries = txq_entries; for (i = 0; i < efx->n_channels; i++) { channel = efx->channel[i]; efx->channel[i] = other_channel[i]; other_channel[i] = channel; } /* Restart buffer table allocation */ efx->next_buffer_table = next_buffer_table; for (i = 0; i < efx->n_channels; i++) { channel = efx->channel[i]; if (!channel->type->copy) continue; rc = efx_probe_channel(channel); if (rc) goto rollback; efx_init_napi_channel(efx->channel[i]); } out: /* Destroy unused channel structures */ for (i = 0; i < efx->n_channels; i++) { channel = other_channel[i]; if (channel && channel->type->copy) { efx_fini_napi_channel(channel); efx_remove_channel(channel); kfree(channel); } } rc2 = efx_soft_enable_interrupts(efx); if (rc2) { rc = rc ? rc : rc2; netif_err(efx, drv, efx->net_dev, "unable to restart interrupts on channel reallocation\n"); efx_schedule_reset(efx, RESET_TYPE_DISABLE); } else { efx_start_all(efx); efx_device_attach_if_not_resetting(efx); } return rc; rollback: /* Swap back */ efx->rxq_entries = old_rxq_entries; efx->txq_entries = old_txq_entries; for (i = 0; i < efx->n_channels; i++) { channel = efx->channel[i]; efx->channel[i] = other_channel[i]; other_channel[i] = channel; } goto out; } void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue) { mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100)); } static bool efx_default_channel_want_txqs(struct efx_channel *channel) { return channel->channel - channel->efx->tx_channel_offset < channel->efx->n_tx_channels; } static const struct efx_channel_type efx_default_channel_type = { .pre_probe = efx_channel_dummy_op_int, .post_remove = efx_channel_dummy_op_void, .get_name = efx_get_channel_name, .copy = efx_copy_channel, .want_txqs = efx_default_channel_want_txqs, .keep_eventq = false, .want_pio = true, }; int efx_channel_dummy_op_int(struct efx_channel *channel) { return 0; } void efx_channel_dummy_op_void(struct efx_channel *channel) { } /************************************************************************** * * Port handling * **************************************************************************/ /* This ensures that the kernel is kept informed (via * netif_carrier_on/off) of the link status, and also maintains the * link status's stop on the port's TX queue. */ void efx_link_status_changed(struct efx_nic *efx) { struct efx_link_state *link_state = &efx->link_state; /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure * that no events are triggered between unregister_netdev() and the * driver unloading. A more general condition is that NETDEV_CHANGE * can only be generated between NETDEV_UP and NETDEV_DOWN */ if (!netif_running(efx->net_dev)) return; if (link_state->up != netif_carrier_ok(efx->net_dev)) { efx->n_link_state_changes++; if (link_state->up) netif_carrier_on(efx->net_dev); else netif_carrier_off(efx->net_dev); } /* Status message for kernel log */ if (link_state->up) netif_info(efx, link, efx->net_dev, "link up at %uMbps %s-duplex (MTU %d)\n", link_state->speed, link_state->fd ? "full" : "half", efx->net_dev->mtu); else netif_info(efx, link, efx->net_dev, "link down\n"); } void efx_link_set_advertising(struct efx_nic *efx, const unsigned long *advertising) { memcpy(efx->link_advertising, advertising, sizeof(__ETHTOOL_DECLARE_LINK_MODE_MASK())); efx->link_advertising[0] |= ADVERTISED_Autoneg; if (advertising[0] & ADVERTISED_Pause) efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX); else efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX); if (advertising[0] & ADVERTISED_Asym_Pause) efx->wanted_fc ^= EFX_FC_TX; } /* Equivalent to efx_link_set_advertising with all-zeroes, except does not * force the Autoneg bit on. */ void efx_link_clear_advertising(struct efx_nic *efx) { bitmap_zero(efx->link_advertising, __ETHTOOL_LINK_MODE_MASK_NBITS); efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX); } void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc) { efx->wanted_fc = wanted_fc; if (efx->link_advertising[0]) { if (wanted_fc & EFX_FC_RX) efx->link_advertising[0] |= (ADVERTISED_Pause | ADVERTISED_Asym_Pause); else efx->link_advertising[0] &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause); if (wanted_fc & EFX_FC_TX) efx->link_advertising[0] ^= ADVERTISED_Asym_Pause; } } static void efx_fini_port(struct efx_nic *efx); /* We assume that efx->type->reconfigure_mac will always try to sync RX * filters and therefore needs to read-lock the filter table against freeing */ void efx_mac_reconfigure(struct efx_nic *efx) { down_read(&efx->filter_sem); efx->type->reconfigure_mac(efx); up_read(&efx->filter_sem); } /* Push loopback/power/transmit disable settings to the PHY, and reconfigure * the MAC appropriately. All other PHY configuration changes are pushed * through phy_op->set_settings(), and pushed asynchronously to the MAC * through efx_monitor(). * * Callers must hold the mac_lock */ int __efx_reconfigure_port(struct efx_nic *efx) { enum efx_phy_mode phy_mode; int rc; WARN_ON(!mutex_is_locked(&efx->mac_lock)); /* Disable PHY transmit in mac level loopbacks */ phy_mode = efx->phy_mode; if (LOOPBACK_INTERNAL(efx)) efx->phy_mode |= PHY_MODE_TX_DISABLED; else efx->phy_mode &= ~PHY_MODE_TX_DISABLED; rc = efx->type->reconfigure_port(efx); if (rc) efx->phy_mode = phy_mode; return rc; } /* Reinitialise the MAC to pick up new PHY settings, even if the port is * disabled. */ int efx_reconfigure_port(struct efx_nic *efx) { int rc; EFX_ASSERT_RESET_SERIALISED(efx); mutex_lock(&efx->mac_lock); rc = __efx_reconfigure_port(efx); mutex_unlock(&efx->mac_lock); return rc; } /* Asynchronous work item for changing MAC promiscuity and multicast * hash. Avoid a drain/rx_ingress enable by reconfiguring the current * MAC directly. */ static void efx_mac_work(struct work_struct *data) { struct efx_nic *efx = container_of(data, struct efx_nic, mac_work); mutex_lock(&efx->mac_lock); if (efx->port_enabled) efx_mac_reconfigure(efx); mutex_unlock(&efx->mac_lock); } static int efx_probe_port(struct efx_nic *efx) { int rc; netif_dbg(efx, probe, efx->net_dev, "create port\n"); if (phy_flash_cfg) efx->phy_mode = PHY_MODE_SPECIAL; /* Connect up MAC/PHY operations table */ rc = efx->type->probe_port(efx); if (rc) return rc; /* Initialise MAC address to permanent address */ ether_addr_copy(efx->net_dev->dev_addr, efx->net_dev->perm_addr); return 0; } static int efx_init_port(struct efx_nic *efx) { int rc; netif_dbg(efx, drv, efx->net_dev, "init port\n"); mutex_lock(&efx->mac_lock); rc = efx->phy_op->init(efx); if (rc) goto fail1; efx->port_initialized = true; /* Reconfigure the MAC before creating dma queues (required for * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */ efx_mac_reconfigure(efx); /* Ensure the PHY advertises the correct flow control settings */ rc = efx->phy_op->reconfigure(efx); if (rc && rc != -EPERM) goto fail2; mutex_unlock(&efx->mac_lock); return 0; fail2: efx->phy_op->fini(efx); fail1: mutex_unlock(&efx->mac_lock); return rc; } static void efx_start_port(struct efx_nic *efx) { netif_dbg(efx, ifup, efx->net_dev, "start port\n"); BUG_ON(efx->port_enabled); mutex_lock(&efx->mac_lock); efx->port_enabled = true; /* Ensure MAC ingress/egress is enabled */ efx_mac_reconfigure(efx); mutex_unlock(&efx->mac_lock); } /* Cancel work for MAC reconfiguration, periodic hardware monitoring * and the async self-test, wait for them to finish and prevent them * being scheduled again. This doesn't cover online resets, which * should only be cancelled when removing the device. */ static void efx_stop_port(struct efx_nic *efx) { netif_dbg(efx, ifdown, efx->net_dev, "stop port\n"); EFX_ASSERT_RESET_SERIALISED(efx); mutex_lock(&efx->mac_lock); efx->port_enabled = false; mutex_unlock(&efx->mac_lock); /* Serialise against efx_set_multicast_list() */ netif_addr_lock_bh(efx->net_dev); netif_addr_unlock_bh(efx->net_dev); cancel_delayed_work_sync(&efx->monitor_work); efx_selftest_async_cancel(efx); cancel_work_sync(&efx->mac_work); } static void efx_fini_port(struct efx_nic *efx) { netif_dbg(efx, drv, efx->net_dev, "shut down port\n"); if (!efx->port_initialized) return; efx->phy_op->fini(efx); efx->port_initialized = false; efx->link_state.up = false; efx_link_status_changed(efx); } static void efx_remove_port(struct efx_nic *efx) { netif_dbg(efx, drv, efx->net_dev, "destroying port\n"); efx->type->remove_port(efx); } /************************************************************************** * * NIC handling * **************************************************************************/ static LIST_HEAD(efx_primary_list); static LIST_HEAD(efx_unassociated_list); static bool efx_same_controller(struct efx_nic *left, struct efx_nic *right) { return left->type == right->type && left->vpd_sn && right->vpd_sn && !strcmp(left->vpd_sn, right->vpd_sn); } static void efx_associate(struct efx_nic *efx) { struct efx_nic *other, *next; if (efx->primary == efx) { /* Adding primary function; look for secondaries */ netif_dbg(efx, probe, efx->net_dev, "adding to primary list\n"); list_add_tail(&efx->node, &efx_primary_list); list_for_each_entry_safe(other, next, &efx_unassociated_list, node) { if (efx_same_controller(efx, other)) { list_del(&other->node); netif_dbg(other, probe, other->net_dev, "moving to secondary list of %s %s\n", pci_name(efx->pci_dev), efx->net_dev->name); list_add_tail(&other->node, &efx->secondary_list); other->primary = efx; } } } else { /* Adding secondary function; look for primary */ list_for_each_entry(other, &efx_primary_list, node) { if (efx_same_controller(efx, other)) { netif_dbg(efx, probe, efx->net_dev, "adding to secondary list of %s %s\n", pci_name(other->pci_dev), other->net_dev->name); list_add_tail(&efx->node, &other->secondary_list); efx->primary = other; return; } } netif_dbg(efx, probe, efx->net_dev, "adding to unassociated list\n"); list_add_tail(&efx->node, &efx_unassociated_list); } } static void efx_dissociate(struct efx_nic *efx) { struct efx_nic *other, *next; list_del(&efx->node); efx->primary = NULL; list_for_each_entry_safe(other, next, &efx->secondary_list, node) { list_del(&other->node); netif_dbg(other, probe, other->net_dev, "moving to unassociated list\n"); list_add_tail(&other->node, &efx_unassociated_list); other->primary = NULL; } } /* This configures the PCI device to enable I/O and DMA. */ static int efx_init_io(struct efx_nic *efx) { struct pci_dev *pci_dev = efx->pci_dev; dma_addr_t dma_mask = efx->type->max_dma_mask; unsigned int mem_map_size = efx->type->mem_map_size(efx); int rc, bar; netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n"); bar = efx->type->mem_bar(efx); rc = pci_enable_device(pci_dev); if (rc) { netif_err(efx, probe, efx->net_dev, "failed to enable PCI device\n"); goto fail1; } pci_set_master(pci_dev); /* Set the PCI DMA mask. Try all possibilities from our genuine mask * down to 32 bits, because some architectures will allow 40 bit * masks event though they reject 46 bit masks. */ while (dma_mask > 0x7fffffffUL) { rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask); if (rc == 0) break; dma_mask >>= 1; } if (rc) { netif_err(efx, probe, efx->net_dev, "could not find a suitable DMA mask\n"); goto fail2; } netif_dbg(efx, probe, efx->net_dev, "using DMA mask %llx\n", (unsigned long long) dma_mask); efx->membase_phys = pci_resource_start(efx->pci_dev, bar); rc = pci_request_region(pci_dev, bar, "sfc"); if (rc) { netif_err(efx, probe, efx->net_dev, "request for memory BAR failed\n"); rc = -EIO; goto fail3; } efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size); if (!efx->membase) { netif_err(efx, probe, efx->net_dev, "could not map memory BAR at %llx+%x\n", (unsigned long long)efx->membase_phys, mem_map_size); rc = -ENOMEM; goto fail4; } netif_dbg(efx, probe, efx->net_dev, "memory BAR at %llx+%x (virtual %p)\n", (unsigned long long)efx->membase_phys, mem_map_size, efx->membase); return 0; fail4: pci_release_region(efx->pci_dev, bar); fail3: efx->membase_phys = 0; fail2: pci_disable_device(efx->pci_dev); fail1: return rc; } static void efx_fini_io(struct efx_nic *efx) { int bar; netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n"); if (efx->membase) { iounmap(efx->membase); efx->membase = NULL; } if (efx->membase_phys) { bar = efx->type->mem_bar(efx); pci_release_region(efx->pci_dev, bar); efx->membase_phys = 0; } /* Don't disable bus-mastering if VFs are assigned */ if (!pci_vfs_assigned(efx->pci_dev)) pci_disable_device(efx->pci_dev); } void efx_set_default_rx_indir_table(struct efx_nic *efx, struct efx_rss_context *ctx) { size_t i; for (i = 0; i < ARRAY_SIZE(ctx->rx_indir_table); i++) ctx->rx_indir_table[i] = ethtool_rxfh_indir_default(i, efx->rss_spread); } static unsigned int efx_wanted_parallelism(struct efx_nic *efx) { cpumask_var_t thread_mask; unsigned int count; int cpu; if (rss_cpus) { count = rss_cpus; } else { if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) { netif_warn(efx, probe, efx->net_dev, "RSS disabled due to allocation failure\n"); return 1; } count = 0; for_each_online_cpu(cpu) { if (!cpumask_test_cpu(cpu, thread_mask)) { ++count; cpumask_or(thread_mask, thread_mask, topology_sibling_cpumask(cpu)); } } free_cpumask_var(thread_mask); } if (count > EFX_MAX_RX_QUEUES) { netif_cond_dbg(efx, probe, efx->net_dev, !rss_cpus, warn, "Reducing number of rx queues from %u to %u.\n", count, EFX_MAX_RX_QUEUES); count = EFX_MAX_RX_QUEUES; } /* If RSS is requested for the PF *and* VFs then we can't write RSS * table entries that are inaccessible to VFs */ #ifdef CONFIG_SFC_SRIOV if (efx->type->sriov_wanted) { if (efx->type->sriov_wanted(efx) && efx_vf_size(efx) > 1 && count > efx_vf_size(efx)) { netif_warn(efx, probe, efx->net_dev, "Reducing number of RSS channels from %u to %u for " "VF support. Increase vf-msix-limit to use more " "channels on the PF.\n", count, efx_vf_size(efx)); count = efx_vf_size(efx); } } #endif return count; } /* Probe the number and type of interrupts we are able to obtain, and * the resulting numbers of channels and RX queues. */ static int efx_probe_interrupts(struct efx_nic *efx) { unsigned int extra_channels = 0; unsigned int i, j; int rc; for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) if (efx->extra_channel_type[i]) ++extra_channels; if (efx->interrupt_mode == EFX_INT_MODE_MSIX) { struct msix_entry xentries[EFX_MAX_CHANNELS]; unsigned int n_channels; n_channels = efx_wanted_parallelism(efx); if (efx_separate_tx_channels) n_channels *= 2; n_channels += extra_channels; n_channels = min(n_channels, efx->max_channels); for (i = 0; i < n_channels; i++) xentries[i].entry = i; rc = pci_enable_msix_range(efx->pci_dev, xentries, 1, n_channels); if (rc < 0) { /* Fall back to single channel MSI */ netif_err(efx, drv, efx->net_dev, "could not enable MSI-X\n"); if (efx->type->min_interrupt_mode >= EFX_INT_MODE_MSI) efx->interrupt_mode = EFX_INT_MODE_MSI; else return rc; } else if (rc < n_channels) { netif_err(efx, drv, efx->net_dev, "WARNING: Insufficient MSI-X vectors" " available (%d < %u).\n", rc, n_channels); netif_err(efx, drv, efx->net_dev, "WARNING: Performance may be reduced.\n"); n_channels = rc; } if (rc > 0) { efx->n_channels = n_channels; if (n_channels > extra_channels) n_channels -= extra_channels; if (efx_separate_tx_channels) { efx->n_tx_channels = min(max(n_channels / 2, 1U), efx->max_tx_channels); efx->n_rx_channels = max(n_channels - efx->n_tx_channels, 1U); } else { efx->n_tx_channels = min(n_channels, efx->max_tx_channels); efx->n_rx_channels = n_channels; } for (i = 0; i < efx->n_channels; i++) efx_get_channel(efx, i)->irq = xentries[i].vector; } } /* Try single interrupt MSI */ if (efx->interrupt_mode == EFX_INT_MODE_MSI) { efx->n_channels = 1; efx->n_rx_channels = 1; efx->n_tx_channels = 1; rc = pci_enable_msi(efx->pci_dev); if (rc == 0) { efx_get_channel(efx, 0)->irq = efx->pci_dev->irq; } else { netif_err(efx, drv, efx->net_dev, "could not enable MSI\n"); if (efx->type->min_interrupt_mode >= EFX_INT_MODE_LEGACY) efx->interrupt_mode = EFX_INT_MODE_LEGACY; else return rc; } } /* Assume legacy interrupts */ if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) { efx->n_channels = 1 + (efx_separate_tx_channels ? 1 : 0); efx->n_rx_channels = 1; efx->n_tx_channels = 1; efx->legacy_irq = efx->pci_dev->irq; } /* Assign extra channels if possible */ efx->n_extra_tx_channels = 0; j = efx->n_channels; for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) { if (!efx->extra_channel_type[i]) continue; if (efx->interrupt_mode != EFX_INT_MODE_MSIX || efx->n_channels <= extra_channels) { efx->extra_channel_type[i]->handle_no_channel(efx); } else { --j; efx_get_channel(efx, j)->type = efx->extra_channel_type[i]; if (efx_channel_has_tx_queues(efx_get_channel(efx, j))) efx->n_extra_tx_channels++; } } /* RSS might be usable on VFs even if it is disabled on the PF */ #ifdef CONFIG_SFC_SRIOV if (efx->type->sriov_wanted) { efx->rss_spread = ((efx->n_rx_channels > 1 || !efx->type->sriov_wanted(efx)) ? efx->n_rx_channels : efx_vf_size(efx)); return 0; } #endif efx->rss_spread = efx->n_rx_channels; return 0; } #if defined(CONFIG_SMP) static void efx_set_interrupt_affinity(struct efx_nic *efx) { struct efx_channel *channel; unsigned int cpu; efx_for_each_channel(channel, efx) { cpu = cpumask_local_spread(channel->channel, pcibus_to_node(efx->pci_dev->bus)); irq_set_affinity_hint(channel->irq, cpumask_of(cpu)); } } static void efx_clear_interrupt_affinity(struct efx_nic *efx) { struct efx_channel *channel; efx_for_each_channel(channel, efx) irq_set_affinity_hint(channel->irq, NULL); } #else static void efx_set_interrupt_affinity(struct efx_nic *efx __attribute__ ((unused))) { } static void efx_clear_interrupt_affinity(struct efx_nic *efx __attribute__ ((unused))) { } #endif /* CONFIG_SMP */ static int efx_soft_enable_interrupts(struct efx_nic *efx) { struct efx_channel *channel, *end_channel; int rc; BUG_ON(efx->state == STATE_DISABLED); efx->irq_soft_enabled = true; smp_wmb(); efx_for_each_channel(channel, efx) { if (!channel->type->keep_eventq) { rc = efx_init_eventq(channel); if (rc) goto fail; } efx_start_eventq(channel); } efx_mcdi_mode_event(efx); return 0; fail: end_channel = channel; efx_for_each_channel(channel, efx) { if (channel == end_channel) break; efx_stop_eventq(channel); if (!channel->type->keep_eventq) efx_fini_eventq(channel); } return rc; } static void efx_soft_disable_interrupts(struct efx_nic *efx) { struct efx_channel *channel; if (efx->state == STATE_DISABLED) return; efx_mcdi_mode_poll(efx); efx->irq_soft_enabled = false; smp_wmb(); if (efx->legacy_irq) synchronize_irq(efx->legacy_irq); efx_for_each_channel(channel, efx) { if (channel->irq) synchronize_irq(channel->irq); efx_stop_eventq(channel); if (!channel->type->keep_eventq) efx_fini_eventq(channel); } /* Flush the asynchronous MCDI request queue */ efx_mcdi_flush_async(efx); } static int efx_enable_interrupts(struct efx_nic *efx) { struct efx_channel *channel, *end_channel; int rc; BUG_ON(efx->state == STATE_DISABLED); if (efx->eeh_disabled_legacy_irq) { enable_irq(efx->legacy_irq); efx->eeh_disabled_legacy_irq = false; } efx->type->irq_enable_master(efx); efx_for_each_channel(channel, efx) { if (channel->type->keep_eventq) { rc = efx_init_eventq(channel); if (rc) goto fail; } } rc = efx_soft_enable_interrupts(efx); if (rc) goto fail; return 0; fail: end_channel = channel; efx_for_each_channel(channel, efx) { if (channel == end_channel) break; if (channel->type->keep_eventq) efx_fini_eventq(channel); } efx->type->irq_disable_non_ev(efx); return rc; } static void efx_disable_interrupts(struct efx_nic *efx) { struct efx_channel *channel; efx_soft_disable_interrupts(efx); efx_for_each_channel(channel, efx) { if (channel->type->keep_eventq) efx_fini_eventq(channel); } efx->type->irq_disable_non_ev(efx); } static void efx_remove_interrupts(struct efx_nic *efx) { struct efx_channel *channel; /* Remove MSI/MSI-X interrupts */ efx_for_each_channel(channel, efx) channel->irq = 0; pci_disable_msi(efx->pci_dev); pci_disable_msix(efx->pci_dev); /* Remove legacy interrupt */ efx->legacy_irq = 0; } static void efx_set_channels(struct efx_nic *efx) { struct efx_channel *channel; struct efx_tx_queue *tx_queue; efx->tx_channel_offset = efx_separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0; /* We need to mark which channels really have RX and TX * queues, and adjust the TX queue numbers if we have separate * RX-only and TX-only channels. */ efx_for_each_channel(channel, efx) { if (channel->channel < efx->n_rx_channels) channel->rx_queue.core_index = channel->channel; else channel->rx_queue.core_index = -1; efx_for_each_channel_tx_queue(tx_queue, channel) tx_queue->queue -= (efx->tx_channel_offset * EFX_TXQ_TYPES); } } static int efx_probe_nic(struct efx_nic *efx) { int rc; netif_dbg(efx, probe, efx->net_dev, "creating NIC\n"); /* Carry out hardware-type specific initialisation */ rc = efx->type->probe(efx); if (rc) return rc; do { if (!efx->max_channels || !efx->max_tx_channels) { netif_err(efx, drv, efx->net_dev, "Insufficient resources to allocate" " any channels\n"); rc = -ENOSPC; goto fail1; } /* Determine the number of channels and queues by trying * to hook in MSI-X interrupts. */ rc = efx_probe_interrupts(efx); if (rc) goto fail1; efx_set_channels(efx); /* dimension_resources can fail with EAGAIN */ rc = efx->type->dimension_resources(efx); if (rc != 0 && rc != -EAGAIN) goto fail2; if (rc == -EAGAIN) /* try again with new max_channels */ efx_remove_interrupts(efx); } while (rc == -EAGAIN); if (efx->n_channels > 1) netdev_rss_key_fill(efx->rss_context.rx_hash_key, sizeof(efx->rss_context.rx_hash_key)); efx_set_default_rx_indir_table(efx, &efx->rss_context); netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels); netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels); /* Initialise the interrupt moderation settings */ efx->irq_mod_step_us = DIV_ROUND_UP(efx->timer_quantum_ns, 1000); efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true, true); return 0; fail2: efx_remove_interrupts(efx); fail1: efx->type->remove(efx); return rc; } static void efx_remove_nic(struct efx_nic *efx) { netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n"); efx_remove_interrupts(efx); efx->type->remove(efx); } static int efx_probe_filters(struct efx_nic *efx) { int rc; init_rwsem(&efx->filter_sem); mutex_lock(&efx->mac_lock); down_write(&efx->filter_sem); rc = efx->type->filter_table_probe(efx); if (rc) goto out_unlock; #ifdef CONFIG_RFS_ACCEL if (efx->type->offload_features & NETIF_F_NTUPLE) { struct efx_channel *channel; int i, success = 1; efx_for_each_channel(channel, efx) { channel->rps_flow_id = kcalloc(efx->type->max_rx_ip_filters, sizeof(*channel->rps_flow_id), GFP_KERNEL); if (!channel->rps_flow_id) success = 0; else for (i = 0; i < efx->type->max_rx_ip_filters; ++i) channel->rps_flow_id[i] = RPS_FLOW_ID_INVALID; } if (!success) { efx_for_each_channel(channel, efx) kfree(channel->rps_flow_id); efx->type->filter_table_remove(efx); rc = -ENOMEM; goto out_unlock; } efx->rps_expire_index = efx->rps_expire_channel = 0; } #endif out_unlock: up_write(&efx->filter_sem); mutex_unlock(&efx->mac_lock); return rc; } static void efx_remove_filters(struct efx_nic *efx) { #ifdef CONFIG_RFS_ACCEL struct efx_channel *channel; efx_for_each_channel(channel, efx) kfree(channel->rps_flow_id); #endif down_write(&efx->filter_sem); efx->type->filter_table_remove(efx); up_write(&efx->filter_sem); } /************************************************************************** * * NIC startup/shutdown * *************************************************************************/ static int efx_probe_all(struct efx_nic *efx) { int rc; rc = efx_probe_nic(efx); if (rc) { netif_err(efx, probe, efx->net_dev, "failed to create NIC\n"); goto fail1; } rc = efx_probe_port(efx); if (rc) { netif_err(efx, probe, efx->net_dev, "failed to create port\n"); goto fail2; } BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT); if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) { rc = -EINVAL; goto fail3; } efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE; #ifdef CONFIG_SFC_SRIOV rc = efx->type->vswitching_probe(efx); if (rc) /* not fatal; the PF will still work fine */ netif_warn(efx, probe, efx->net_dev, "failed to setup vswitching rc=%d;" " VFs may not function\n", rc); #endif rc = efx_probe_filters(efx); if (rc) { netif_err(efx, probe, efx->net_dev, "failed to create filter tables\n"); goto fail4; } rc = efx_probe_channels(efx); if (rc) goto fail5; return 0; fail5: efx_remove_filters(efx); fail4: #ifdef CONFIG_SFC_SRIOV efx->type->vswitching_remove(efx); #endif fail3: efx_remove_port(efx); fail2: efx_remove_nic(efx); fail1: return rc; } /* If the interface is supposed to be running but is not, start * the hardware and software data path, regular activity for the port * (MAC statistics, link polling, etc.) and schedule the port to be * reconfigured. Interrupts must already be enabled. This function * is safe to call multiple times, so long as the NIC is not disabled. * Requires the RTNL lock. */ static void efx_start_all(struct efx_nic *efx) { EFX_ASSERT_RESET_SERIALISED(efx); BUG_ON(efx->state == STATE_DISABLED); /* Check that it is appropriate to restart the interface. All * of these flags are safe to read under just the rtnl lock */ if (efx->port_enabled || !netif_running(efx->net_dev) || efx->reset_pending) return; efx_start_port(efx); efx_start_datapath(efx); /* Start the hardware monitor if there is one */ if (efx->type->monitor != NULL) queue_delayed_work(efx->workqueue, &efx->monitor_work, efx_monitor_interval); /* Link state detection is normally event-driven; we have * to poll now because we could have missed a change */ mutex_lock(&efx->mac_lock); if (efx->phy_op->poll(efx)) efx_link_status_changed(efx); mutex_unlock(&efx->mac_lock); efx->type->start_stats(efx); efx->type->pull_stats(efx); spin_lock_bh(&efx->stats_lock); efx->type->update_stats(efx, NULL, NULL); spin_unlock_bh(&efx->stats_lock); } /* Quiesce the hardware and software data path, and regular activity * for the port without bringing the link down. Safe to call multiple * times with the NIC in almost any state, but interrupts should be * enabled. Requires the RTNL lock. */ static void efx_stop_all(struct efx_nic *efx) { EFX_ASSERT_RESET_SERIALISED(efx); /* port_enabled can be read safely under the rtnl lock */ if (!efx->port_enabled) return; /* update stats before we go down so we can accurately count * rx_nodesc_drops */ efx->type->pull_stats(efx); spin_lock_bh(&efx->stats_lock); efx->type->update_stats(efx, NULL, NULL); spin_unlock_bh(&efx->stats_lock); efx->type->stop_stats(efx); efx_stop_port(efx); /* Stop the kernel transmit interface. This is only valid if * the device is stopped or detached; otherwise the watchdog * may fire immediately. */ WARN_ON(netif_running(efx->net_dev) && netif_device_present(efx->net_dev)); netif_tx_disable(efx->net_dev); efx_stop_datapath(efx); } static void efx_remove_all(struct efx_nic *efx) { efx_remove_channels(efx); efx_remove_filters(efx); #ifdef CONFIG_SFC_SRIOV efx->type->vswitching_remove(efx); #endif efx_remove_port(efx); efx_remove_nic(efx); } /************************************************************************** * * Interrupt moderation * **************************************************************************/ unsigned int efx_usecs_to_ticks(struct efx_nic *efx, unsigned int usecs) { if (usecs == 0) return 0; if (usecs * 1000 < efx->timer_quantum_ns) return 1; /* never round down to 0 */ return usecs * 1000 / efx->timer_quantum_ns; } unsigned int efx_ticks_to_usecs(struct efx_nic *efx, unsigned int ticks) { /* We must round up when converting ticks to microseconds * because we round down when converting the other way. */ return DIV_ROUND_UP(ticks * efx->timer_quantum_ns, 1000); } /* Set interrupt moderation parameters */ int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs, unsigned int rx_usecs, bool rx_adaptive, bool rx_may_override_tx) { struct efx_channel *channel; unsigned int timer_max_us; EFX_ASSERT_RESET_SERIALISED(efx); timer_max_us = efx->timer_max_ns / 1000; if (tx_usecs > timer_max_us || rx_usecs > timer_max_us) return -EINVAL; if (tx_usecs != rx_usecs && efx->tx_channel_offset == 0 && !rx_may_override_tx) { netif_err(efx, drv, efx->net_dev, "Channels are shared. " "RX and TX IRQ moderation must be equal\n"); return -EINVAL; } efx->irq_rx_adaptive = rx_adaptive; efx->irq_rx_moderation_us = rx_usecs; efx_for_each_channel(channel, efx) { if (efx_channel_has_rx_queue(channel)) channel->irq_moderation_us = rx_usecs; else if (efx_channel_has_tx_queues(channel)) channel->irq_moderation_us = tx_usecs; } return 0; } void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs, unsigned int *rx_usecs, bool *rx_adaptive) { *rx_adaptive = efx->irq_rx_adaptive; *rx_usecs = efx->irq_rx_moderation_us; /* If channels are shared between RX and TX, so is IRQ * moderation. Otherwise, IRQ moderation is the same for all * TX channels and is not adaptive. */ if (efx->tx_channel_offset == 0) { *tx_usecs = *rx_usecs; } else { struct efx_channel *tx_channel; tx_channel = efx->channel[efx->tx_channel_offset]; *tx_usecs = tx_channel->irq_moderation_us; } } /************************************************************************** * * Hardware monitor * **************************************************************************/ /* Run periodically off the general workqueue */ static void efx_monitor(struct work_struct *data) { struct efx_nic *efx = container_of(data, struct efx_nic, monitor_work.work); netif_vdbg(efx, timer, efx->net_dev, "hardware monitor executing on CPU %d\n", raw_smp_processor_id()); BUG_ON(efx->type->monitor == NULL); /* If the mac_lock is already held then it is likely a port * reconfiguration is already in place, which will likely do * most of the work of monitor() anyway. */ if (mutex_trylock(&efx->mac_lock)) { if (efx->port_enabled) efx->type->monitor(efx); mutex_unlock(&efx->mac_lock); } queue_delayed_work(efx->workqueue, &efx->monitor_work, efx_monitor_interval); } /************************************************************************** * * ioctls * *************************************************************************/ /* Net device ioctl * Context: process, rtnl_lock() held. */ static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd) { struct efx_nic *efx = netdev_priv(net_dev); struct mii_ioctl_data *data = if_mii(ifr); if (cmd == SIOCSHWTSTAMP) return efx_ptp_set_ts_config(efx, ifr); if (cmd == SIOCGHWTSTAMP) return efx_ptp_get_ts_config(efx, ifr); /* Convert phy_id from older PRTAD/DEVAD format */ if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) && (data->phy_id & 0xfc00) == 0x0400) data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400; return mdio_mii_ioctl(&efx->mdio, data, cmd); } /************************************************************************** * * NAPI interface * **************************************************************************/ static void efx_init_napi_channel(struct efx_channel *channel) { struct efx_nic *efx = channel->efx; channel->napi_dev = efx->net_dev; netif_napi_add(channel->napi_dev, &channel->napi_str, efx_poll, napi_weight); } static void efx_init_napi(struct efx_nic *efx) { struct efx_channel *channel; efx_for_each_channel(channel, efx) efx_init_napi_channel(channel); } static void efx_fini_napi_channel(struct efx_channel *channel) { if (channel->napi_dev) netif_napi_del(&channel->napi_str); channel->napi_dev = NULL; } static void efx_fini_napi(struct efx_nic *efx) { struct efx_channel *channel; efx_for_each_channel(channel, efx) efx_fini_napi_channel(channel); } /************************************************************************** * * Kernel net device interface * *************************************************************************/ /* Context: process, rtnl_lock() held. */ int efx_net_open(struct net_device *net_dev) { struct efx_nic *efx = netdev_priv(net_dev); int rc; netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n", raw_smp_processor_id()); rc = efx_check_disabled(efx); if (rc) return rc; if (efx->phy_mode & PHY_MODE_SPECIAL) return -EBUSY; if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL)) return -EIO; /* Notify the kernel of the link state polled during driver load, * before the monitor starts running */ efx_link_status_changed(efx); efx_start_all(efx); if (efx->state == STATE_DISABLED || efx->reset_pending) netif_device_detach(efx->net_dev); efx_selftest_async_start(efx); return 0; } /* Context: process, rtnl_lock() held. * Note that the kernel will ignore our return code; this method * should really be a void. */ int efx_net_stop(struct net_device *net_dev) { struct efx_nic *efx = netdev_priv(net_dev); netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n", raw_smp_processor_id()); /* Stop the device and flush all the channels */ efx_stop_all(efx); return 0; } /* Context: process, dev_base_lock or RTNL held, non-blocking. */ static void efx_net_stats(struct net_device *net_dev, struct rtnl_link_stats64 *stats) { struct efx_nic *efx = netdev_priv(net_dev); spin_lock_bh(&efx->stats_lock); efx->type->update_stats(efx, NULL, stats); spin_unlock_bh(&efx->stats_lock); } /* Context: netif_tx_lock held, BHs disabled. */ static void efx_watchdog(struct net_device *net_dev) { struct efx_nic *efx = netdev_priv(net_dev); netif_err(efx, tx_err, efx->net_dev, "TX stuck with port_enabled=%d: resetting channels\n", efx->port_enabled); efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG); } /* Context: process, rtnl_lock() held. */ static int efx_change_mtu(struct net_device *net_dev, int new_mtu) { struct efx_nic *efx = netdev_priv(net_dev); int rc; rc = efx_check_disabled(efx); if (rc) return rc; netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu); efx_device_detach_sync(efx); efx_stop_all(efx); mutex_lock(&efx->mac_lock); net_dev->mtu = new_mtu; efx_mac_reconfigure(efx); mutex_unlock(&efx->mac_lock); efx_start_all(efx); efx_device_attach_if_not_resetting(efx); return 0; } static int efx_set_mac_address(struct net_device *net_dev, void *data) { struct efx_nic *efx = netdev_priv(net_dev); struct sockaddr *addr = data; u8 *new_addr = addr->sa_data; u8 old_addr[6]; int rc; if (!is_valid_ether_addr(new_addr)) { netif_err(efx, drv, efx->net_dev, "invalid ethernet MAC address requested: %pM\n", new_addr); return -EADDRNOTAVAIL; } /* save old address */ ether_addr_copy(old_addr, net_dev->dev_addr); ether_addr_copy(net_dev->dev_addr, new_addr); if (efx->type->set_mac_address) { rc = efx->type->set_mac_address(efx); if (rc) { ether_addr_copy(net_dev->dev_addr, old_addr); return rc; } } /* Reconfigure the MAC */ mutex_lock(&efx->mac_lock); efx_mac_reconfigure(efx); mutex_unlock(&efx->mac_lock); return 0; } /* Context: netif_addr_lock held, BHs disabled. */ static void efx_set_rx_mode(struct net_device *net_dev) { struct efx_nic *efx = netdev_priv(net_dev); if (efx->port_enabled) queue_work(efx->workqueue, &efx->mac_work); /* Otherwise efx_start_port() will do this */ } static int efx_set_features(struct net_device *net_dev, netdev_features_t data) { struct efx_nic *efx = netdev_priv(net_dev); int rc; /* If disabling RX n-tuple filtering, clear existing filters */ if (net_dev->features & ~data & NETIF_F_NTUPLE) { rc = efx->type->filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL); if (rc) return rc; } /* If Rx VLAN filter is changed, update filters via mac_reconfigure. * If rx-fcs is changed, mac_reconfigure updates that too. */ if ((net_dev->features ^ data) & (NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_RXFCS)) { /* efx_set_rx_mode() will schedule MAC work to update filters * when a new features are finally set in net_dev. */ efx_set_rx_mode(net_dev); } return 0; } static int efx_get_phys_port_id(struct net_device *net_dev, struct netdev_phys_item_id *ppid) { struct efx_nic *efx = netdev_priv(net_dev); if (efx->type->get_phys_port_id) return efx->type->get_phys_port_id(efx, ppid); else return -EOPNOTSUPP; } static int efx_get_phys_port_name(struct net_device *net_dev, char *name, size_t len) { struct efx_nic *efx = netdev_priv(net_dev); if (snprintf(name, len, "p%u", efx->port_num) >= len) return -EINVAL; return 0; } static int efx_vlan_rx_add_vid(struct net_device *net_dev, __be16 proto, u16 vid) { struct efx_nic *efx = netdev_priv(net_dev); if (efx->type->vlan_rx_add_vid) return efx->type->vlan_rx_add_vid(efx, proto, vid); else return -EOPNOTSUPP; } static int efx_vlan_rx_kill_vid(struct net_device *net_dev, __be16 proto, u16 vid) { struct efx_nic *efx = netdev_priv(net_dev); if (efx->type->vlan_rx_kill_vid) return efx->type->vlan_rx_kill_vid(efx, proto, vid); else return -EOPNOTSUPP; } static int efx_udp_tunnel_type_map(enum udp_parsable_tunnel_type in) { switch (in) { case UDP_TUNNEL_TYPE_VXLAN: return TUNNEL_ENCAP_UDP_PORT_ENTRY_VXLAN; case UDP_TUNNEL_TYPE_GENEVE: return TUNNEL_ENCAP_UDP_PORT_ENTRY_GENEVE; default: return -1; } } static void efx_udp_tunnel_add(struct net_device *dev, struct udp_tunnel_info *ti) { struct efx_nic *efx = netdev_priv(dev); struct efx_udp_tunnel tnl; int efx_tunnel_type; efx_tunnel_type = efx_udp_tunnel_type_map(ti->type); if (efx_tunnel_type < 0) return; tnl.type = (u16)efx_tunnel_type; tnl.port = ti->port; if (efx->type->udp_tnl_add_port) (void)efx->type->udp_tnl_add_port(efx, tnl); } static void efx_udp_tunnel_del(struct net_device *dev, struct udp_tunnel_info *ti) { struct efx_nic *efx = netdev_priv(dev); struct efx_udp_tunnel tnl; int efx_tunnel_type; efx_tunnel_type = efx_udp_tunnel_type_map(ti->type); if (efx_tunnel_type < 0) return; tnl.type = (u16)efx_tunnel_type; tnl.port = ti->port; if (efx->type->udp_tnl_del_port) (void)efx->type->udp_tnl_del_port(efx, tnl); } static const struct net_device_ops efx_netdev_ops = { .ndo_open = efx_net_open, .ndo_stop = efx_net_stop, .ndo_get_stats64 = efx_net_stats, .ndo_tx_timeout = efx_watchdog, .ndo_start_xmit = efx_hard_start_xmit, .ndo_validate_addr = eth_validate_addr, .ndo_do_ioctl = efx_ioctl, .ndo_change_mtu = efx_change_mtu, .ndo_set_mac_address = efx_set_mac_address, .ndo_set_rx_mode = efx_set_rx_mode, .ndo_set_features = efx_set_features, .ndo_vlan_rx_add_vid = efx_vlan_rx_add_vid, .ndo_vlan_rx_kill_vid = efx_vlan_rx_kill_vid, #ifdef CONFIG_SFC_SRIOV .ndo_set_vf_mac = efx_sriov_set_vf_mac, .ndo_set_vf_vlan = efx_sriov_set_vf_vlan, .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk, .ndo_get_vf_config = efx_sriov_get_vf_config, .ndo_set_vf_link_state = efx_sriov_set_vf_link_state, #endif .ndo_get_phys_port_id = efx_get_phys_port_id, .ndo_get_phys_port_name = efx_get_phys_port_name, .ndo_setup_tc = efx_setup_tc, #ifdef CONFIG_RFS_ACCEL .ndo_rx_flow_steer = efx_filter_rfs, #endif .ndo_udp_tunnel_add = efx_udp_tunnel_add, .ndo_udp_tunnel_del = efx_udp_tunnel_del, }; static void efx_update_name(struct efx_nic *efx) { strcpy(efx->name, efx->net_dev->name); efx_mtd_rename(efx); efx_set_channel_names(efx); } static int efx_netdev_event(struct notifier_block *this, unsigned long event, void *ptr) { struct net_device *net_dev = netdev_notifier_info_to_dev(ptr); if ((net_dev->netdev_ops == &efx_netdev_ops) && event == NETDEV_CHANGENAME) efx_update_name(netdev_priv(net_dev)); return NOTIFY_DONE; } static struct notifier_block efx_netdev_notifier = { .notifier_call = efx_netdev_event, }; static ssize_t show_phy_type(struct device *dev, struct device_attribute *attr, char *buf) { struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); return sprintf(buf, "%d\n", efx->phy_type); } static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL); #ifdef CONFIG_SFC_MCDI_LOGGING static ssize_t show_mcdi_log(struct device *dev, struct device_attribute *attr, char *buf) { struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); struct efx_mcdi_iface *mcdi = efx_mcdi(efx); return scnprintf(buf, PAGE_SIZE, "%d\n", mcdi->logging_enabled); } static ssize_t set_mcdi_log(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); struct efx_mcdi_iface *mcdi = efx_mcdi(efx); bool enable = count > 0 && *buf != '0'; mcdi->logging_enabled = enable; return count; } static DEVICE_ATTR(mcdi_logging, 0644, show_mcdi_log, set_mcdi_log); #endif static int efx_register_netdev(struct efx_nic *efx) { struct net_device *net_dev = efx->net_dev; struct efx_channel *channel; int rc; net_dev->watchdog_timeo = 5 * HZ; net_dev->irq = efx->pci_dev->irq; net_dev->netdev_ops = &efx_netdev_ops; if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) net_dev->priv_flags |= IFF_UNICAST_FLT; net_dev->ethtool_ops = &efx_ethtool_ops; net_dev->gso_max_segs = EFX_TSO_MAX_SEGS; net_dev->min_mtu = EFX_MIN_MTU; net_dev->max_mtu = EFX_MAX_MTU; rtnl_lock(); /* Enable resets to be scheduled and check whether any were * already requested. If so, the NIC is probably hosed so we * abort. */ efx->state = STATE_READY; smp_mb(); /* ensure we change state before checking reset_pending */ if (efx->reset_pending) { netif_err(efx, probe, efx->net_dev, "aborting probe due to scheduled reset\n"); rc = -EIO; goto fail_locked; } rc = dev_alloc_name(net_dev, net_dev->name); if (rc < 0) goto fail_locked; efx_update_name(efx); /* Always start with carrier off; PHY events will detect the link */ netif_carrier_off(net_dev); rc = register_netdevice(net_dev); if (rc) goto fail_locked; efx_for_each_channel(channel, efx) { struct efx_tx_queue *tx_queue; efx_for_each_channel_tx_queue(tx_queue, channel) efx_init_tx_queue_core_txq(tx_queue); } efx_associate(efx); rtnl_unlock(); rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type); if (rc) { netif_err(efx, drv, efx->net_dev, "failed to init net dev attributes\n"); goto fail_registered; } #ifdef CONFIG_SFC_MCDI_LOGGING rc = device_create_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging); if (rc) { netif_err(efx, drv, efx->net_dev, "failed to init net dev attributes\n"); goto fail_attr_mcdi_logging; } #endif return 0; #ifdef CONFIG_SFC_MCDI_LOGGING fail_attr_mcdi_logging: device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type); #endif fail_registered: rtnl_lock(); efx_dissociate(efx); unregister_netdevice(net_dev); fail_locked: efx->state = STATE_UNINIT; rtnl_unlock(); netif_err(efx, drv, efx->net_dev, "could not register net dev\n"); return rc; } static void efx_unregister_netdev(struct efx_nic *efx) { if (!efx->net_dev) return; BUG_ON(netdev_priv(efx->net_dev) != efx); if (efx_dev_registered(efx)) { strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name)); #ifdef CONFIG_SFC_MCDI_LOGGING device_remove_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging); #endif device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type); unregister_netdev(efx->net_dev); } } /************************************************************************** * * Device reset and suspend * **************************************************************************/ /* Tears down the entire software state and most of the hardware state * before reset. */ void efx_reset_down(struct efx_nic *efx, enum reset_type method) { EFX_ASSERT_RESET_SERIALISED(efx); if (method == RESET_TYPE_MCDI_TIMEOUT) efx->type->prepare_flr(efx); efx_stop_all(efx); efx_disable_interrupts(efx); mutex_lock(&efx->mac_lock); down_write(&efx->filter_sem); mutex_lock(&efx->rss_lock); if (efx->port_initialized && method != RESET_TYPE_INVISIBLE && method != RESET_TYPE_DATAPATH) efx->phy_op->fini(efx); efx->type->fini(efx); } /* This function will always ensure that the locks acquired in * efx_reset_down() are released. A failure return code indicates * that we were unable to reinitialise the hardware, and the * driver should be disabled. If ok is false, then the rx and tx * engines are not restarted, pending a RESET_DISABLE. */ int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok) { int rc; EFX_ASSERT_RESET_SERIALISED(efx); if (method == RESET_TYPE_MCDI_TIMEOUT) efx->type->finish_flr(efx); /* Ensure that SRAM is initialised even if we're disabling the device */ rc = efx->type->init(efx); if (rc) { netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n"); goto fail; } if (!ok) goto fail; if (efx->port_initialized && method != RESET_TYPE_INVISIBLE && method != RESET_TYPE_DATAPATH) { rc = efx->phy_op->init(efx); if (rc) goto fail; rc = efx->phy_op->reconfigure(efx); if (rc && rc != -EPERM) netif_err(efx, drv, efx->net_dev, "could not restore PHY settings\n"); } rc = efx_enable_interrupts(efx); if (rc) goto fail; #ifdef CONFIG_SFC_SRIOV rc = efx->type->vswitching_restore(efx); if (rc) /* not fatal; the PF will still work fine */ netif_warn(efx, probe, efx->net_dev, "failed to restore vswitching rc=%d;" " VFs may not function\n", rc); #endif if (efx->type->rx_restore_rss_contexts) efx->type->rx_restore_rss_contexts(efx); mutex_unlock(&efx->rss_lock); efx->type->filter_table_restore(efx); up_write(&efx->filter_sem); if (efx->type->sriov_reset) efx->type->sriov_reset(efx); mutex_unlock(&efx->mac_lock); efx_start_all(efx); if (efx->type->udp_tnl_push_ports) efx->type->udp_tnl_push_ports(efx); return 0; fail: efx->port_initialized = false; mutex_unlock(&efx->rss_lock); up_write(&efx->filter_sem); mutex_unlock(&efx->mac_lock); return rc; } /* Reset the NIC using the specified method. Note that the reset may * fail, in which case the card will be left in an unusable state. * * Caller must hold the rtnl_lock. */ int efx_reset(struct efx_nic *efx, enum reset_type method) { int rc, rc2; bool disabled; netif_info(efx, drv, efx->net_dev, "resetting (%s)\n", RESET_TYPE(method)); efx_device_detach_sync(efx); efx_reset_down(efx, method); rc = efx->type->reset(efx, method); if (rc) { netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n"); goto out; } /* Clear flags for the scopes we covered. We assume the NIC and * driver are now quiescent so that there is no race here. */ if (method < RESET_TYPE_MAX_METHOD) efx->reset_pending &= -(1 << (method + 1)); else /* it doesn't fit into the well-ordered scope hierarchy */ __clear_bit(method, &efx->reset_pending); /* Reinitialise bus-mastering, which may have been turned off before * the reset was scheduled. This is still appropriate, even in the * RESET_TYPE_DISABLE since this driver generally assumes the hardware * can respond to requests. */ pci_set_master(efx->pci_dev); out: /* Leave device stopped if necessary */ disabled = rc || method == RESET_TYPE_DISABLE || method == RESET_TYPE_RECOVER_OR_DISABLE; rc2 = efx_reset_up(efx, method, !disabled); if (rc2) { disabled = true; if (!rc) rc = rc2; } if (disabled) { dev_close(efx->net_dev); netif_err(efx, drv, efx->net_dev, "has been disabled\n"); efx->state = STATE_DISABLED; } else { netif_dbg(efx, drv, efx->net_dev, "reset complete\n"); efx_device_attach_if_not_resetting(efx); } return rc; } /* Try recovery mechanisms. * For now only EEH is supported. * Returns 0 if the recovery mechanisms are unsuccessful. * Returns a non-zero value otherwise. */ int efx_try_recovery(struct efx_nic *efx) { #ifdef CONFIG_EEH /* A PCI error can occur and not be seen by EEH because nothing * happens on the PCI bus. In this case the driver may fail and * schedule a 'recover or reset', leading to this recovery handler. * Manually call the eeh failure check function. */ struct eeh_dev *eehdev = pci_dev_to_eeh_dev(efx->pci_dev); if (eeh_dev_check_failure(eehdev)) { /* The EEH mechanisms will handle the error and reset the * device if necessary. */ return 1; } #endif return 0; } static void efx_wait_for_bist_end(struct efx_nic *efx) { int i; for (i = 0; i < BIST_WAIT_DELAY_COUNT; ++i) { if (efx_mcdi_poll_reboot(efx)) goto out; msleep(BIST_WAIT_DELAY_MS); } netif_err(efx, drv, efx->net_dev, "Warning: No MC reboot after BIST mode\n"); out: /* Either way unset the BIST flag. If we found no reboot we probably * won't recover, but we should try. */ efx->mc_bist_for_other_fn = false; } /* The worker thread exists so that code that cannot sleep can * schedule a reset for later. */ static void efx_reset_work(struct work_struct *data) { struct efx_nic *efx = container_of(data, struct efx_nic, reset_work); unsigned long pending; enum reset_type method; pending = READ_ONCE(efx->reset_pending); method = fls(pending) - 1; if (method == RESET_TYPE_MC_BIST) efx_wait_for_bist_end(efx); if ((method == RESET_TYPE_RECOVER_OR_DISABLE || method == RESET_TYPE_RECOVER_OR_ALL) && efx_try_recovery(efx)) return; if (!pending) return; rtnl_lock(); /* We checked the state in efx_schedule_reset() but it may * have changed by now. Now that we have the RTNL lock, * it cannot change again. */ if (efx->state == STATE_READY) (void)efx_reset(efx, method); rtnl_unlock(); } void efx_schedule_reset(struct efx_nic *efx, enum reset_type type) { enum reset_type method; if (efx->state == STATE_RECOVERY) { netif_dbg(efx, drv, efx->net_dev, "recovering: skip scheduling %s reset\n", RESET_TYPE(type)); return; } switch (type) { case RESET_TYPE_INVISIBLE: case RESET_TYPE_ALL: case RESET_TYPE_RECOVER_OR_ALL: case RESET_TYPE_WORLD: case RESET_TYPE_DISABLE: case RESET_TYPE_RECOVER_OR_DISABLE: case RESET_TYPE_DATAPATH: case RESET_TYPE_MC_BIST: case RESET_TYPE_MCDI_TIMEOUT: method = type; netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n", RESET_TYPE(method)); break; default: method = efx->type->map_reset_reason(type); netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset for %s\n", RESET_TYPE(method), RESET_TYPE(type)); break; } set_bit(method, &efx->reset_pending); smp_mb(); /* ensure we change reset_pending before checking state */ /* If we're not READY then just leave the flags set as the cue * to abort probing or reschedule the reset later. */ if (READ_ONCE(efx->state) != STATE_READY) return; /* efx_process_channel() will no longer read events once a * reset is scheduled. So switch back to poll'd MCDI completions. */ efx_mcdi_mode_poll(efx); queue_work(reset_workqueue, &efx->reset_work); } /************************************************************************** * * List of NICs we support * **************************************************************************/ /* PCI device ID table */ static const struct pci_device_id efx_pci_table[] = { {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */ .driver_data = (unsigned long) &siena_a0_nic_type}, {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */ .driver_data = (unsigned long) &siena_a0_nic_type}, {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0903), /* SFC9120 PF */ .driver_data = (unsigned long) &efx_hunt_a0_nic_type}, {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1903), /* SFC9120 VF */ .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type}, {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0923), /* SFC9140 PF */ .driver_data = (unsigned long) &efx_hunt_a0_nic_type}, {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1923), /* SFC9140 VF */ .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type}, {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0a03), /* SFC9220 PF */ .driver_data = (unsigned long) &efx_hunt_a0_nic_type}, {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1a03), /* SFC9220 VF */ .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type}, {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0b03), /* SFC9250 PF */ .driver_data = (unsigned long) &efx_hunt_a0_nic_type}, {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1b03), /* SFC9250 VF */ .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type}, {0} /* end of list */ }; /************************************************************************** * * Dummy PHY/MAC operations * * Can be used for some unimplemented operations * Needed so all function pointers are valid and do not have to be tested * before use * **************************************************************************/ int efx_port_dummy_op_int(struct efx_nic *efx) { return 0; } void efx_port_dummy_op_void(struct efx_nic *efx) {} static bool efx_port_dummy_op_poll(struct efx_nic *efx) { return false; } static const struct efx_phy_operations efx_dummy_phy_operations = { .init = efx_port_dummy_op_int, .reconfigure = efx_port_dummy_op_int, .poll = efx_port_dummy_op_poll, .fini = efx_port_dummy_op_void, }; /************************************************************************** * * Data housekeeping * **************************************************************************/ /* This zeroes out and then fills in the invariants in a struct * efx_nic (including all sub-structures). */ static int efx_init_struct(struct efx_nic *efx, struct pci_dev *pci_dev, struct net_device *net_dev) { int rc = -ENOMEM, i; /* Initialise common structures */ INIT_LIST_HEAD(&efx->node); INIT_LIST_HEAD(&efx->secondary_list); spin_lock_init(&efx->biu_lock); #ifdef CONFIG_SFC_MTD INIT_LIST_HEAD(&efx->mtd_list); #endif INIT_WORK(&efx->reset_work, efx_reset_work); INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor); INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work); efx->pci_dev = pci_dev; efx->msg_enable = debug; efx->state = STATE_UNINIT; strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name)); efx->net_dev = net_dev; efx->rx_prefix_size = efx->type->rx_prefix_size; efx->rx_ip_align = NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0; efx->rx_packet_hash_offset = efx->type->rx_hash_offset - efx->type->rx_prefix_size; efx->rx_packet_ts_offset = efx->type->rx_ts_offset - efx->type->rx_prefix_size; INIT_LIST_HEAD(&efx->rss_context.list); mutex_init(&efx->rss_lock); spin_lock_init(&efx->stats_lock); efx->vi_stride = EFX_DEFAULT_VI_STRIDE; efx->num_mac_stats = MC_CMD_MAC_NSTATS; BUILD_BUG_ON(MC_CMD_MAC_NSTATS - 1 != MC_CMD_MAC_GENERATION_END); mutex_init(&efx->mac_lock); #ifdef CONFIG_RFS_ACCEL mutex_init(&efx->rps_mutex); spin_lock_init(&efx->rps_hash_lock); /* Failure to allocate is not fatal, but may degrade ARFS performance */ efx->rps_hash_table = kcalloc(EFX_ARFS_HASH_TABLE_SIZE, sizeof(*efx->rps_hash_table), GFP_KERNEL); #endif efx->phy_op = &efx_dummy_phy_operations; efx->mdio.dev = net_dev; INIT_WORK(&efx->mac_work, efx_mac_work); init_waitqueue_head(&efx->flush_wq); for (i = 0; i < EFX_MAX_CHANNELS; i++) { efx->channel[i] = efx_alloc_channel(efx, i, NULL); if (!efx->channel[i]) goto fail; efx->msi_context[i].efx = efx; efx->msi_context[i].index = i; } /* Higher numbered interrupt modes are less capable! */ if (WARN_ON_ONCE(efx->type->max_interrupt_mode > efx->type->min_interrupt_mode)) { rc = -EIO; goto fail; } efx->interrupt_mode = max(efx->type->max_interrupt_mode, interrupt_mode); efx->interrupt_mode = min(efx->type->min_interrupt_mode, interrupt_mode); /* Would be good to use the net_dev name, but we're too early */ snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s", pci_name(pci_dev)); efx->workqueue = create_singlethread_workqueue(efx->workqueue_name); if (!efx->workqueue) goto fail; return 0; fail: efx_fini_struct(efx); return rc; } static void efx_fini_struct(struct efx_nic *efx) { int i; #ifdef CONFIG_RFS_ACCEL kfree(efx->rps_hash_table); #endif for (i = 0; i < EFX_MAX_CHANNELS; i++) kfree(efx->channel[i]); kfree(efx->vpd_sn); if (efx->workqueue) { destroy_workqueue(efx->workqueue); efx->workqueue = NULL; } } void efx_update_sw_stats(struct efx_nic *efx, u64 *stats) { u64 n_rx_nodesc_trunc = 0; struct efx_channel *channel; efx_for_each_channel(channel, efx) n_rx_nodesc_trunc += channel->n_rx_nodesc_trunc; stats[GENERIC_STAT_rx_nodesc_trunc] = n_rx_nodesc_trunc; stats[GENERIC_STAT_rx_noskb_drops] = atomic_read(&efx->n_rx_noskb_drops); } bool efx_filter_spec_equal(const struct efx_filter_spec *left, const struct efx_filter_spec *right) { if ((left->match_flags ^ right->match_flags) | ((left->flags ^ right->flags) & (EFX_FILTER_FLAG_RX | EFX_FILTER_FLAG_TX))) return false; return memcmp(&left->outer_vid, &right->outer_vid, sizeof(struct efx_filter_spec) - offsetof(struct efx_filter_spec, outer_vid)) == 0; } u32 efx_filter_spec_hash(const struct efx_filter_spec *spec) { BUILD_BUG_ON(offsetof(struct efx_filter_spec, outer_vid) & 3); return jhash2((const u32 *)&spec->outer_vid, (sizeof(struct efx_filter_spec) - offsetof(struct efx_filter_spec, outer_vid)) / 4, 0); } #ifdef CONFIG_RFS_ACCEL bool efx_rps_check_rule(struct efx_arfs_rule *rule, unsigned int filter_idx, bool *force) { if (rule->filter_id == EFX_ARFS_FILTER_ID_PENDING) { /* ARFS is currently updating this entry, leave it */ return false; } if (rule->filter_id == EFX_ARFS_FILTER_ID_ERROR) { /* ARFS tried and failed to update this, so it's probably out * of date. Remove the filter and the ARFS rule entry. */ rule->filter_id = EFX_ARFS_FILTER_ID_REMOVING; *force = true; return true; } else if (WARN_ON(rule->filter_id != filter_idx)) { /* can't happen */ /* ARFS has moved on, so old filter is not needed. Since we did * not mark the rule with EFX_ARFS_FILTER_ID_REMOVING, it will * not be removed by efx_rps_hash_del() subsequently. */ *force = true; return true; } /* Remove it iff ARFS wants to. */ return true; } static struct hlist_head *efx_rps_hash_bucket(struct efx_nic *efx, const struct efx_filter_spec *spec) { u32 hash = efx_filter_spec_hash(spec); lockdep_assert_held(&efx->rps_hash_lock); if (!efx->rps_hash_table) return NULL; return &efx->rps_hash_table[hash % EFX_ARFS_HASH_TABLE_SIZE]; } struct efx_arfs_rule *efx_rps_hash_find(struct efx_nic *efx, const struct efx_filter_spec *spec) { struct efx_arfs_rule *rule; struct hlist_head *head; struct hlist_node *node; head = efx_rps_hash_bucket(efx, spec); if (!head) return NULL; hlist_for_each(node, head) { rule = container_of(node, struct efx_arfs_rule, node); if (efx_filter_spec_equal(spec, &rule->spec)) return rule; } return NULL; } struct efx_arfs_rule *efx_rps_hash_add(struct efx_nic *efx, const struct efx_filter_spec *spec, bool *new) { struct efx_arfs_rule *rule; struct hlist_head *head; struct hlist_node *node; head = efx_rps_hash_bucket(efx, spec); if (!head) return NULL; hlist_for_each(node, head) { rule = container_of(node, struct efx_arfs_rule, node); if (efx_filter_spec_equal(spec, &rule->spec)) { *new = false; return rule; } } rule = kmalloc(sizeof(*rule), GFP_ATOMIC); *new = true; if (rule) { memcpy(&rule->spec, spec, sizeof(rule->spec)); hlist_add_head(&rule->node, head); } return rule; } void efx_rps_hash_del(struct efx_nic *efx, const struct efx_filter_spec *spec) { struct efx_arfs_rule *rule; struct hlist_head *head; struct hlist_node *node; head = efx_rps_hash_bucket(efx, spec); if (WARN_ON(!head)) return; hlist_for_each(node, head) { rule = container_of(node, struct efx_arfs_rule, node); if (efx_filter_spec_equal(spec, &rule->spec)) { /* Someone already reused the entry. We know that if * this check doesn't fire (i.e. filter_id == REMOVING) * then the REMOVING mark was put there by our caller, * because caller is holding a lock on filter table and * only holders of that lock set REMOVING. */ if (rule->filter_id != EFX_ARFS_FILTER_ID_REMOVING) return; hlist_del(node); kfree(rule); return; } } /* We didn't find it. */ WARN_ON(1); } #endif /* RSS contexts. We're using linked lists and crappy O(n) algorithms, because * (a) this is an infrequent control-plane operation and (b) n is small (max 64) */ struct efx_rss_context *efx_alloc_rss_context_entry(struct efx_nic *efx) { struct list_head *head = &efx->rss_context.list; struct efx_rss_context *ctx, *new; u32 id = 1; /* Don't use zero, that refers to the master RSS context */ WARN_ON(!mutex_is_locked(&efx->rss_lock)); /* Search for first gap in the numbering */ list_for_each_entry(ctx, head, list) { if (ctx->user_id != id) break; id++; /* Check for wrap. If this happens, we have nearly 2^32 * allocated RSS contexts, which seems unlikely. */ if (WARN_ON_ONCE(!id)) return NULL; } /* Create the new entry */ new = kmalloc(sizeof(struct efx_rss_context), GFP_KERNEL); if (!new) return NULL; new->context_id = EFX_EF10_RSS_CONTEXT_INVALID; new->rx_hash_udp_4tuple = false; /* Insert the new entry into the gap */ new->user_id = id; list_add_tail(&new->list, &ctx->list); return new; } struct efx_rss_context *efx_find_rss_context_entry(struct efx_nic *efx, u32 id) { struct list_head *head = &efx->rss_context.list; struct efx_rss_context *ctx; WARN_ON(!mutex_is_locked(&efx->rss_lock)); list_for_each_entry(ctx, head, list) if (ctx->user_id == id) return ctx; return NULL; } void efx_free_rss_context_entry(struct efx_rss_context *ctx) { list_del(&ctx->list); kfree(ctx); } /************************************************************************** * * PCI interface * **************************************************************************/ /* Main body of final NIC shutdown code * This is called only at module unload (or hotplug removal). */ static void efx_pci_remove_main(struct efx_nic *efx) { /* Flush reset_work. It can no longer be scheduled since we * are not READY. */ BUG_ON(efx->state == STATE_READY); cancel_work_sync(&efx->reset_work); efx_disable_interrupts(efx); efx_clear_interrupt_affinity(efx); efx_nic_fini_interrupt(efx); efx_fini_port(efx); efx->type->fini(efx); efx_fini_napi(efx); efx_remove_all(efx); } /* Final NIC shutdown * This is called only at module unload (or hotplug removal). A PF can call * this on its VFs to ensure they are unbound first. */ static void efx_pci_remove(struct pci_dev *pci_dev) { struct efx_nic *efx; efx = pci_get_drvdata(pci_dev); if (!efx) return; /* Mark the NIC as fini, then stop the interface */ rtnl_lock(); efx_dissociate(efx); dev_close(efx->net_dev); efx_disable_interrupts(efx); efx->state = STATE_UNINIT; rtnl_unlock(); if (efx->type->sriov_fini) efx->type->sriov_fini(efx); efx_unregister_netdev(efx); efx_mtd_remove(efx); efx_pci_remove_main(efx); efx_fini_io(efx); netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n"); efx_fini_struct(efx); free_netdev(efx->net_dev); pci_disable_pcie_error_reporting(pci_dev); }; /* NIC VPD information * Called during probe to display the part number of the * installed NIC. VPD is potentially very large but this should * always appear within the first 512 bytes. */ #define SFC_VPD_LEN 512 static void efx_probe_vpd_strings(struct efx_nic *efx) { struct pci_dev *dev = efx->pci_dev; char vpd_data[SFC_VPD_LEN]; ssize_t vpd_size; int ro_start, ro_size, i, j; /* Get the vpd data from the device */ vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data); if (vpd_size <= 0) { netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n"); return; } /* Get the Read only section */ ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA); if (ro_start < 0) { netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n"); return; } ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]); j = ro_size; i = ro_start + PCI_VPD_LRDT_TAG_SIZE; if (i + j > vpd_size) j = vpd_size - i; /* Get the Part number */ i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN"); if (i < 0) { netif_err(efx, drv, efx->net_dev, "Part number not found\n"); return; } j = pci_vpd_info_field_size(&vpd_data[i]); i += PCI_VPD_INFO_FLD_HDR_SIZE; if (i + j > vpd_size) { netif_err(efx, drv, efx->net_dev, "Incomplete part number\n"); return; } netif_info(efx, drv, efx->net_dev, "Part Number : %.*s\n", j, &vpd_data[i]); i = ro_start + PCI_VPD_LRDT_TAG_SIZE; j = ro_size; i = pci_vpd_find_info_keyword(vpd_data, i, j, "SN"); if (i < 0) { netif_err(efx, drv, efx->net_dev, "Serial number not found\n"); return; } j = pci_vpd_info_field_size(&vpd_data[i]); i += PCI_VPD_INFO_FLD_HDR_SIZE; if (i + j > vpd_size) { netif_err(efx, drv, efx->net_dev, "Incomplete serial number\n"); return; } efx->vpd_sn = kmalloc(j + 1, GFP_KERNEL); if (!efx->vpd_sn) return; snprintf(efx->vpd_sn, j + 1, "%s", &vpd_data[i]); } /* Main body of NIC initialisation * This is called at module load (or hotplug insertion, theoretically). */ static int efx_pci_probe_main(struct efx_nic *efx) { int rc; /* Do start-of-day initialisation */ rc = efx_probe_all(efx); if (rc) goto fail1; efx_init_napi(efx); down_write(&efx->filter_sem); rc = efx->type->init(efx); up_write(&efx->filter_sem); if (rc) { netif_err(efx, probe, efx->net_dev, "failed to initialise NIC\n"); goto fail3; } rc = efx_init_port(efx); if (rc) { netif_err(efx, probe, efx->net_dev, "failed to initialise port\n"); goto fail4; } rc = efx_nic_init_interrupt(efx); if (rc) goto fail5; efx_set_interrupt_affinity(efx); rc = efx_enable_interrupts(efx); if (rc) goto fail6; return 0; fail6: efx_clear_interrupt_affinity(efx); efx_nic_fini_interrupt(efx); fail5: efx_fini_port(efx); fail4: efx->type->fini(efx); fail3: efx_fini_napi(efx); efx_remove_all(efx); fail1: return rc; } static int efx_pci_probe_post_io(struct efx_nic *efx) { struct net_device *net_dev = efx->net_dev; int rc = efx_pci_probe_main(efx); if (rc) return rc; if (efx->type->sriov_init) { rc = efx->type->sriov_init(efx); if (rc) netif_err(efx, probe, efx->net_dev, "SR-IOV can't be enabled rc %d\n", rc); } /* Determine netdevice features */ net_dev->features |= (efx->type->offload_features | NETIF_F_SG | NETIF_F_TSO | NETIF_F_RXCSUM | NETIF_F_RXALL); if (efx->type->offload_features & (NETIF_F_IPV6_CSUM | NETIF_F_HW_CSUM)) net_dev->features |= NETIF_F_TSO6; /* Check whether device supports TSO */ if (!efx->type->tso_versions || !efx->type->tso_versions(efx)) net_dev->features &= ~NETIF_F_ALL_TSO; /* Mask for features that also apply to VLAN devices */ net_dev->vlan_features |= (NETIF_F_HW_CSUM | NETIF_F_SG | NETIF_F_HIGHDMA | NETIF_F_ALL_TSO | NETIF_F_RXCSUM); net_dev->hw_features |= net_dev->features & ~efx->fixed_features; /* Disable receiving frames with bad FCS, by default. */ net_dev->features &= ~NETIF_F_RXALL; /* Disable VLAN filtering by default. It may be enforced if * the feature is fixed (i.e. VLAN filters are required to * receive VLAN tagged packets due to vPort restrictions). */ net_dev->features &= ~NETIF_F_HW_VLAN_CTAG_FILTER; net_dev->features |= efx->fixed_features; rc = efx_register_netdev(efx); if (!rc) return 0; efx_pci_remove_main(efx); return rc; } /* NIC initialisation * * This is called at module load (or hotplug insertion, * theoretically). It sets up PCI mappings, resets the NIC, * sets up and registers the network devices with the kernel and hooks * the interrupt service routine. It does not prepare the device for * transmission; this is left to the first time one of the network * interfaces is brought up (i.e. efx_net_open). */ static int efx_pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *entry) { struct net_device *net_dev; struct efx_nic *efx; int rc; /* Allocate and initialise a struct net_device and struct efx_nic */ net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES, EFX_MAX_RX_QUEUES); if (!net_dev) return -ENOMEM; efx = netdev_priv(net_dev); efx->type = (const struct efx_nic_type *) entry->driver_data; efx->fixed_features |= NETIF_F_HIGHDMA; pci_set_drvdata(pci_dev, efx); SET_NETDEV_DEV(net_dev, &pci_dev->dev); rc = efx_init_struct(efx, pci_dev, net_dev); if (rc) goto fail1; netif_info(efx, probe, efx->net_dev, "Solarflare NIC detected\n"); if (!efx->type->is_vf) efx_probe_vpd_strings(efx); /* Set up basic I/O (BAR mappings etc) */ rc = efx_init_io(efx); if (rc) goto fail2; rc = efx_pci_probe_post_io(efx); if (rc) { /* On failure, retry once immediately. * If we aborted probe due to a scheduled reset, dismiss it. */ efx->reset_pending = 0; rc = efx_pci_probe_post_io(efx); if (rc) { /* On another failure, retry once more * after a 50-305ms delay. */ unsigned char r; get_random_bytes(&r, 1); msleep((unsigned int)r + 50); efx->reset_pending = 0; rc = efx_pci_probe_post_io(efx); } } if (rc) goto fail3; netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n"); /* Try to create MTDs, but allow this to fail */ rtnl_lock(); rc = efx_mtd_probe(efx); rtnl_unlock(); if (rc && rc != -EPERM) netif_warn(efx, probe, efx->net_dev, "failed to create MTDs (%d)\n", rc); rc = pci_enable_pcie_error_reporting(pci_dev); if (rc && rc != -EINVAL) netif_notice(efx, probe, efx->net_dev, "PCIE error reporting unavailable (%d).\n", rc); if (efx->type->udp_tnl_push_ports) efx->type->udp_tnl_push_ports(efx); return 0; fail3: efx_fini_io(efx); fail2: efx_fini_struct(efx); fail1: WARN_ON(rc > 0); netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc); free_netdev(net_dev); return rc; } /* efx_pci_sriov_configure returns the actual number of Virtual Functions * enabled on success */ #ifdef CONFIG_SFC_SRIOV static int efx_pci_sriov_configure(struct pci_dev *dev, int num_vfs) { int rc; struct efx_nic *efx = pci_get_drvdata(dev); if (efx->type->sriov_configure) { rc = efx->type->sriov_configure(efx, num_vfs); if (rc) return rc; else return num_vfs; } else return -EOPNOTSUPP; } #endif static int efx_pm_freeze(struct device *dev) { struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); rtnl_lock(); if (efx->state != STATE_DISABLED) { efx->state = STATE_UNINIT; efx_device_detach_sync(efx); efx_stop_all(efx); efx_disable_interrupts(efx); } rtnl_unlock(); return 0; } static int efx_pm_thaw(struct device *dev) { int rc; struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); rtnl_lock(); if (efx->state != STATE_DISABLED) { rc = efx_enable_interrupts(efx); if (rc) goto fail; mutex_lock(&efx->mac_lock); efx->phy_op->reconfigure(efx); mutex_unlock(&efx->mac_lock); efx_start_all(efx); efx_device_attach_if_not_resetting(efx); efx->state = STATE_READY; efx->type->resume_wol(efx); } rtnl_unlock(); /* Reschedule any quenched resets scheduled during efx_pm_freeze() */ queue_work(reset_workqueue, &efx->reset_work); return 0; fail: rtnl_unlock(); return rc; } static int efx_pm_poweroff(struct device *dev) { struct pci_dev *pci_dev = to_pci_dev(dev); struct efx_nic *efx = pci_get_drvdata(pci_dev); efx->type->fini(efx); efx->reset_pending = 0; pci_save_state(pci_dev); return pci_set_power_state(pci_dev, PCI_D3hot); } /* Used for both resume and restore */ static int efx_pm_resume(struct device *dev) { struct pci_dev *pci_dev = to_pci_dev(dev); struct efx_nic *efx = pci_get_drvdata(pci_dev); int rc; rc = pci_set_power_state(pci_dev, PCI_D0); if (rc) return rc; pci_restore_state(pci_dev); rc = pci_enable_device(pci_dev); if (rc) return rc; pci_set_master(efx->pci_dev); rc = efx->type->reset(efx, RESET_TYPE_ALL); if (rc) return rc; down_write(&efx->filter_sem); rc = efx->type->init(efx); up_write(&efx->filter_sem); if (rc) return rc; rc = efx_pm_thaw(dev); return rc; } static int efx_pm_suspend(struct device *dev) { int rc; efx_pm_freeze(dev); rc = efx_pm_poweroff(dev); if (rc) efx_pm_resume(dev); return rc; } static const struct dev_pm_ops efx_pm_ops = { .suspend = efx_pm_suspend, .resume = efx_pm_resume, .freeze = efx_pm_freeze, .thaw = efx_pm_thaw, .poweroff = efx_pm_poweroff, .restore = efx_pm_resume, }; /* A PCI error affecting this device was detected. * At this point MMIO and DMA may be disabled. * Stop the software path and request a slot reset. */ static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev, enum pci_channel_state state) { pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED; struct efx_nic *efx = pci_get_drvdata(pdev); if (state == pci_channel_io_perm_failure) return PCI_ERS_RESULT_DISCONNECT; rtnl_lock(); if (efx->state != STATE_DISABLED) { efx->state = STATE_RECOVERY; efx->reset_pending = 0; efx_device_detach_sync(efx); efx_stop_all(efx); efx_disable_interrupts(efx); status = PCI_ERS_RESULT_NEED_RESET; } else { /* If the interface is disabled we don't want to do anything * with it. */ status = PCI_ERS_RESULT_RECOVERED; } rtnl_unlock(); pci_disable_device(pdev); return status; } /* Fake a successful reset, which will be performed later in efx_io_resume. */ static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev) { struct efx_nic *efx = pci_get_drvdata(pdev); pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED; if (pci_enable_device(pdev)) { netif_err(efx, hw, efx->net_dev, "Cannot re-enable PCI device after reset.\n"); status = PCI_ERS_RESULT_DISCONNECT; } return status; } /* Perform the actual reset and resume I/O operations. */ static void efx_io_resume(struct pci_dev *pdev) { struct efx_nic *efx = pci_get_drvdata(pdev); int rc; rtnl_lock(); if (efx->state == STATE_DISABLED) goto out; rc = efx_reset(efx, RESET_TYPE_ALL); if (rc) { netif_err(efx, hw, efx->net_dev, "efx_reset failed after PCI error (%d)\n", rc); } else { efx->state = STATE_READY; netif_dbg(efx, hw, efx->net_dev, "Done resetting and resuming IO after PCI error.\n"); } out: rtnl_unlock(); } /* For simplicity and reliability, we always require a slot reset and try to * reset the hardware when a pci error affecting the device is detected. * We leave both the link_reset and mmio_enabled callback unimplemented: * with our request for slot reset the mmio_enabled callback will never be * called, and the link_reset callback is not used by AER or EEH mechanisms. */ static const struct pci_error_handlers efx_err_handlers = { .error_detected = efx_io_error_detected, .slot_reset = efx_io_slot_reset, .resume = efx_io_resume, }; static struct pci_driver efx_pci_driver = { .name = KBUILD_MODNAME, .id_table = efx_pci_table, .probe = efx_pci_probe, .remove = efx_pci_remove, .driver.pm = &efx_pm_ops, .err_handler = &efx_err_handlers, #ifdef CONFIG_SFC_SRIOV .sriov_configure = efx_pci_sriov_configure, #endif }; /************************************************************************** * * Kernel module interface * *************************************************************************/ module_param(interrupt_mode, uint, 0444); MODULE_PARM_DESC(interrupt_mode, "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)"); static int __init efx_init_module(void) { int rc; printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n"); rc = register_netdevice_notifier(&efx_netdev_notifier); if (rc) goto err_notifier; #ifdef CONFIG_SFC_SRIOV rc = efx_init_sriov(); if (rc) goto err_sriov; #endif reset_workqueue = create_singlethread_workqueue("sfc_reset"); if (!reset_workqueue) { rc = -ENOMEM; goto err_reset; } rc = pci_register_driver(&efx_pci_driver); if (rc < 0) goto err_pci; return 0; err_pci: destroy_workqueue(reset_workqueue); err_reset: #ifdef CONFIG_SFC_SRIOV efx_fini_sriov(); err_sriov: #endif unregister_netdevice_notifier(&efx_netdev_notifier); err_notifier: return rc; } static void __exit efx_exit_module(void) { printk(KERN_INFO "Solarflare NET driver unloading\n"); pci_unregister_driver(&efx_pci_driver); destroy_workqueue(reset_workqueue); #ifdef CONFIG_SFC_SRIOV efx_fini_sriov(); #endif unregister_netdevice_notifier(&efx_netdev_notifier); } module_init(efx_init_module); module_exit(efx_exit_module); MODULE_AUTHOR("Solarflare Communications and " "Michael Brown <mbrown@fensystems.co.uk>"); MODULE_DESCRIPTION("Solarflare network driver"); MODULE_LICENSE("GPL"); MODULE_DEVICE_TABLE(pci, efx_pci_table); MODULE_VERSION(EFX_DRIVER_VERSION);
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