Contributors: 16
| Author |
Tokens |
Token Proportion |
Commits |
Commit Proportion |
| Kim Phillips |
319 |
86.68% |
3 |
15.00% |
| Anton Vorontsov |
17 |
4.62% |
1 |
5.00% |
| Oliver O'Halloran |
5 |
1.36% |
1 |
5.00% |
| Kumar Gala |
4 |
1.09% |
2 |
10.00% |
| Joe Perches |
4 |
1.09% |
1 |
5.00% |
| John Rigby |
3 |
0.82% |
1 |
5.00% |
| Li Yang |
3 |
0.82% |
2 |
10.00% |
| Thomas Gleixner |
2 |
0.54% |
1 |
5.00% |
| Jon Loeliger |
2 |
0.54% |
1 |
5.00% |
| Kevin Hao |
2 |
0.54% |
1 |
5.00% |
| Dmitry Torokhov |
2 |
0.54% |
1 |
5.00% |
| Zhao Qiang |
1 |
0.27% |
1 |
5.00% |
| Dmitry Eremin-Solenikov |
1 |
0.27% |
1 |
5.00% |
| Rasmus Villemoes |
1 |
0.27% |
1 |
5.00% |
| Benjamin Herrenschmidt |
1 |
0.27% |
1 |
5.00% |
| Arun Sharma |
1 |
0.27% |
1 |
5.00% |
| Total |
368 |
|
20 |
|
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2006 Freescale Semiconductor, Inc. All rights reserved.
*
* Description:
* MPC832xE MDS board specific routines.
*/
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/reboot.h>
#include <linux/pci.h>
#include <linux/kdev_t.h>
#include <linux/major.h>
#include <linux/console.h>
#include <linux/delay.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
#include <linux/initrd.h>
#include <linux/of_platform.h>
#include <linux/of_device.h>
#include <linux/atomic.h>
#include <asm/time.h>
#include <asm/io.h>
#include <asm/machdep.h>
#include <asm/ipic.h>
#include <asm/irq.h>
#include <asm/prom.h>
#include <asm/udbg.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
#include <soc/fsl/qe/qe.h>
#include "mpc83xx.h"
#undef DEBUG
#ifdef DEBUG
#define DBG(fmt...) udbg_printf(fmt)
#else
#define DBG(fmt...)
#endif
/* ************************************************************************
*
* Setup the architecture
*
*/
static void __init mpc832x_sys_setup_arch(void)
{
struct device_node *np;
u8 __iomem *bcsr_regs = NULL;
mpc83xx_setup_arch();
/* Map BCSR area */
np = of_find_node_by_name(NULL, "bcsr");
if (np) {
struct resource res;
of_address_to_resource(np, 0, &res);
bcsr_regs = ioremap(res.start, resource_size(&res));
of_node_put(np);
}
#ifdef CONFIG_QUICC_ENGINE
if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
par_io_init(np);
of_node_put(np);
for_each_node_by_name(np, "ucc")
par_io_of_config(np);
}
if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
!= NULL){
/* Reset the Ethernet PHYs */
#define BCSR8_FETH_RST 0x50
clrbits8(&bcsr_regs[8], BCSR8_FETH_RST);
udelay(1000);
setbits8(&bcsr_regs[8], BCSR8_FETH_RST);
iounmap(bcsr_regs);
of_node_put(np);
}
#endif /* CONFIG_QUICC_ENGINE */
}
machine_device_initcall(mpc832x_mds, mpc83xx_declare_of_platform_devices);
/*
* Called very early, MMU is off, device-tree isn't unflattened
*/
static int __init mpc832x_sys_probe(void)
{
return of_machine_is_compatible("MPC832xMDS");
}
define_machine(mpc832x_mds) {
.name = "MPC832x MDS",
.probe = mpc832x_sys_probe,
.setup_arch = mpc832x_sys_setup_arch,
.discover_phbs = mpc83xx_setup_pci,
.init_IRQ = mpc83xx_ipic_init_IRQ,
.get_irq = ipic_get_irq,
.restart = mpc83xx_restart,
.time_init = mpc83xx_time_init,
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};